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gerrit-public.fairphone.software / toolchain / llvm-project / 9c31db4f94e78027bece17ee18a154a48436e574 / . / llvm / test / CodeGen / SystemZ / args-01.ll
blob: 3105503eda53b368091772cd881c24fbf87c38e9 [file] [log] [blame]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]1; Test the handling of GPR, FPR and stack arguments when no extension
2; type is given. This type of argument is used for passing structures, etc.
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-INT
5; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FLOAT
6; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-DOUBLE
7; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP128-1
8; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP128-2
9; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-STACK
10
11declare void @bar(i8, i16, i32, i64, float, double, fp128, i64,
12 float, double, i8, i16, i32, i64, float, double, fp128)
13
14; There are two indirect fp128 slots, one at offset 224 (the first available
15; byte after the outgoing arguments) and one immediately after it at 240.
16; These slots should be set up outside the glued call sequence, so would
17; normally use %f0/%f2 as the first available 128-bit pair. This choice
18; is hard-coded in the FP128 tests.
19;
Richard Sandiforda57e13b2013-06-27 09:38:48 +0000[diff] [blame]20; The order of the CHECK-STACK stores doesn't matter. It would be OK to reorder
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]21; them in response to future code changes.
22define void @foo() {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]23; CHECK-INT-LABEL: foo:
Richard Sandiforda57e13b2013-06-27 09:38:48 +0000[diff] [blame]24; CHECK-INT-DAG: lhi %r2, 1
25; CHECK-INT-DAG: lhi %r3, 2
26; CHECK-INT-DAG: lhi %r4, 3
27; CHECK-INT-DAG: lghi %r5, 4
28; CHECK-INT-DAG: la %r6, {{224|240}}(%r15)
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]29; CHECK-INT: brasl %r14, bar@PLT
30;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]31; CHECK-FLOAT-LABEL: foo:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]32; CHECK-FLOAT: lzer %f0
33; CHECK-FLOAT: lcebr %f4, %f0
34; CHECK-FLOAT: brasl %r14, bar@PLT
35;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]36; CHECK-DOUBLE-LABEL: foo:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]37; CHECK-DOUBLE: lzdr %f2
38; CHECK-DOUBLE: lcdbr %f6, %f2
39; CHECK-DOUBLE: brasl %r14, bar@PLT
40;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]41; CHECK-FP128-1-LABEL: foo:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]42; CHECK-FP128-1: aghi %r15, -256
43; CHECK-FP128-1: lzxr %f0
Richard Sandiforda57e13b2013-06-27 09:38:48 +0000[diff] [blame]44; CHECK-FP128-1-DAG: std %f0, 224(%r15)
45; CHECK-FP128-1-DAG: std %f2, 232(%r15)
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]46; CHECK-FP128-1: brasl %r14, bar@PLT
47;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]48; CHECK-FP128-2-LABEL: foo:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]49; CHECK-FP128-2: aghi %r15, -256
50; CHECK-FP128-2: lzxr %f0
Richard Sandiforda57e13b2013-06-27 09:38:48 +0000[diff] [blame]51; CHECK-FP128-2-DAG: std %f0, 240(%r15)
52; CHECK-FP128-2-DAG: std %f2, 248(%r15)
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]53; CHECK-FP128-2: brasl %r14, bar@PLT
54;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]55; CHECK-STACK-LABEL: foo:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]56; CHECK-STACK: aghi %r15, -256
57; CHECK-STACK: la [[REGISTER:%r[0-5]+]], {{224|240}}(%r15)
58; CHECK-STACK: stg [[REGISTER]], 216(%r15)
59; CHECK-STACK: mvghi 208(%r15), 0
60; CHECK-STACK: mvhi 204(%r15), 0
61; CHECK-STACK: mvghi 192(%r15), 9
62; CHECK-STACK: mvhi 188(%r15), 8
63; CHECK-STACK: mvhi 180(%r15), 7
64; CHECK-STACK: mvhi 172(%r15), 6
65; CHECK-STACK: mvghi 160(%r15), 5
66; CHECK-STACK: brasl %r14, bar@PLT
67
68 call void @bar (i8 1, i16 2, i32 3, i64 4, float 0.0, double 0.0,
69 fp128 0xL00000000000000000000000000000000, i64 5,
70 float -0.0, double -0.0, i8 6, i16 7, i32 8, i64 9, float 0.0,
71 double 0.0, fp128 0xL00000000000000000000000000000000)
72 ret void
73}