blob: 738f9aef3c888062c89ca00ecbd643ac4559bab7 [file] [log] [blame]
Tom Stellard40ce8af2015-01-28 16:04:26 +00001; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s
2; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
Tom Stellard36930802014-12-03 04:08:00 +00003
4; CHECK: {{^}}inline_asm:
5; CHECK: s_endpgm
6; CHECK: s_endpgm
7define void @inline_asm(i32 addrspace(1)* %out) {
8entry:
9 store i32 5, i32 addrspace(1)* %out
10 call void asm sideeffect "s_endpgm", ""()
11 ret void
12}
Nicolai Haehnlea61e5a82016-01-06 22:01:04 +000013
14; CHECK: {{^}}inline_asm_shader:
15; CHECK: s_endpgm
16; CHECK: s_endpgm
17define void @inline_asm_shader() #0 {
18entry:
19 call void asm sideeffect "s_endpgm", ""()
20 ret void
21}
22
23attributes #0 = { "ShaderType"="0" }
Tom Stellardbc4497b2016-02-12 23:45:29 +000024
25
26; CHECK: {{^}}branch_on_asm:
27; Make sure inline assembly is treted as divergent.
28; CHECK: s_mov_b32 s{{[0-9]+}}, 0
29; CHECK: s_and_saveexec_b64
30define void @branch_on_asm(i32 addrspace(1)* %out) {
31 %zero = call i32 asm "s_mov_b32 $0, 0", "=s"()
32 %cmp = icmp eq i32 %zero, 0
33 br i1 %cmp, label %if, label %endif
34
35if:
36 store i32 0, i32 addrspace(1)* %out
37 br label %endif
38
39endif:
40 ret void
41}
Tom Stellard9f2e00d2016-03-09 16:02:52 +000042
43; CHECK: {{^}}v_cmp_asm:
44; CHECK: v_mov_b32_e32 [[SRC:v[0-9]+]], s{{[0-9]+}}
45; CHECK: v_cmp_ne_i32_e64 s{{\[}}[[MASK_LO:[0-9]+]]:[[MASK_HI:[0-9]+]]{{\]}}, 0, [[SRC]]
46; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[MASK_LO]]
47; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[MASK_HI]]
48; CHECK: buffer_store_dwordx2 v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
49define void @v_cmp_asm(i64 addrspace(1)* %out, i32 %in) {
50 %sgpr = tail call i64 asm "v_cmp_ne_i32_e64 $0, 0, $1", "=s,v"(i32 %in)
51 store i64 %sgpr, i64 addrspace(1)* %out
52 ret void
53}