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gerrit-public.fairphone.software / toolchain / llvm-project / 6063983c30cb1b789adb7957b5dd5e17d1f5e4d6 / . / compiler-rt / lib / builtins / arm / udivsi3.S
blob: 34bd713fb1f73fe8dc4b8ce808c245463f7876ca [file] [log] [blame]
Joerg Sonnenbergerdde27002014-01-30 18:41:32 +0000[diff] [blame]1/*===-- udivsi3.S - 32-bit unsigned integer divide ------------------------===//
Stephen Canon5abb5c12011-03-18 16:35:02 +0000[diff] [blame]2 *
3 * The LLVM Compiler Infrastructure
4 *
5 * This file is dual licensed under the MIT and the University of Illinois Open
6 * Source Licenses. See LICENSE.TXT for details.
7 *
8 *===----------------------------------------------------------------------===//
9 *
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]10 * This file implements the __udivsi3 (32-bit unsigned integer divide)
11 * function for the ARM 32-bit architecture.
Stephen Canon5abb5c12011-03-18 16:35:02 +0000[diff] [blame]12 *
13 *===----------------------------------------------------------------------===*/
14
15#include "../assembly.h"
16
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]17 .syntax unified
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]18 .text
Saleem Abdulrasool8f2efc32014-06-16 16:36:25 +0000[diff] [blame]19
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +0000[diff] [blame]20#if __ARM_ARCH_ISA_THUMB == 2
21 .thumb
22#endif
23
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]24 .p2align 2
Anton Korobeynikov75e3c192011-04-19 17:51:24 +0000[diff] [blame]25DEFINE_AEABI_FUNCTION_ALIAS(__aeabi_uidiv, __udivsi3)
Stephen Canon5abb5c12011-03-18 16:35:02 +0000[diff] [blame]26DEFINE_COMPILERRT_FUNCTION(__udivsi3)
Stephen Hines7633afc2013-10-25 06:26:44 +0000[diff] [blame]27#if __ARM_ARCH_EXT_IDIV__
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]28 tst r1, r1
29 beq LOCAL_LABEL(divby0)
Saleem Abdulrasool60639832014-08-09 20:17:37 +0000[diff] [blame^]30 udiv r0, r0, r1
Bob Wilsona4cefbd2012-09-29 23:37:01 +0000[diff] [blame]31 bx lr
Bob Wilsona4cefbd2012-09-29 23:37:01 +0000[diff] [blame]32#else
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]33 cmp r1, #1
34 bcc LOCAL_LABEL(divby0)
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +0000[diff] [blame]35 IT(eq)
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]36 JMPc(lr, eq)
37 cmp r0, r1
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +0000[diff] [blame]38 ITT(cc)
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]39 movcc r0, #0
40 JMPc(lr, cc)
41 /*
42 * Implement division using binary long division algorithm.
43 *
44 * r0 is the numerator, r1 the denominator.
45 *
46 * The code before JMP computes the correct shift I, so that
47 * r0 and (r1 << I) have the highest bit set in the same position.
48 * At the time of JMP, ip := .Ldiv0block - 12 * I.
49 * This depends on the fixed instruction size of block.
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +0000[diff] [blame]50 * For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes.
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]51 *
52 * block(shift) implements the test-and-update-quotient core.
53 * It assumes (r0 << shift) can be computed without overflow and
54 * that (r0 << shift) < 2 * r1. The quotient is stored in r3.
55 */
Stephen Canon5abb5c12011-03-18 16:35:02 +0000[diff] [blame]56
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]57# ifdef __ARM_FEATURE_CLZ
58 clz ip, r0
59 clz r3, r1
60 /* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */
61 sub r3, r3, ip
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +0000[diff] [blame]62# if __ARM_ARCH_ISA_THUMB == 2
63 adr ip, LOCAL_LABEL(div0block) + 1
64 sub ip, ip, r3, lsl #1
65# else
Joerg Sonnenberger8f6cf702014-07-20 20:00:26 +0000[diff] [blame]66 adr ip, LOCAL_LABEL(div0block)
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +0000[diff] [blame]67# endif
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]68 sub ip, ip, r3, lsl #2
69 sub ip, ip, r3, lsl #3
70 mov r3, #0
71 bx ip
72# else
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +0000[diff] [blame]73# if __ARM_ARCH_ISA_THUMB == 2
74# error THUMB mode requires CLZ or UDIV
75# endif
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]76 mov r2, r0
Joerg Sonnenberger8f6cf702014-07-20 20:00:26 +0000[diff] [blame]77 adr ip, LOCAL_LABEL(div0block)
Stephen Canon5abb5c12011-03-18 16:35:02 +0000[diff] [blame]78
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]79 lsr r3, r2, #16
80 cmp r3, r1
81 movhs r2, r3
82 subhs ip, ip, #(16 * 12)
Stephen Canon5abb5c12011-03-18 16:35:02 +0000[diff] [blame]83
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]84 lsr r3, r2, #8
85 cmp r3, r1
86 movhs r2, r3
87 subhs ip, ip, #(8 * 12)
88
89 lsr r3, r2, #4
90 cmp r3, r1
91 movhs r2, r3
92 subhs ip, #(4 * 12)
93
94 lsr r3, r2, #2
95 cmp r3, r1
96 movhs r2, r3
97 subhs ip, ip, #(2 * 12)
98
99 /* Last block, no need to update r2 or r3. */
100 cmp r1, r2, lsr #1
101 subls ip, ip, #(1 * 12)
102
103 mov r3, #0
104
105 JMP(ip)
106# endif
107
108#define IMM #
109
Saleem Abdulrasool31306b12014-07-27 02:01:15 +0000[diff] [blame]110#define block(shift) \
111 cmp r0, r1, lsl IMM shift; \
112 ITT(hs); \
Saleem Abdulrasool3a2d6a32014-07-27 02:01:24 +0000[diff] [blame]113 WIDE(addhs) r3, r3, IMM (1 << shift); \
114 WIDE(subhs) r0, r0, r1, lsl IMM shift
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]115
116 block(31)
117 block(30)
118 block(29)
119 block(28)
120 block(27)
121 block(26)
122 block(25)
123 block(24)
124 block(23)
125 block(22)
126 block(21)
127 block(20)
128 block(19)
129 block(18)
130 block(17)
131 block(16)
132 block(15)
133 block(14)
134 block(13)
135 block(12)
136 block(11)
137 block(10)
138 block(9)
139 block(8)
140 block(7)
141 block(6)
142 block(5)
143 block(4)
144 block(3)
145 block(2)
146 block(1)
Joerg Sonnenberger8f6cf702014-07-20 20:00:26 +0000[diff] [blame]147LOCAL_LABEL(div0block):
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]148 block(0)
149
150 mov r0, r3
151 JMP(lr)
152#endif /* __ARM_ARCH_EXT_IDIV__ */
153
154LOCAL_LABEL(divby0):
155 mov r0, #0
156#ifdef __ARM_EABI__
157 b __aeabi_idiv0
158#else
159 JMP(lr)
Bob Wilsona4cefbd2012-09-29 23:37:01 +0000[diff] [blame]160#endif
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000[diff] [blame]161
162END_COMPILERRT_FUNCTION(__udivsi3)