| Robert Lougher | 6da8a24 | 2014-09-22 11:54:38 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -march=x86-64 -mattr=+ssse3 | FileCheck %s |
| 2 | |
| 3 | ; Test that the pshufb mask comment is correct. |
| 4 | |
| 5 | define <16 x i8> @test1(<16 x i8> %V) { |
| 6 | ; CHECK-LABEL: test1: |
| 7 | ; CHECK: pshufb {{.*}} # xmm0 = xmm0[1,0,0,0,0,2,0,0,0,0,3,0,0,0,0,4] |
| 8 | %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 1, i8 0, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 0, i8 4>) |
| 9 | ret <16 x i8> %1 |
| 10 | } |
| 11 | |
| 12 | ; Test that indexes larger than the size of the vector are shown masked (bottom 4 bits). |
| 13 | |
| 14 | define <16 x i8> @test2(<16 x i8> %V) { |
| 15 | ; CHECK-LABEL: test2: |
| 16 | ; CHECK: pshufb {{.*}} # xmm0 = xmm0[15,0,0,0,0,0,0,0,0,0,1,0,0,0,0,2] |
| 17 | %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 15, i8 0, i8 0, i8 0, i8 0, i8 16, i8 0, i8 0, i8 0, i8 0, i8 17, i8 0, i8 0, i8 0, i8 0, i8 50>) |
| 18 | ret <16 x i8> %1 |
| 19 | } |
| 20 | |
| 21 | ; Test that indexes with bit seven set are shown as zero. |
| 22 | |
| 23 | define <16 x i8> @test3(<16 x i8> %V) { |
| 24 | ; CHECK-LABEL: test3: |
| 25 | ; CHECK: pshufb {{.*}} # xmm0 = xmm0[1,0,0,15,0,2,0,0],zero,xmm0[0,3,0,0],zero,xmm0[0,4] |
| 26 | %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 1, i8 0, i8 0, i8 127, i8 0, i8 2, i8 0, i8 0, i8 128, i8 0, i8 3, i8 0, i8 0, i8 255, i8 0, i8 4>) |
| 27 | ret <16 x i8> %1 |
| 28 | } |
| 29 | |
| 30 | declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind readnone |