blob: dbec1c6bf99f7a05ed2a798b6ddd379c7f127ca4 [file] [log] [blame]
Derek Schuffbd7c6e52013-05-14 16:26:38 +00001; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
JF Bastien18db1f22013-06-14 02:49:43 +00002; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
Jim Grosbachd7866792013-08-16 23:37:40 +00003; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
Chad Rosier7ddd63c2011-11-11 06:20:39 +00004
5define i32 @t1(i1 %c) nounwind readnone {
6entry:
7; ARM: t1
8; ARM: movw r{{[1-9]}}, #10
9; ARM: cmp r0, #0
10; ARM: moveq r{{[1-9]}}, #20
11; ARM: mov r0, r{{[1-9]}}
12; THUMB: t1
13; THUMB: movs r{{[1-9]}}, #10
14; THUMB: movt r{{[1-9]}}, #0
15; THUMB: cmp r0, #0
16; THUMB: it eq
17; THUMB: moveq r{{[1-9]}}, #20
18; THUMB: mov r0, r{{[1-9]}}
19 %0 = select i1 %c, i32 10, i32 20
20 ret i32 %0
21}
22
23define i32 @t2(i1 %c, i32 %a) nounwind readnone {
24entry:
25; ARM: t2
26; ARM: cmp r0, #0
27; ARM: moveq r{{[1-9]}}, #20
28; ARM: mov r0, r{{[1-9]}}
29; THUMB: t2
30; THUMB: cmp r0, #0
31; THUMB: it eq
32; THUMB: moveq r{{[1-9]}}, #20
33; THUMB: mov r0, r{{[1-9]}}
34 %0 = select i1 %c, i32 %a, i32 20
35 ret i32 %0
36}
37
38define i32 @t3(i1 %c, i32 %a, i32 %b) nounwind readnone {
39entry:
40; ARM: t3
41; ARM: cmp r0, #0
Jim Grosbach71a78f92013-08-20 19:12:42 +000042; ARM: movne r2, r1
43; ARM: add r0, r2, r1
Chad Rosier7ddd63c2011-11-11 06:20:39 +000044; THUMB: t3
45; THUMB: cmp r0, #0
46; THUMB: it ne
Jim Grosbach71a78f92013-08-20 19:12:42 +000047; THUMB: movne r2, r1
48; THUMB: add.w r0, r2, r1
Chad Rosier7ddd63c2011-11-11 06:20:39 +000049 %0 = select i1 %c, i32 %a, i32 %b
Jim Grosbach71a78f92013-08-20 19:12:42 +000050 %1 = add i32 %0, %a
51 ret i32 %1
Chad Rosier7ddd63c2011-11-11 06:20:39 +000052}
53
54define i32 @t4(i1 %c) nounwind readnone {
55entry:
56; ARM: t4
57; ARM: mvn r{{[1-9]}}, #9
58; ARM: cmp r0, #0
59; ARM: mvneq r{{[1-9]}}, #0
60; ARM: mov r0, r{{[1-9]}}
61; THUMB: t4
62; THUMB: movw r{{[1-9]}}, #65526
63; THUMB: movt r{{[1-9]}}, #65535
64; THUMB: cmp r0, #0
65; THUMB: it eq
66; THUMB: mvneq r{{[1-9]}}, #0
67; THUMB: mov r0, r{{[1-9]}}
68 %0 = select i1 %c, i32 -10, i32 -1
69 ret i32 %0
70}
71
72define i32 @t5(i1 %c, i32 %a) nounwind readnone {
73entry:
74; ARM: t5
75; ARM: cmp r0, #0
76; ARM: mvneq r{{[1-9]}}, #1
77; ARM: mov r0, r{{[1-9]}}
78; THUMB: t5
79; THUMB: cmp r0, #0
80; THUMB: it eq
81; THUMB: mvneq r{{[1-9]}}, #1
82; THUMB: mov r0, r{{[1-9]}}
83 %0 = select i1 %c, i32 %a, i32 -2
84 ret i32 %0
85}
86
87; Check one large negative immediates.
88define i32 @t6(i1 %c, i32 %a) nounwind readnone {
89entry:
90; ARM: t6
91; ARM: cmp r0, #0
92; ARM: mvneq r{{[1-9]}}, #978944
93; ARM: mov r0, r{{[1-9]}}
94; THUMB: t6
95; THUMB: cmp r0, #0
96; THUMB: it eq
97; THUMB: mvneq r{{[1-9]}}, #978944
98; THUMB: mov r0, r{{[1-9]}}
99 %0 = select i1 %c, i32 %a, i32 -978945
100 ret i32 %0
101}