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Dan Gohman81719f82015-11-25 16:55:01 +00001//===-- WebAssemblyStoreResults.cpp - Optimize using store result values --===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// \brief This file implements an optimization pass using store result values.
12///
Dan Gohman391a98a2015-12-03 23:07:03 +000013/// WebAssembly's store instructions return the stored value. This is to enable
14/// an optimization wherein uses of the stored value can be replaced by uses of
15/// the store's result value, making the stored value register more likely to
16/// be single-use, thus more likely to be useful to register stackifying, and
17/// potentially also exposing the store to register stackifying. These both can
18/// reduce get_local/set_local traffic.
Dan Gohman81719f82015-11-25 16:55:01 +000019///
Dan Gohmanbdf08d52016-01-26 04:01:11 +000020/// This pass also performs this optimization for memcpy, memmove, and memset
21/// calls, since the LLVM intrinsics for these return void so they can't use the
22/// returned attribute and consequently aren't handled by the OptimizeReturned
23/// pass.
24///
Dan Gohman81719f82015-11-25 16:55:01 +000025//===----------------------------------------------------------------------===//
26
27#include "WebAssembly.h"
28#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
29#include "WebAssemblyMachineFunctionInfo.h"
30#include "WebAssemblySubtarget.h"
Dan Gohmanbdf08d52016-01-26 04:01:11 +000031#include "llvm/Analysis/TargetLibraryInfo.h"
Dan Gohman81719f82015-11-25 16:55:01 +000032#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
33#include "llvm/CodeGen/MachineDominators.h"
34#include "llvm/CodeGen/MachineRegisterInfo.h"
35#include "llvm/CodeGen/Passes.h"
36#include "llvm/Support/Debug.h"
37#include "llvm/Support/raw_ostream.h"
38using namespace llvm;
39
40#define DEBUG_TYPE "wasm-store-results"
41
42namespace {
43class WebAssemblyStoreResults final : public MachineFunctionPass {
44public:
45 static char ID; // Pass identification, replacement for typeid
46 WebAssemblyStoreResults() : MachineFunctionPass(ID) {}
47
48 const char *getPassName() const override {
49 return "WebAssembly Store Results";
50 }
51
52 void getAnalysisUsage(AnalysisUsage &AU) const override {
53 AU.setPreservesCFG();
54 AU.addRequired<MachineBlockFrequencyInfo>();
55 AU.addPreserved<MachineBlockFrequencyInfo>();
56 AU.addRequired<MachineDominatorTree>();
57 AU.addPreserved<MachineDominatorTree>();
Dan Gohmanbdf08d52016-01-26 04:01:11 +000058 AU.addRequired<TargetLibraryInfoWrapperPass>();
Dan Gohman81719f82015-11-25 16:55:01 +000059 MachineFunctionPass::getAnalysisUsage(AU);
60 }
61
62 bool runOnMachineFunction(MachineFunction &MF) override;
63
64private:
65};
66} // end anonymous namespace
67
68char WebAssemblyStoreResults::ID = 0;
69FunctionPass *llvm::createWebAssemblyStoreResults() {
70 return new WebAssemblyStoreResults();
71}
72
Dan Gohmanbdf08d52016-01-26 04:01:11 +000073// Replace uses of FromReg with ToReg if they are dominated by MI.
74static bool ReplaceDominatedUses(MachineBasicBlock &MBB, MachineInstr &MI,
75 unsigned FromReg, unsigned ToReg,
76 const MachineRegisterInfo &MRI,
77 MachineDominatorTree &MDT) {
78 bool Changed = false;
79 for (auto I = MRI.use_begin(FromReg), E = MRI.use_end(); I != E;) {
80 MachineOperand &O = *I++;
81 MachineInstr *Where = O.getParent();
82 if (Where->getOpcode() == TargetOpcode::PHI) {
83 // PHIs use their operands on their incoming CFG edges rather than
84 // in their parent blocks. Get the basic block paired with this use
85 // of FromReg and check that MI's block dominates it.
86 MachineBasicBlock *Pred =
87 Where->getOperand(&O - &Where->getOperand(0) + 1).getMBB();
88 if (!MDT.dominates(&MBB, Pred))
89 continue;
90 } else {
91 // For a non-PHI, check that MI dominates the instruction in the
92 // normal way.
93 if (&MI == Where || !MDT.dominates(&MI, Where))
94 continue;
95 }
96 Changed = true;
97 DEBUG(dbgs() << "Setting operand " << O << " in " << *Where << " from "
98 << MI << "\n");
99 O.setReg(ToReg);
100 // If the store's def was previously dead, it is no longer. But the
101 // dead flag shouldn't be set yet.
102 assert(!MI.getOperand(0).isDead() && "Unexpected dead flag");
103 }
104 return Changed;
105}
106
JF Bastiena5b8ea0d2016-02-01 10:46:16 +0000107static bool optimizeStore(MachineBasicBlock &MBB, MachineInstr &MI,
108 const MachineRegisterInfo &MRI,
109 MachineDominatorTree &MDT) {
110 const auto &Stored = MI.getOperand(WebAssembly::StoreValueOperandNo);
111 switch (Stored.getType()) {
112 case MachineOperand::MO_Register: {
113 unsigned ToReg = MI.getOperand(0).getReg();
114 unsigned FromReg = Stored.getReg();
115 return ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT);
116 }
117 case MachineOperand::MO_FrameIndex:
118 // TODO: optimize.
119 return false;
120 default:
121 report_fatal_error("Store results: store not consuming reg or frame index");
122 }
123}
124
125static bool optimizeCall(MachineBasicBlock &MBB, MachineInstr &MI,
126 const MachineRegisterInfo &MRI,
127 MachineDominatorTree &MDT,
128 const WebAssemblyTargetLowering &TLI,
129 const TargetLibraryInfo &LibInfo) {
130 MachineOperand &Op1 = MI.getOperand(1);
131 if (!Op1.isSymbol())
132 return false;
133
134 StringRef Name(Op1.getSymbolName());
135 bool callReturnsInput = Name == TLI.getLibcallName(RTLIB::MEMCPY) ||
136 Name == TLI.getLibcallName(RTLIB::MEMMOVE) ||
137 Name == TLI.getLibcallName(RTLIB::MEMSET);
138 if (!callReturnsInput)
139 return false;
140
141 LibFunc::Func Func;
142 if (!LibInfo.getLibFunc(Name, Func))
143 return false;
144
145 const auto &Op2 = MI.getOperand(2);
146 switch (Op2.getType()) {
147 case MachineOperand::MO_Register: {
148 unsigned FromReg = Op2.getReg();
149 unsigned ToReg = MI.getOperand(0).getReg();
150 if (MRI.getRegClass(FromReg) != MRI.getRegClass(ToReg))
151 report_fatal_error("Store results: call to builtin function with wrong "
152 "signature, from/to mismatch");
153 return ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT);
154 }
155 case MachineOperand::MO_FrameIndex:
156 // TODO: optimize.
157 return false;
158 default:
159 report_fatal_error("Store results: call to builtin function with wrong "
160 "signature, not consuming reg or frame index");
161 }
162}
163
Dan Gohman81719f82015-11-25 16:55:01 +0000164bool WebAssemblyStoreResults::runOnMachineFunction(MachineFunction &MF) {
165 DEBUG({
166 dbgs() << "********** Store Results **********\n"
167 << "********** Function: " << MF.getName() << '\n';
168 });
169
170 const MachineRegisterInfo &MRI = MF.getRegInfo();
171 MachineDominatorTree &MDT = getAnalysis<MachineDominatorTree>();
Dan Gohmanbdf08d52016-01-26 04:01:11 +0000172 const WebAssemblyTargetLowering &TLI =
173 *MF.getSubtarget<WebAssemblySubtarget>().getTargetLowering();
JF Bastiena5b8ea0d2016-02-01 10:46:16 +0000174 const auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
Dan Gohmanb949b9c2015-12-10 14:17:36 +0000175 bool Changed = false;
Dan Gohman81719f82015-11-25 16:55:01 +0000176
Dan Gohmand70e5902015-12-08 03:30:42 +0000177 assert(MRI.isSSA() && "StoreResults depends on SSA form");
178
Derek Schuff5268aaf2015-12-03 00:50:30 +0000179 for (auto &MBB : MF) {
180 DEBUG(dbgs() << "Basic Block: " << MBB.getName() << '\n');
Dan Gohman81719f82015-11-25 16:55:01 +0000181 for (auto &MI : MBB)
182 switch (MI.getOpcode()) {
183 default:
184 break;
185 case WebAssembly::STORE8_I32:
186 case WebAssembly::STORE16_I32:
187 case WebAssembly::STORE8_I64:
188 case WebAssembly::STORE16_I64:
189 case WebAssembly::STORE32_I64:
190 case WebAssembly::STORE_F32:
191 case WebAssembly::STORE_F64:
192 case WebAssembly::STORE_I32:
JF Bastiena5b8ea0d2016-02-01 10:46:16 +0000193 case WebAssembly::STORE_I64:
194 Changed |= optimizeStore(MBB, MI, MRI, MDT);
Dan Gohmanbdf08d52016-01-26 04:01:11 +0000195 break;
Dan Gohmanbdf08d52016-01-26 04:01:11 +0000196 case WebAssembly::CALL_I32:
JF Bastiena5b8ea0d2016-02-01 10:46:16 +0000197 case WebAssembly::CALL_I64:
198 Changed |= optimizeCall(MBB, MI, MRI, MDT, TLI, LibInfo);
199 break;
Dan Gohmanbdf08d52016-01-26 04:01:11 +0000200 }
Derek Schuff5268aaf2015-12-03 00:50:30 +0000201 }
Dan Gohman81719f82015-11-25 16:55:01 +0000202
Dan Gohmanb949b9c2015-12-10 14:17:36 +0000203 return Changed;
Dan Gohman81719f82015-11-25 16:55:01 +0000204}