| QingShan Zhang | 7fdb3a29 | 2019-07-02 03:28:52 +0000 | [diff] [blame] | 1 | ; REQUIRES: asserts |
| 2 | ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s |
| 3 | |
| 4 | define i64 @store_disjoint_memory(i64* nocapture %P, i64 %v) { |
| 5 | entry: |
| 6 | ; CHECK: ********** MI Scheduling ********** |
| 7 | ; CHECK-LABEL: store_disjoint_memory:%bb.0 |
| 8 | ; CHECK:SU(2): STD renamable $x4, 24, renamable $x5 :: (store 8 into %ir.arrayidx) |
| 9 | ; CHECK-NOT: Successors: |
| 10 | ; CHECK-NOT: SU(3): Ord Latency=0 Memory |
| 11 | ; CHECK:SU(3): STD renamable $x4, 16, renamable $x5 :: (store 8 into %ir.arrayidx1) |
| 12 | ; CHECK: Predecessors: |
| 13 | ; CHECK-NOT: SU(2): Ord Latency=0 Memory |
| 14 | %arrayidx = getelementptr inbounds i64, i64* %P, i64 3 |
| 15 | store i64 %v, i64* %arrayidx |
| 16 | %arrayidx1 = getelementptr inbounds i64, i64* %P, i64 2 |
| 17 | store i64 %v, i64* %arrayidx1 |
| 18 | ret i64 %v |
| 19 | } |