Mehdi Amini | 945a660 | 2015-02-27 18:32:11 +0000 | [diff] [blame] | 1 | ; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 2 | |
| 3 | define void @t0(i32 %a) nounwind { |
| 4 | entry: |
| 5 | ; CHECK: t0 |
| 6 | ; CHECK: str {{w[0-9]+}}, [sp, #12] |
| 7 | ; CHECK-NEXT: ldr [[REGISTER:w[0-9]+]], [sp, #12] |
| 8 | ; CHECK-NEXT: str [[REGISTER]], [sp, #12] |
| 9 | ; CHECK: ret |
| 10 | %a.addr = alloca i32, align 4 |
| 11 | store i32 %a, i32* %a.addr |
| 12 | %tmp = load i32* %a.addr |
| 13 | store i32 %tmp, i32* %a.addr |
| 14 | ret void |
| 15 | } |
| 16 | |
| 17 | define void @t1(i64 %a) nounwind { |
| 18 | ; CHECK: t1 |
| 19 | ; CHECK: str {{x[0-9]+}}, [sp, #8] |
| 20 | ; CHECK-NEXT: ldr [[REGISTER:x[0-9]+]], [sp, #8] |
| 21 | ; CHECK-NEXT: str [[REGISTER]], [sp, #8] |
| 22 | ; CHECK: ret |
| 23 | %a.addr = alloca i64, align 4 |
| 24 | store i64 %a, i64* %a.addr |
| 25 | %tmp = load i64* %a.addr |
| 26 | store i64 %tmp, i64* %a.addr |
| 27 | ret void |
| 28 | } |
| 29 | |
| 30 | define zeroext i1 @i1(i1 %a) nounwind { |
| 31 | entry: |
| 32 | ; CHECK: @i1 |
| 33 | ; CHECK: and w0, w0, #0x1 |
| 34 | ; CHECK: strb w0, [sp, #15] |
| 35 | ; CHECK: ldrb w0, [sp, #15] |
| 36 | ; CHECK: and w0, w0, #0x1 |
| 37 | ; CHECK: and w0, w0, #0x1 |
| 38 | ; CHECK: add sp, sp, #16 |
| 39 | ; CHECK: ret |
| 40 | %a.addr = alloca i1, align 1 |
| 41 | store i1 %a, i1* %a.addr, align 1 |
| 42 | %0 = load i1* %a.addr, align 1 |
| 43 | ret i1 %0 |
| 44 | } |
| 45 | |
| 46 | define i32 @t2(i32 *%ptr) nounwind { |
| 47 | entry: |
| 48 | ; CHECK-LABEL: t2: |
| 49 | ; CHECK: ldur w0, [x0, #-4] |
| 50 | ; CHECK: ret |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 51 | %0 = getelementptr i32, i32 *%ptr, i32 -1 |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 52 | %1 = load i32* %0, align 4 |
| 53 | ret i32 %1 |
| 54 | } |
| 55 | |
| 56 | define i32 @t3(i32 *%ptr) nounwind { |
| 57 | entry: |
| 58 | ; CHECK-LABEL: t3: |
| 59 | ; CHECK: ldur w0, [x0, #-256] |
| 60 | ; CHECK: ret |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 61 | %0 = getelementptr i32, i32 *%ptr, i32 -64 |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 62 | %1 = load i32* %0, align 4 |
| 63 | ret i32 %1 |
| 64 | } |
| 65 | |
| 66 | define void @t4(i32 *%ptr) nounwind { |
| 67 | entry: |
| 68 | ; CHECK-LABEL: t4: |
Juergen Ributzka | 100a9b7 | 2014-08-27 21:04:52 +0000 | [diff] [blame] | 69 | ; CHECK: stur wzr, [x0, #-4] |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 70 | ; CHECK: ret |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 71 | %0 = getelementptr i32, i32 *%ptr, i32 -1 |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 72 | store i32 0, i32* %0, align 4 |
| 73 | ret void |
| 74 | } |
| 75 | |
| 76 | define void @t5(i32 *%ptr) nounwind { |
| 77 | entry: |
| 78 | ; CHECK-LABEL: t5: |
Juergen Ributzka | 100a9b7 | 2014-08-27 21:04:52 +0000 | [diff] [blame] | 79 | ; CHECK: stur wzr, [x0, #-256] |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 80 | ; CHECK: ret |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 81 | %0 = getelementptr i32, i32 *%ptr, i32 -64 |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 82 | store i32 0, i32* %0, align 4 |
| 83 | ret void |
| 84 | } |
| 85 | |
| 86 | define void @t6() nounwind { |
| 87 | ; CHECK: t6 |
Tim Northover | 4b2f8a9 | 2014-04-30 11:19:28 +0000 | [diff] [blame] | 88 | ; CHECK: brk #0x1 |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 89 | tail call void @llvm.trap() |
| 90 | ret void |
| 91 | } |
| 92 | |
| 93 | declare void @llvm.trap() nounwind |