blob: dc5052d043ae983eccfd3e80dceeaaf0504db855 [file] [log] [blame]
Adam Nemetff63a2d2014-10-03 20:00:34 +00001; RUN: llc < %s | FileCheck %s
2
3; This testcase used to hit an assert during ISel. For details, see the big
4; comment inside the function.
5
6; CHECK-LABEL: foo:
7; The AND should be turned into a subreg access.
8; CHECK-NOT: and
9; The shift (leal) should be folded into the scale of the address in the load.
10; CHECK-NOT: leal
11; CHECK: movl {{.*}},4),
12
13target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
14target triple = "i386-apple-macosx10.6.0"
15
16define void @foo(i32 %a) {
17bb:
18 br label %bb1692
19
20bb1692:
21 %tmp1694 = phi i32 [ 0, %bb ], [ %tmp1745, %bb1692 ]
22 %xor = xor i32 0, %tmp1694
23
24; %load1 = (load (and (shl %xor, 2), 1020))
25 %tmp1701 = shl i32 %xor, 2
26 %tmp1702 = and i32 %tmp1701, 1020
David Blaikie79e6c742015-02-27 19:29:02 +000027 %tmp1703 = getelementptr inbounds [1028 x i8], [1028 x i8]* null, i32 0, i32 %tmp1702
Adam Nemetff63a2d2014-10-03 20:00:34 +000028 %tmp1704 = bitcast i8* %tmp1703 to i32*
29 %load1 = load i32* %tmp1704, align 4
30
31; %load2 = (load (shl (and %xor, 255), 2))
32 %tmp1698 = and i32 %xor, 255
33 %tmp1706 = shl i32 %tmp1698, 2
David Blaikie79e6c742015-02-27 19:29:02 +000034 %tmp1707 = getelementptr inbounds [1028 x i8], [1028 x i8]* null, i32 0, i32 %tmp1706
Adam Nemetff63a2d2014-10-03 20:00:34 +000035 %tmp1708 = bitcast i8* %tmp1707 to i32*
36 %load2 = load i32* %tmp1708, align 4
37
38 %tmp1710 = or i32 %load2, %a
39
40; While matching xor we address-match %load1. The and-of-shift reassocication
41; in address matching transform this into into a shift-of-and and the resuting
42; node becomes identical to %load2. CSE replaces %load1 which leaves its
43; references in MatchScope and RecordedNodes stale.
44 %tmp1711 = xor i32 %load1, %tmp1710
45
David Blaikie79e6c742015-02-27 19:29:02 +000046 %tmp1744 = getelementptr inbounds [256 x i32], [256 x i32]* null, i32 0, i32 %tmp1711
Adam Nemetff63a2d2014-10-03 20:00:34 +000047 store i32 0, i32* %tmp1744, align 4
48 %tmp1745 = add i32 %tmp1694, 1
49 indirectbr i8* undef, [label %bb1756, label %bb1692]
50
51bb1756:
52 br label %bb2705
53
54bb2705:
55 indirectbr i8* undef, [label %bb5721, label %bb5736]
56
57bb5721:
58 br label %bb2705
59
60bb5736:
61 ret void
62}