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gerrit-public.fairphone.software / toolchain / llvm-project / e83876e31d9da26c9e0c11cf7463e4a645e96bc4 / . / llvm / lib / Target / Hexagon / HexagonDepIICHVX.td
blob: 1c1788264c66eed4f7d06b17d68e71836de82328 [file] [log] [blame]
Krzysztof Parzyszek2af50372017-05-03 20:10:36 +0000[diff] [blame]1//===--- HexagonDepIICHVX.td ----------------------------------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10def tc_0317c6ca : InstrItinClass;
11def tc_1b93bdc6 : InstrItinClass;
12def tc_2171ebae : InstrItinClass;
13def tc_28978789 : InstrItinClass;
14def tc_316c637c : InstrItinClass;
15def tc_354299ad : InstrItinClass;
16def tc_35e92f8e : InstrItinClass;
17def tc_38208312 : InstrItinClass;
18def tc_4105d6b5 : InstrItinClass;
19def tc_41f4b64e : InstrItinClass;
20def tc_41f99e1c : InstrItinClass;
21def tc_45453b98 : InstrItinClass;
22def tc_4e2a5159 : InstrItinClass;
23def tc_4fd8566e : InstrItinClass;
24def tc_51cd3aab : InstrItinClass;
25def tc_5a9fc4ec : InstrItinClass;
26def tc_5c120602 : InstrItinClass;
27def tc_5cbf490b : InstrItinClass;
28def tc_644584f8 : InstrItinClass;
29def tc_69b6dd20 : InstrItinClass;
30def tc_6b78cf13 : InstrItinClass;
31def tc_6fd9ad30 : InstrItinClass;
32def tc_71337255 : InstrItinClass;
33def tc_72ad7b54 : InstrItinClass;
34def tc_77a4c701 : InstrItinClass;
35def tc_7c3f55c4 : InstrItinClass;
36def tc_7e9f581b : InstrItinClass;
37def tc_7fa82b08 : InstrItinClass;
38def tc_7fa8b40f : InstrItinClass;
39def tc_85d237e3 : InstrItinClass;
40def tc_8b6a873f : InstrItinClass;
41def tc_908a4c8c : InstrItinClass;
42def tc_9311da3f : InstrItinClass;
43def tc_9777e6bf : InstrItinClass;
44def tc_97c165b9 : InstrItinClass;
45def tc_99093773 : InstrItinClass;
46def tc_9b9642a1 : InstrItinClass;
47def tc_9c267309 : InstrItinClass;
48def tc_a3127e12 : InstrItinClass;
49def tc_a4c9df3b : InstrItinClass;
50def tc_aedb9f9e : InstrItinClass;
51def tc_b06ab583 : InstrItinClass;
52def tc_b712833a : InstrItinClass;
53def tc_b77635b4 : InstrItinClass;
54def tc_bbaf280e : InstrItinClass;
55def tc_bf142ae2 : InstrItinClass;
56def tc_c00bf9c9 : InstrItinClass;
57def tc_c4b515c5 : InstrItinClass;
58def tc_cbf6d1dc : InstrItinClass;
59def tc_cedf314b : InstrItinClass;
60def tc_d2cb81ea : InstrItinClass;
61def tc_d5090f3e : InstrItinClass;
62def tc_d642eff3 : InstrItinClass;
63def tc_d725e5b0 : InstrItinClass;
64def tc_d7bea0ec : InstrItinClass;
65def tc_d98f4d63 : InstrItinClass;
66def tc_da979fb3 : InstrItinClass;
67def tc_db5b9e2f : InstrItinClass;
68def tc_e172d86a : InstrItinClass;
69def tc_e231aa4f : InstrItinClass;
70def tc_e3748cdf : InstrItinClass;
71def tc_e5053c8f : InstrItinClass;
72def tc_e6299d16 : InstrItinClass;
73def tc_eb669007 : InstrItinClass;
74def tc_eda67dcd : InstrItinClass;
75def tc_f3fc3f83 : InstrItinClass;
76
77class DepHVXItinV55 {
78 list<InstrItinData> DepHVXItinV55_list = [
79 InstrItinData <tc_0317c6ca, /*SLOT0,STORE,VA*/
80 [InstrStage<1, [SLOT0], 0>,
81 InstrStage<1, [CVI_ST], 0>,
82 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [3, 2, 1, 2, 7],
83 [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
84
85 InstrItinData <tc_1b93bdc6, /*SLOT0,STORE*/
86 [InstrStage<1, [SLOT0], 0>,
87 InstrStage<1, [CVI_ST]>], [1, 2, 5],
88 [Hex_FWD, Hex_FWD, HVX_FWD]>,
89
90 InstrItinData <tc_2171ebae, /*SLOT0123,VA_DV*/
91 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
92 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 2, 7, 7],
93 [HVX_FWD, Hex_FWD, HVX_FWD, HVX_FWD]>,
94
95 InstrItinData <tc_28978789, /*SLOT0123,4SLOT*/
96 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
97 InstrStage<1, [CVI_ALL]>], [3, 2],
98 [HVX_FWD, Hex_FWD]>,
99
100 InstrItinData <tc_316c637c, /*SLOT0123,VA_DV*/
101 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
102 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 7, 7, 7],
103 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
104
105 InstrItinData <tc_354299ad, /*SLOT0,NOSLOT1,STORE,VP*/
106 [InstrStage<1, [SLOT0], 0>,
107 InstrStage<1, [SLOT1], 0>,
108 InstrStage<1, [CVI_ST], 0>,
109 InstrStage<1, [CVI_XLANE]>], [1, 2, 5],
110 [Hex_FWD, Hex_FWD, HVX_FWD]>,
111
112 InstrItinData <tc_35e92f8e, /*SLOT0,NOSLOT1,LOAD,VP*/
113 [InstrStage<1, [SLOT0], 0>,
114 InstrStage<1, [SLOT1], 0>,
115 InstrStage<1, [CVI_LD], 0>,
116 InstrStage<1, [CVI_XLANE]>], [9, 1, 2],
117 [HVX_FWD, Hex_FWD, Hex_FWD]>,
118
119 InstrItinData <tc_38208312, /*SLOT01,LOAD*/
120 [InstrStage<1, [SLOT0, SLOT1], 0>,
121 InstrStage<1, [CVI_LD]>], [9, 3, 2, 1, 2],
122 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
123
124 InstrItinData <tc_4105d6b5, /*SLOT0123,VP*/
125 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
126 InstrStage<1, [CVI_XLANE]>], [9, 2],
127 [HVX_FWD, Hex_FWD]>,
128
129 InstrItinData <tc_41f4b64e, /*SLOT0123,VS*/
130 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
131 InstrStage<1, [CVI_SHIFT]>], [9, 5, 2],
132 [HVX_FWD, HVX_FWD, Hex_FWD]>,
133
134 InstrItinData <tc_41f99e1c, /*SLOT23,VX_DV*/
135 [InstrStage<1, [SLOT2, SLOT3], 0>,
136 InstrStage<1, [CVI_MPY01]>], [9, 7, 5, 2, 2],
137 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD, Hex_FWD]>,
138
139 InstrItinData <tc_45453b98, /*SLOT0123,VS*/
140 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
141 InstrStage<1, [CVI_SHIFT]>], [9, 5, 5],
142 [HVX_FWD, HVX_FWD, HVX_FWD]>,
143
144 InstrItinData <tc_4e2a5159, /*SLOT0123,VP_VS*/
145 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
146 InstrStage<1, [CVI_XLSHF]>], [9, 5, 5, 2],
147 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
148
149 InstrItinData <tc_4fd8566e, /*SLOT0,NOSLOT1,LOAD,VP*/
150 [InstrStage<1, [SLOT0], 0>,
151 InstrStage<1, [SLOT1], 0>,
152 InstrStage<1, [CVI_LD], 0>,
153 InstrStage<1, [CVI_XLANE]>], [9, 3, 1, 2],
154 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
155
156 InstrItinData <tc_51cd3aab, /*SLOT01,LOAD*/
157 [InstrStage<1, [SLOT0, SLOT1], 0>,
158 InstrStage<1, [CVI_LD]>], [9, 2, 1, 2],
159 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
160
161 InstrItinData <tc_5a9fc4ec, /*SLOT0123,VA*/
162 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
163 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 9, 7, 7, 7],
164 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
165
166 InstrItinData <tc_5c120602, /*SLOT0123,VP_VS*/
167 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
168 InstrStage<1, [CVI_XLSHF]>], [9, 9, 5, 5, 2],
169 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
170
171 InstrItinData <tc_5cbf490b, /*SLOT01,LOAD,VA*/
172 [InstrStage<1, [SLOT0, SLOT1], 0>,
173 InstrStage<1, [CVI_LD], 0>,
174 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 2, 1, 2],
175 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
176
177 InstrItinData <tc_644584f8, /*SLOT0123,VA_DV*/
178 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
179 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 7],
180 [HVX_FWD, HVX_FWD]>,
181
182 InstrItinData <tc_69b6dd20, /*SLOT23,VX*/
183 [InstrStage<1, [SLOT2, SLOT3], 0>,
184 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 5, 2],
185 [HVX_FWD, HVX_FWD, Hex_FWD]>,
186
187 InstrItinData <tc_6b78cf13, /*SLOT23,VX*/
188 [InstrStage<1, [SLOT2, SLOT3], 0>,
189 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 2],
190 [HVX_FWD, Hex_FWD]>,
191
192 InstrItinData <tc_6fd9ad30, /*SLOT0,NOSLOT1,STORE,VP*/
193 [InstrStage<1, [SLOT0], 0>,
194 InstrStage<1, [SLOT1], 0>,
195 InstrStage<1, [CVI_ST], 0>,
196 InstrStage<1, [CVI_XLANE]>], [3, 2, 1, 2, 5],
197 [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
198
199 InstrItinData <tc_71337255, /*SLOT0123,VA*/
200 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
201 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 7],
202 [HVX_FWD, HVX_FWD]>,
203
204 InstrItinData <tc_72ad7b54, /*SLOT0123,VP_VS*/
205 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
206 InstrStage<1, [CVI_XLSHF]>], [9, 7, 5],
207 [HVX_FWD, HVX_FWD, HVX_FWD]>,
208
209 InstrItinData <tc_77a4c701, /*SLOT01,LOAD*/
210 [InstrStage<1, [SLOT0, SLOT1], 0>,
211 InstrStage<1, [CVI_LD]>], [9, 1, 2],
212 [HVX_FWD, Hex_FWD, Hex_FWD]>,
213
214 InstrItinData <tc_7c3f55c4, /*SLOT23,VX_DV*/
215 [InstrStage<1, [SLOT2, SLOT3], 0>,
216 InstrStage<1, [CVI_MPY01]>], [9, 5, 2],
217 [HVX_FWD, HVX_FWD, Hex_FWD]>,
218
219 InstrItinData <tc_7e9f581b, /*SLOT23,VX_DV*/
220 [InstrStage<1, [SLOT2, SLOT3], 0>,
221 InstrStage<1, [CVI_MPY01]>], [9, 5, 2, 2],
222 [HVX_FWD, HVX_FWD, Hex_FWD, Hex_FWD]>,
223
224 InstrItinData <tc_7fa82b08, /*SLOT0,NOSLOT1,STORE,VP*/
225 [InstrStage<1, [SLOT0], 0>,
226 InstrStage<1, [SLOT1], 0>,
227 InstrStage<1, [CVI_ST], 0>,
228 InstrStage<1, [CVI_XLANE]>], [3, 1, 2, 5],
229 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
230
231 InstrItinData <tc_7fa8b40f, /*SLOT0123,VS*/
232 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
233 InstrStage<1, [CVI_SHIFT]>], [9, 5, 5, 2],
234 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
235
236 InstrItinData <tc_85d237e3, /*SLOT0,STORE,VA*/
237 [InstrStage<1, [SLOT0], 0>,
238 InstrStage<1, [CVI_ST], 0>,
239 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [2, 1, 2, 7],
240 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
241
242 InstrItinData <tc_8b6a873f, /*SLOT0,STORE*/
243 [InstrStage<1, [SLOT0], 0>,
244 InstrStage<1, [CVI_ST]>], [3, 2, 1, 2, 5],
245 [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
246
247 InstrItinData <tc_908a4c8c, /*SLOT23,VX*/
248 [InstrStage<1, [SLOT2, SLOT3], 0>,
249 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 5, 5],
250 [HVX_FWD, HVX_FWD, HVX_FWD]>,
251
252 InstrItinData <tc_9311da3f, /*SLOT23,VX*/
253 [InstrStage<1, [SLOT2, SLOT3], 0>,
254 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 7, 7, 2],
255 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
256
257 InstrItinData <tc_9777e6bf, /*SLOT0,VA*/
258 [InstrStage<1, [SLOT0], 0>,
259 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [4, 7, 1],
260 [Hex_FWD, HVX_FWD, Hex_FWD]>,
261
262 InstrItinData <tc_97c165b9, /*SLOT0123,VA_DV*/
263 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
264 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 7, 7],
265 [HVX_FWD, HVX_FWD, HVX_FWD]>,
266
267 InstrItinData <tc_99093773, /*SLOT0,STORE,VA*/
268 [InstrStage<1, [SLOT0], 0>,
269 InstrStage<1, [CVI_ST], 0>,
270 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [3, 7, 1, 2, 7],
271 [Hex_FWD, HVX_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
272
273 InstrItinData <tc_9b9642a1, /*SLOT0123,VS*/
274 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
275 InstrStage<1, [CVI_SHIFT]>], [9, 5, 5],
276 [HVX_FWD, HVX_FWD, HVX_FWD]>,
277
278 InstrItinData <tc_9c267309, /*SLOT01,LOAD*/
279 [InstrStage<1, [SLOT0, SLOT1], 0>,
280 InstrStage<1, [CVI_LD]>], [9, 3, 1, 2],
281 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
282
283 InstrItinData <tc_a3127e12, /*SLOT0123,VA*/
284 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
285 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 7, 7, 7],
286 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
287
288 InstrItinData <tc_a4c9df3b, /*SLOT0,STORE,VA*/
289 [InstrStage<1, [SLOT0], 0>,
290 InstrStage<1, [CVI_ST], 0>,
291 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [3, 1, 2, 7],
292 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
293
294 InstrItinData <tc_aedb9f9e, /*SLOT0,STORE,VA*/
295 [InstrStage<1, [SLOT0], 0>,
296 InstrStage<1, [CVI_ST], 0>,
297 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [7, 1, 2, 7],
298 [HVX_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
299
300 InstrItinData <tc_b06ab583, /*SLOT0123,VA*/
301 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
302 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 2, 7],
303 [HVX_FWD, Hex_FWD, HVX_FWD]>,
304
305 InstrItinData <tc_b712833a, /*SLOT01,LOAD,VA*/
306 [InstrStage<1, [SLOT0, SLOT1], 0>,
307 InstrStage<1, [CVI_LD], 0>,
308 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 1, 2],
309 [HVX_FWD, Hex_FWD, Hex_FWD]>,
310
311 InstrItinData <tc_b77635b4, /*SLOT0123,4SLOT*/
312 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
313 InstrStage<1, [CVI_ALL]>], [2],
314 [Hex_FWD]>,
315
316 InstrItinData <tc_bbaf280e, /*SLOT0123,VA*/
317 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
318 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 7, 7],
319 [HVX_FWD, HVX_FWD, HVX_FWD]>,
320
321 InstrItinData <tc_bf142ae2, /*SLOT0123,VP*/
322 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
323 InstrStage<1, [CVI_XLANE]>], [9, 5, 2],
324 [HVX_FWD, HVX_FWD, Hex_FWD]>,
325
326 InstrItinData <tc_c00bf9c9, /*SLOT0123,VS*/
327 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
328 InstrStage<1, [CVI_SHIFT]>], [9, 7, 5, 2],
329 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
330
331 InstrItinData <tc_c4b515c5, /*SLOT0123,VP*/
332 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
333 InstrStage<1, [CVI_XLANE]>], [9, 5, 5, 2],
334 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
335
336 InstrItinData <tc_cbf6d1dc, /*SLOT0123,VP_VS*/
337 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
338 InstrStage<1, [CVI_XLSHF]>], [9, 7, 5, 5, 2],
339 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
340
341 InstrItinData <tc_cedf314b, /*SLOT0123,4SLOT*/
342 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
343 InstrStage<1, [CVI_ALL]>], [3],
344 [HVX_FWD]>,
345
346 InstrItinData <tc_d2cb81ea, /*SLOT0123,VS*/
347 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
348 InstrStage<1, [CVI_SHIFT]>], [9, 5],
349 [HVX_FWD, HVX_FWD]>,
350
351 InstrItinData <tc_d5090f3e, /*SLOT0,STORE*/
352 [InstrStage<1, [SLOT0], 0>,
353 InstrStage<1, [CVI_ST]>], [2, 1, 2, 5],
354 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
355
356 InstrItinData <tc_d642eff3, /*SLOT0,NOSLOT1,STORE,VP*/
357 [InstrStage<1, [SLOT0], 0>,
358 InstrStage<1, [SLOT1], 0>,
359 InstrStage<1, [CVI_ST], 0>,
360 InstrStage<1, [CVI_XLANE]>], [2, 1, 2, 5],
361 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
362
363 InstrItinData <tc_d725e5b0, /*SLOT23,VX*/
364 [InstrStage<1, [SLOT2, SLOT3], 0>,
365 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 7, 5, 2],
366 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
367
368 InstrItinData <tc_d7bea0ec, /*SLOT0123,VP_VS*/
369 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
370 InstrStage<1, [CVI_XLSHF]>], [9, 5],
371 [HVX_FWD, HVX_FWD]>,
372
373 InstrItinData <tc_d98f4d63, /*SLOT23,VX_DV*/
374 [InstrStage<1, [SLOT2, SLOT3], 0>,
375 InstrStage<1, [CVI_MPY01]>], [9, 7, 5, 2],
376 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
377
378 InstrItinData <tc_da979fb3, /*SLOT01,LOAD,VA*/
379 [InstrStage<1, [SLOT0, SLOT1], 0>,
380 InstrStage<1, [CVI_LD], 0>,
381 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 3, 2, 1, 2],
382 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
383
384 InstrItinData <tc_db5b9e2f, /*SLOT0,STORE*/
385 [InstrStage<1, [SLOT0], 0>,
386 InstrStage<1, [CVI_ST]>], [3, 1, 2, 5],
387 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
388
389 InstrItinData <tc_e172d86a, /*SLOT23,VX_DV*/
390 [InstrStage<1, [SLOT2, SLOT3], 0>,
391 InstrStage<1, [CVI_MPY01]>], [9, 7, 5, 5],
392 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
393
394 InstrItinData <tc_e231aa4f, /*SLOT23,VX*/
395 [InstrStage<1, [SLOT2, SLOT3], 0>,
396 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 7, 2],
397 [HVX_FWD, HVX_FWD, Hex_FWD]>,
398
399 InstrItinData <tc_e3748cdf, /*SLOT0,STORE,VA*/
400 [InstrStage<1, [SLOT0], 0>,
401 InstrStage<1, [CVI_ST], 0>,
402 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [1, 2, 7],
403 [Hex_FWD, Hex_FWD, HVX_FWD]>,
404
405 InstrItinData <tc_e5053c8f, /*SLOT0123,4SLOT*/
406 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
407 InstrStage<1, [CVI_ALL]>], [],
408 []>,
409
410 InstrItinData <tc_e6299d16, /*SLOT0123,VP*/
411 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
412 InstrStage<1, [CVI_XLANE]>], [9, 5],
413 [HVX_FWD, HVX_FWD]>,
414
415 InstrItinData <tc_eb669007, /*SLOT01,LOAD,VA*/
416 [InstrStage<1, [SLOT0, SLOT1], 0>,
417 InstrStage<1, [CVI_LD], 0>,
418 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 3, 1, 2],
419 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
420
421 InstrItinData <tc_eda67dcd, /*SLOT23,VX_DV*/
422 [InstrStage<1, [SLOT2, SLOT3], 0>,
423 InstrStage<1, [CVI_MPY01]>], [9, 5, 5],
424 [HVX_FWD, HVX_FWD, HVX_FWD]>,
425
426 InstrItinData <tc_f3fc3f83, /*SLOT0123,VP*/
427 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
428 InstrStage<1, [CVI_XLANE]>], [9, 5, 5],
429 [HVX_FWD, HVX_FWD, HVX_FWD]>
430 ];
431}
432
433class DepHVXItinV60 {
434 list<InstrItinData> DepHVXItinV60_list = [
435 InstrItinData <tc_0317c6ca, /*SLOT0,STORE,VA*/
436 [InstrStage<1, [SLOT0], 0>,
437 InstrStage<1, [CVI_ST], 0>,
438 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [3, 2, 1, 2, 7],
439 [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
440
441 InstrItinData <tc_1b93bdc6, /*SLOT0,STORE*/
442 [InstrStage<1, [SLOT0], 0>,
443 InstrStage<1, [CVI_ST]>], [1, 2, 5],
444 [Hex_FWD, Hex_FWD, HVX_FWD]>,
445
446 InstrItinData <tc_2171ebae, /*SLOT0123,VA_DV*/
447 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
448 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 2, 7, 7],
449 [HVX_FWD, Hex_FWD, HVX_FWD, HVX_FWD]>,
450
451 InstrItinData <tc_28978789, /*SLOT0123,4SLOT*/
452 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
453 InstrStage<1, [CVI_ALL]>], [3, 2],
454 [HVX_FWD, Hex_FWD]>,
455
456 InstrItinData <tc_316c637c, /*SLOT0123,VA_DV*/
457 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
458 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 7, 7, 7],
459 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
460
461 InstrItinData <tc_354299ad, /*SLOT0,NOSLOT1,STORE,VP*/
462 [InstrStage<1, [SLOT0], 0>,
463 InstrStage<1, [SLOT1], 0>,
464 InstrStage<1, [CVI_ST], 0>,
465 InstrStage<1, [CVI_XLANE]>], [1, 2, 5],
466 [Hex_FWD, Hex_FWD, HVX_FWD]>,
467
468 InstrItinData <tc_35e92f8e, /*SLOT0,NOSLOT1,LOAD,VP*/
469 [InstrStage<1, [SLOT0], 0>,
470 InstrStage<1, [SLOT1], 0>,
471 InstrStage<1, [CVI_LD], 0>,
472 InstrStage<1, [CVI_XLANE]>], [9, 1, 2],
473 [HVX_FWD, Hex_FWD, Hex_FWD]>,
474
475 InstrItinData <tc_38208312, /*SLOT01,LOAD*/
476 [InstrStage<1, [SLOT0, SLOT1], 0>,
477 InstrStage<1, [CVI_LD]>], [9, 3, 2, 1, 2],
478 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
479
480 InstrItinData <tc_4105d6b5, /*SLOT0123,VP*/
481 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
482 InstrStage<1, [CVI_XLANE]>], [9, 2],
483 [HVX_FWD, Hex_FWD]>,
484
485 InstrItinData <tc_41f4b64e, /*SLOT0123,VS*/
486 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
487 InstrStage<1, [CVI_SHIFT]>], [9, 5, 2],
488 [HVX_FWD, HVX_FWD, Hex_FWD]>,
489
490 InstrItinData <tc_41f99e1c, /*SLOT23,VX_DV*/
491 [InstrStage<1, [SLOT2, SLOT3], 0>,
492 InstrStage<1, [CVI_MPY01]>], [9, 7, 5, 2, 2],
493 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD, Hex_FWD]>,
494
495 InstrItinData <tc_45453b98, /*SLOT0123,VS*/
496 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
497 InstrStage<1, [CVI_SHIFT]>], [9, 5, 5],
498 [HVX_FWD, HVX_FWD, HVX_FWD]>,
499
500 InstrItinData <tc_4e2a5159, /*SLOT0123,VP_VS*/
501 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
502 InstrStage<1, [CVI_XLSHF]>], [9, 5, 5, 2],
503 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
504
505 InstrItinData <tc_4fd8566e, /*SLOT0,NOSLOT1,LOAD,VP*/
506 [InstrStage<1, [SLOT0], 0>,
507 InstrStage<1, [SLOT1], 0>,
508 InstrStage<1, [CVI_LD], 0>,
509 InstrStage<1, [CVI_XLANE]>], [9, 3, 1, 2],
510 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
511
512 InstrItinData <tc_51cd3aab, /*SLOT01,LOAD*/
513 [InstrStage<1, [SLOT0, SLOT1], 0>,
514 InstrStage<1, [CVI_LD]>], [9, 2, 1, 2],
515 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
516
517 InstrItinData <tc_5a9fc4ec, /*SLOT0123,VA*/
518 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
519 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 9, 7, 7, 7],
520 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
521
522 InstrItinData <tc_5c120602, /*SLOT0123,VP_VS*/
523 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
524 InstrStage<1, [CVI_XLSHF]>], [9, 9, 5, 5, 2],
525 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
526
527 InstrItinData <tc_5cbf490b, /*SLOT01,LOAD,VA*/
528 [InstrStage<1, [SLOT0, SLOT1], 0>,
529 InstrStage<1, [CVI_LD], 0>,
530 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 2, 1, 2],
531 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
532
533 InstrItinData <tc_644584f8, /*SLOT0123,VA_DV*/
534 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
535 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 7],
536 [HVX_FWD, HVX_FWD]>,
537
538 InstrItinData <tc_69b6dd20, /*SLOT23,VX*/
539 [InstrStage<1, [SLOT2, SLOT3], 0>,
540 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 5, 2],
541 [HVX_FWD, HVX_FWD, Hex_FWD]>,
542
543 InstrItinData <tc_6b78cf13, /*SLOT23,VX*/
544 [InstrStage<1, [SLOT2, SLOT3], 0>,
545 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 2],
546 [HVX_FWD, Hex_FWD]>,
547
548 InstrItinData <tc_6fd9ad30, /*SLOT0,NOSLOT1,STORE,VP*/
549 [InstrStage<1, [SLOT0], 0>,
550 InstrStage<1, [SLOT1], 0>,
551 InstrStage<1, [CVI_ST], 0>,
552 InstrStage<1, [CVI_XLANE]>], [3, 2, 1, 2, 5],
553 [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
554
555 InstrItinData <tc_71337255, /*SLOT0123,VA*/
556 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
557 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 7],
558 [HVX_FWD, HVX_FWD]>,
559
560 InstrItinData <tc_72ad7b54, /*SLOT0123,VP_VS*/
561 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
562 InstrStage<1, [CVI_XLSHF]>], [9, 7, 5],
563 [HVX_FWD, HVX_FWD, HVX_FWD]>,
564
565 InstrItinData <tc_77a4c701, /*SLOT01,LOAD*/
566 [InstrStage<1, [SLOT0, SLOT1], 0>,
567 InstrStage<1, [CVI_LD]>], [9, 1, 2],
568 [HVX_FWD, Hex_FWD, Hex_FWD]>,
569
570 InstrItinData <tc_7c3f55c4, /*SLOT23,VX_DV*/
571 [InstrStage<1, [SLOT2, SLOT3], 0>,
572 InstrStage<1, [CVI_MPY01]>], [9, 5, 2],
573 [HVX_FWD, HVX_FWD, Hex_FWD]>,
574
575 InstrItinData <tc_7e9f581b, /*SLOT23,VX_DV*/
576 [InstrStage<1, [SLOT2, SLOT3], 0>,
577 InstrStage<1, [CVI_MPY01]>], [9, 5, 2, 2],
578 [HVX_FWD, HVX_FWD, Hex_FWD, Hex_FWD]>,
579
580 InstrItinData <tc_7fa82b08, /*SLOT0,NOSLOT1,STORE,VP*/
581 [InstrStage<1, [SLOT0], 0>,
582 InstrStage<1, [SLOT1], 0>,
583 InstrStage<1, [CVI_ST], 0>,
584 InstrStage<1, [CVI_XLANE]>], [3, 1, 2, 5],
585 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
586
587 InstrItinData <tc_7fa8b40f, /*SLOT0123,VS*/
588 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
589 InstrStage<1, [CVI_SHIFT]>], [9, 5, 5, 2],
590 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
591
592 InstrItinData <tc_85d237e3, /*SLOT0,STORE,VA*/
593 [InstrStage<1, [SLOT0], 0>,
594 InstrStage<1, [CVI_ST], 0>,
595 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [2, 1, 2, 7],
596 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
597
598 InstrItinData <tc_8b6a873f, /*SLOT0,STORE*/
599 [InstrStage<1, [SLOT0], 0>,
600 InstrStage<1, [CVI_ST]>], [3, 2, 1, 2, 5],
601 [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
602
603 InstrItinData <tc_908a4c8c, /*SLOT23,VX*/
604 [InstrStage<1, [SLOT2, SLOT3], 0>,
605 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 5, 5],
606 [HVX_FWD, HVX_FWD, HVX_FWD]>,
607
608 InstrItinData <tc_9311da3f, /*SLOT23,VX*/
609 [InstrStage<1, [SLOT2, SLOT3], 0>,
610 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 7, 7, 2],
611 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
612
613 InstrItinData <tc_9777e6bf, /*SLOT0,VA*/
614 [InstrStage<1, [SLOT0], 0>,
615 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [4, 7, 1],
616 [Hex_FWD, HVX_FWD, Hex_FWD]>,
617
618 InstrItinData <tc_97c165b9, /*SLOT0123,VA_DV*/
619 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
620 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 7, 7],
621 [HVX_FWD, HVX_FWD, HVX_FWD]>,
622
623 InstrItinData <tc_99093773, /*SLOT0,STORE,VA*/
624 [InstrStage<1, [SLOT0], 0>,
625 InstrStage<1, [CVI_ST], 0>,
626 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [3, 7, 1, 2, 7],
627 [Hex_FWD, HVX_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
628
629 InstrItinData <tc_9b9642a1, /*SLOT0123,VS*/
630 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
631 InstrStage<1, [CVI_SHIFT]>], [9, 5, 5],
632 [HVX_FWD, HVX_FWD, HVX_FWD]>,
633
634 InstrItinData <tc_9c267309, /*SLOT01,LOAD*/
635 [InstrStage<1, [SLOT0, SLOT1], 0>,
636 InstrStage<1, [CVI_LD]>], [9, 3, 1, 2],
637 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
638
639 InstrItinData <tc_a3127e12, /*SLOT0123,VA*/
640 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
641 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 7, 7, 7],
642 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
643
644 InstrItinData <tc_a4c9df3b, /*SLOT0,STORE,VA*/
645 [InstrStage<1, [SLOT0], 0>,
646 InstrStage<1, [CVI_ST], 0>,
647 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [3, 1, 2, 7],
648 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
649
650 InstrItinData <tc_aedb9f9e, /*SLOT0,STORE,VA*/
651 [InstrStage<1, [SLOT0], 0>,
652 InstrStage<1, [CVI_ST], 0>,
653 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [7, 1, 2, 7],
654 [HVX_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
655
656 InstrItinData <tc_b06ab583, /*SLOT0123,VA*/
657 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
658 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 2, 7],
659 [HVX_FWD, Hex_FWD, HVX_FWD]>,
660
661 InstrItinData <tc_b712833a, /*SLOT01,LOAD,VA*/
662 [InstrStage<1, [SLOT0, SLOT1], 0>,
663 InstrStage<1, [CVI_LD], 0>,
664 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 1, 2],
665 [HVX_FWD, Hex_FWD, Hex_FWD]>,
666
667 InstrItinData <tc_b77635b4, /*SLOT0123,4SLOT*/
668 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
669 InstrStage<1, [CVI_ALL]>], [2],
670 [Hex_FWD]>,
671
672 InstrItinData <tc_bbaf280e, /*SLOT0123,VA*/
673 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
674 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 7, 7],
675 [HVX_FWD, HVX_FWD, HVX_FWD]>,
676
677 InstrItinData <tc_bf142ae2, /*SLOT0123,VP*/
678 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
679 InstrStage<1, [CVI_XLANE]>], [9, 5, 2],
680 [HVX_FWD, HVX_FWD, Hex_FWD]>,
681
682 InstrItinData <tc_c00bf9c9, /*SLOT0123,VS*/
683 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
684 InstrStage<1, [CVI_SHIFT]>], [9, 7, 5, 2],
685 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
686
687 InstrItinData <tc_c4b515c5, /*SLOT0123,VP*/
688 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
689 InstrStage<1, [CVI_XLANE]>], [9, 5, 5, 2],
690 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
691
692 InstrItinData <tc_cbf6d1dc, /*SLOT0123,VP_VS*/
693 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
694 InstrStage<1, [CVI_XLSHF]>], [9, 7, 5, 5, 2],
695 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
696
697 InstrItinData <tc_cedf314b, /*SLOT0123,4SLOT*/
698 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
699 InstrStage<1, [CVI_ALL]>], [3],
700 [HVX_FWD]>,
701
702 InstrItinData <tc_d2cb81ea, /*SLOT0123,VS*/
703 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
704 InstrStage<1, [CVI_SHIFT]>], [9, 5],
705 [HVX_FWD, HVX_FWD]>,
706
707 InstrItinData <tc_d5090f3e, /*SLOT0,STORE*/
708 [InstrStage<1, [SLOT0], 0>,
709 InstrStage<1, [CVI_ST]>], [2, 1, 2, 5],
710 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
711
712 InstrItinData <tc_d642eff3, /*SLOT0,NOSLOT1,STORE,VP*/
713 [InstrStage<1, [SLOT0], 0>,
714 InstrStage<1, [SLOT1], 0>,
715 InstrStage<1, [CVI_ST], 0>,
716 InstrStage<1, [CVI_XLANE]>], [2, 1, 2, 5],
717 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
718
719 InstrItinData <tc_d725e5b0, /*SLOT23,VX*/
720 [InstrStage<1, [SLOT2, SLOT3], 0>,
721 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 7, 5, 2],
722 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
723
724 InstrItinData <tc_d7bea0ec, /*SLOT0123,VP_VS*/
725 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
726 InstrStage<1, [CVI_XLSHF]>], [9, 5],
727 [HVX_FWD, HVX_FWD]>,
728
729 InstrItinData <tc_d98f4d63, /*SLOT23,VX_DV*/
730 [InstrStage<1, [SLOT2, SLOT3], 0>,
731 InstrStage<1, [CVI_MPY01]>], [9, 7, 5, 2],
732 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
733
734 InstrItinData <tc_da979fb3, /*SLOT01,LOAD,VA*/
735 [InstrStage<1, [SLOT0, SLOT1], 0>,
736 InstrStage<1, [CVI_LD], 0>,
737 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 3, 2, 1, 2],
738 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
739
740 InstrItinData <tc_db5b9e2f, /*SLOT0,STORE*/
741 [InstrStage<1, [SLOT0], 0>,
742 InstrStage<1, [CVI_ST]>], [3, 1, 2, 5],
743 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
744
745 InstrItinData <tc_e172d86a, /*SLOT23,VX_DV*/
746 [InstrStage<1, [SLOT2, SLOT3], 0>,
747 InstrStage<1, [CVI_MPY01]>], [9, 7, 5, 5],
748 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
749
750 InstrItinData <tc_e231aa4f, /*SLOT23,VX*/
751 [InstrStage<1, [SLOT2, SLOT3], 0>,
752 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 7, 2],
753 [HVX_FWD, HVX_FWD, Hex_FWD]>,
754
755 InstrItinData <tc_e3748cdf, /*SLOT0,STORE,VA*/
756 [InstrStage<1, [SLOT0], 0>,
757 InstrStage<1, [CVI_ST], 0>,
758 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [1, 2, 7],
759 [Hex_FWD, Hex_FWD, HVX_FWD]>,
760
761 InstrItinData <tc_e5053c8f, /*SLOT0123,4SLOT*/
762 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
763 InstrStage<1, [CVI_ALL]>], [],
764 []>,
765
766 InstrItinData <tc_e6299d16, /*SLOT0123,VP*/
767 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
768 InstrStage<1, [CVI_XLANE]>], [9, 5],
769 [HVX_FWD, HVX_FWD]>,
770
771 InstrItinData <tc_eb669007, /*SLOT01,LOAD,VA*/
772 [InstrStage<1, [SLOT0, SLOT1], 0>,
773 InstrStage<1, [CVI_LD], 0>,
774 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 3, 1, 2],
775 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
776
777 InstrItinData <tc_eda67dcd, /*SLOT23,VX_DV*/
778 [InstrStage<1, [SLOT2, SLOT3], 0>,
779 InstrStage<1, [CVI_MPY01]>], [9, 5, 5],
780 [HVX_FWD, HVX_FWD, HVX_FWD]>,
781
782 InstrItinData <tc_f3fc3f83, /*SLOT0123,VP*/
783 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
784 InstrStage<1, [CVI_XLANE]>], [9, 5, 5],
785 [HVX_FWD, HVX_FWD, HVX_FWD]>
786 ];
787}
788
789class DepHVXItinV62 {
790 list<InstrItinData> DepHVXItinV62_list = [
791 InstrItinData <tc_0317c6ca, /*SLOT0,STORE,VA*/
792 [InstrStage<1, [SLOT0], 0>,
793 InstrStage<1, [CVI_ST], 0>,
794 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [3, 2, 1, 2, 7],
795 [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
796
797 InstrItinData <tc_1b93bdc6, /*SLOT0,STORE*/
798 [InstrStage<1, [SLOT0], 0>,
799 InstrStage<1, [CVI_ST]>], [1, 2, 5],
800 [Hex_FWD, Hex_FWD, HVX_FWD]>,
801
802 InstrItinData <tc_2171ebae, /*SLOT0123,VA_DV*/
803 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
804 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 2, 7, 7],
805 [HVX_FWD, Hex_FWD, HVX_FWD, HVX_FWD]>,
806
807 InstrItinData <tc_28978789, /*SLOT0123,4SLOT*/
808 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
809 InstrStage<1, [CVI_ALL]>], [3, 2],
810 [HVX_FWD, Hex_FWD]>,
811
812 InstrItinData <tc_316c637c, /*SLOT0123,VA_DV*/
813 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
814 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 7, 7, 7],
815 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
816
817 InstrItinData <tc_354299ad, /*SLOT0,NOSLOT1,STORE,VP*/
818 [InstrStage<1, [SLOT0], 0>,
819 InstrStage<1, [SLOT1], 0>,
820 InstrStage<1, [CVI_ST], 0>,
821 InstrStage<1, [CVI_XLANE]>], [1, 2, 5],
822 [Hex_FWD, Hex_FWD, HVX_FWD]>,
823
824 InstrItinData <tc_35e92f8e, /*SLOT0,NOSLOT1,LOAD,VP*/
825 [InstrStage<1, [SLOT0], 0>,
826 InstrStage<1, [SLOT1], 0>,
827 InstrStage<1, [CVI_LD], 0>,
828 InstrStage<1, [CVI_XLANE]>], [9, 1, 2],
829 [HVX_FWD, Hex_FWD, Hex_FWD]>,
830
831 InstrItinData <tc_38208312, /*SLOT01,LOAD*/
832 [InstrStage<1, [SLOT0, SLOT1], 0>,
833 InstrStage<1, [CVI_LD]>], [9, 3, 2, 1, 2],
834 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
835
836 InstrItinData <tc_4105d6b5, /*SLOT0123,VP*/
837 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
838 InstrStage<1, [CVI_XLANE]>], [9, 2],
839 [HVX_FWD, Hex_FWD]>,
840
841 InstrItinData <tc_41f4b64e, /*SLOT0123,VS*/
842 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
843 InstrStage<1, [CVI_SHIFT]>], [9, 5, 2],
844 [HVX_FWD, HVX_FWD, Hex_FWD]>,
845
846 InstrItinData <tc_41f99e1c, /*SLOT23,VX_DV*/
847 [InstrStage<1, [SLOT2, SLOT3], 0>,
848 InstrStage<1, [CVI_MPY01]>], [9, 7, 5, 2, 2],
849 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD, Hex_FWD]>,
850
851 InstrItinData <tc_45453b98, /*SLOT0123,VS*/
852 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
853 InstrStage<1, [CVI_SHIFT]>], [9, 5, 5],
854 [HVX_FWD, HVX_FWD, HVX_FWD]>,
855
856 InstrItinData <tc_4e2a5159, /*SLOT0123,VP_VS*/
857 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
858 InstrStage<1, [CVI_XLSHF]>], [9, 5, 5, 2],
859 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
860
861 InstrItinData <tc_4fd8566e, /*SLOT0,NOSLOT1,LOAD,VP*/
862 [InstrStage<1, [SLOT0], 0>,
863 InstrStage<1, [SLOT1], 0>,
864 InstrStage<1, [CVI_LD], 0>,
865 InstrStage<1, [CVI_XLANE]>], [9, 3, 1, 2],
866 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
867
868 InstrItinData <tc_51cd3aab, /*SLOT01,LOAD*/
869 [InstrStage<1, [SLOT0, SLOT1], 0>,
870 InstrStage<1, [CVI_LD]>], [9, 2, 1, 2],
871 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
872
873 InstrItinData <tc_5a9fc4ec, /*SLOT0123,VA*/
874 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
875 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 9, 7, 7, 7],
876 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
877
878 InstrItinData <tc_5c120602, /*SLOT0123,VP_VS*/
879 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
880 InstrStage<1, [CVI_XLSHF]>], [9, 9, 5, 5, 2],
881 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
882
883 InstrItinData <tc_5cbf490b, /*SLOT01,LOAD,VA*/
884 [InstrStage<1, [SLOT0, SLOT1], 0>,
885 InstrStage<1, [CVI_LD], 0>,
886 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 2, 1, 2],
887 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
888
889 InstrItinData <tc_644584f8, /*SLOT0123,VA_DV*/
890 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
891 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 7],
892 [HVX_FWD, HVX_FWD]>,
893
894 InstrItinData <tc_69b6dd20, /*SLOT23,VX*/
895 [InstrStage<1, [SLOT2, SLOT3], 0>,
896 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 5, 2],
897 [HVX_FWD, HVX_FWD, Hex_FWD]>,
898
899 InstrItinData <tc_6b78cf13, /*SLOT23,VX*/
900 [InstrStage<1, [SLOT2, SLOT3], 0>,
901 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 2],
902 [HVX_FWD, Hex_FWD]>,
903
904 InstrItinData <tc_6fd9ad30, /*SLOT0,NOSLOT1,STORE,VP*/
905 [InstrStage<1, [SLOT0], 0>,
906 InstrStage<1, [SLOT1], 0>,
907 InstrStage<1, [CVI_ST], 0>,
908 InstrStage<1, [CVI_XLANE]>], [3, 2, 1, 2, 5],
909 [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
910
911 InstrItinData <tc_71337255, /*SLOT0123,VA*/
912 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
913 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 7],
914 [HVX_FWD, HVX_FWD]>,
915
916 InstrItinData <tc_72ad7b54, /*SLOT0123,VP_VS*/
917 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
918 InstrStage<1, [CVI_XLSHF]>], [9, 7, 5],
919 [HVX_FWD, HVX_FWD, HVX_FWD]>,
920
921 InstrItinData <tc_77a4c701, /*SLOT01,LOAD*/
922 [InstrStage<1, [SLOT0, SLOT1], 0>,
923 InstrStage<1, [CVI_LD]>], [9, 1, 2],
924 [HVX_FWD, Hex_FWD, Hex_FWD]>,
925
926 InstrItinData <tc_7c3f55c4, /*SLOT23,VX_DV*/
927 [InstrStage<1, [SLOT2, SLOT3], 0>,
928 InstrStage<1, [CVI_MPY01]>], [9, 5, 2],
929 [HVX_FWD, HVX_FWD, Hex_FWD]>,
930
931 InstrItinData <tc_7e9f581b, /*SLOT23,VX_DV*/
932 [InstrStage<1, [SLOT2, SLOT3], 0>,
933 InstrStage<1, [CVI_MPY01]>], [9, 5, 2, 2],
934 [HVX_FWD, HVX_FWD, Hex_FWD, Hex_FWD]>,
935
936 InstrItinData <tc_7fa82b08, /*SLOT0,NOSLOT1,STORE,VP*/
937 [InstrStage<1, [SLOT0], 0>,
938 InstrStage<1, [SLOT1], 0>,
939 InstrStage<1, [CVI_ST], 0>,
940 InstrStage<1, [CVI_XLANE]>], [3, 1, 2, 5],
941 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
942
943 InstrItinData <tc_7fa8b40f, /*SLOT0123,VS*/
944 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
945 InstrStage<1, [CVI_SHIFT]>], [9, 5, 5, 2],
946 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
947
948 InstrItinData <tc_85d237e3, /*SLOT0,STORE,VA*/
949 [InstrStage<1, [SLOT0], 0>,
950 InstrStage<1, [CVI_ST], 0>,
951 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [2, 1, 2, 7],
952 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
953
954 InstrItinData <tc_8b6a873f, /*SLOT0,STORE*/
955 [InstrStage<1, [SLOT0], 0>,
956 InstrStage<1, [CVI_ST]>], [3, 2, 1, 2, 5],
957 [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
958
959 InstrItinData <tc_908a4c8c, /*SLOT23,VX*/
960 [InstrStage<1, [SLOT2, SLOT3], 0>,
961 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 5, 5],
962 [HVX_FWD, HVX_FWD, HVX_FWD]>,
963
964 InstrItinData <tc_9311da3f, /*SLOT23,VX*/
965 [InstrStage<1, [SLOT2, SLOT3], 0>,
966 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 7, 7, 2],
967 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
968
969 InstrItinData <tc_9777e6bf, /*SLOT0,VA*/
970 [InstrStage<1, [SLOT0], 0>,
971 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [4, 7, 1],
972 [Hex_FWD, HVX_FWD, Hex_FWD]>,
973
974 InstrItinData <tc_97c165b9, /*SLOT0123,VA_DV*/
975 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
976 InstrStage<1, [CVI_MPY01, CVI_XLSHF]>], [9, 7, 7],
977 [HVX_FWD, HVX_FWD, HVX_FWD]>,
978
979 InstrItinData <tc_99093773, /*SLOT0,STORE,VA*/
980 [InstrStage<1, [SLOT0], 0>,
981 InstrStage<1, [CVI_ST], 0>,
982 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [3, 7, 1, 2, 7],
983 [Hex_FWD, HVX_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
984
985 InstrItinData <tc_9b9642a1, /*SLOT0123,VA*/
986 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
987 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 7, 7],
988 [HVX_FWD, HVX_FWD, HVX_FWD]>,
989
990 InstrItinData <tc_9c267309, /*SLOT01,LOAD*/
991 [InstrStage<1, [SLOT0, SLOT1], 0>,
992 InstrStage<1, [CVI_LD]>], [9, 3, 1, 2],
993 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
994
995 InstrItinData <tc_a3127e12, /*SLOT0123,VA*/
996 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
997 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 7, 7, 7],
998 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
999
1000 InstrItinData <tc_a4c9df3b, /*SLOT0,STORE,VA*/
1001 [InstrStage<1, [SLOT0], 0>,
1002 InstrStage<1, [CVI_ST], 0>,
1003 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [3, 1, 2, 7],
1004 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
1005
1006 InstrItinData <tc_aedb9f9e, /*SLOT0,STORE,VA*/
1007 [InstrStage<1, [SLOT0], 0>,
1008 InstrStage<1, [CVI_ST], 0>,
1009 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [7, 1, 2, 7],
1010 [HVX_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
1011
1012 InstrItinData <tc_b06ab583, /*SLOT0123,VA*/
1013 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1014 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 2, 7],
1015 [HVX_FWD, Hex_FWD, HVX_FWD]>,
1016
1017 InstrItinData <tc_b712833a, /*SLOT01,LOAD,VA*/
1018 [InstrStage<1, [SLOT0, SLOT1], 0>,
1019 InstrStage<1, [CVI_LD], 0>,
1020 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 1, 2],
1021 [HVX_FWD, Hex_FWD, Hex_FWD]>,
1022
1023 InstrItinData <tc_b77635b4, /*SLOT0123,4SLOT*/
1024 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1025 InstrStage<1, [CVI_ALL]>], [2],
1026 [Hex_FWD]>,
1027
1028 InstrItinData <tc_bbaf280e, /*SLOT0123,VA*/
1029 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1030 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 7, 7],
1031 [HVX_FWD, HVX_FWD, HVX_FWD]>,
1032
1033 InstrItinData <tc_bf142ae2, /*SLOT0123,VP*/
1034 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1035 InstrStage<1, [CVI_XLANE]>], [9, 5, 2],
1036 [HVX_FWD, HVX_FWD, Hex_FWD]>,
1037
1038 InstrItinData <tc_c00bf9c9, /*SLOT0123,VS*/
1039 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1040 InstrStage<1, [CVI_SHIFT]>], [9, 7, 5, 2],
1041 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
1042
1043 InstrItinData <tc_c4b515c5, /*SLOT0123,VP*/
1044 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1045 InstrStage<1, [CVI_XLANE]>], [9, 5, 5, 2],
1046 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
1047
1048 InstrItinData <tc_cbf6d1dc, /*SLOT0123,VP_VS*/
1049 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1050 InstrStage<1, [CVI_XLSHF]>], [9, 7, 5, 5, 2],
1051 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
1052
1053 InstrItinData <tc_cedf314b, /*SLOT0123,4SLOT*/
1054 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1055 InstrStage<1, [CVI_ALL]>], [3],
1056 [HVX_FWD]>,
1057
1058 InstrItinData <tc_d2cb81ea, /*SLOT0123,VS*/
1059 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1060 InstrStage<1, [CVI_SHIFT]>], [9, 5],
1061 [HVX_FWD, HVX_FWD]>,
1062
1063 InstrItinData <tc_d5090f3e, /*SLOT0,STORE*/
1064 [InstrStage<1, [SLOT0], 0>,
1065 InstrStage<1, [CVI_ST]>], [2, 1, 2, 5],
1066 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
1067
1068 InstrItinData <tc_d642eff3, /*SLOT0,NOSLOT1,STORE,VP*/
1069 [InstrStage<1, [SLOT0], 0>,
1070 InstrStage<1, [SLOT1], 0>,
1071 InstrStage<1, [CVI_ST], 0>,
1072 InstrStage<1, [CVI_XLANE]>], [2, 1, 2, 5],
1073 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
1074
1075 InstrItinData <tc_d725e5b0, /*SLOT23,VX*/
1076 [InstrStage<1, [SLOT2, SLOT3], 0>,
1077 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 7, 5, 2],
1078 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
1079
1080 InstrItinData <tc_d7bea0ec, /*SLOT0123,VP_VS*/
1081 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1082 InstrStage<1, [CVI_XLSHF]>], [9, 5],
1083 [HVX_FWD, HVX_FWD]>,
1084
1085 InstrItinData <tc_d98f4d63, /*SLOT23,VX_DV*/
1086 [InstrStage<1, [SLOT2, SLOT3], 0>,
1087 InstrStage<1, [CVI_MPY01]>], [9, 7, 5, 2],
1088 [HVX_FWD, HVX_FWD, HVX_FWD, Hex_FWD]>,
1089
1090 InstrItinData <tc_da979fb3, /*SLOT01,LOAD,VA*/
1091 [InstrStage<1, [SLOT0, SLOT1], 0>,
1092 InstrStage<1, [CVI_LD], 0>,
1093 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 3, 2, 1, 2],
1094 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
1095
1096 InstrItinData <tc_db5b9e2f, /*SLOT0,STORE*/
1097 [InstrStage<1, [SLOT0], 0>,
1098 InstrStage<1, [CVI_ST]>], [3, 1, 2, 5],
1099 [Hex_FWD, Hex_FWD, Hex_FWD, HVX_FWD]>,
1100
1101 InstrItinData <tc_e172d86a, /*SLOT23,VX_DV*/
1102 [InstrStage<1, [SLOT2, SLOT3], 0>,
1103 InstrStage<1, [CVI_MPY01]>], [9, 7, 5, 5],
1104 [HVX_FWD, HVX_FWD, HVX_FWD, HVX_FWD]>,
1105
1106 InstrItinData <tc_e231aa4f, /*SLOT23,VX*/
1107 [InstrStage<1, [SLOT2, SLOT3], 0>,
1108 InstrStage<1, [CVI_MPY0, CVI_MPY1]>], [9, 7, 2],
1109 [HVX_FWD, HVX_FWD, Hex_FWD]>,
1110
1111 InstrItinData <tc_e3748cdf, /*SLOT0,STORE,VA*/
1112 [InstrStage<1, [SLOT0], 0>,
1113 InstrStage<1, [CVI_ST], 0>,
1114 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [1, 2, 7],
1115 [Hex_FWD, Hex_FWD, HVX_FWD]>,
1116
1117 InstrItinData <tc_e5053c8f, /*SLOT0123,4SLOT*/
1118 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1119 InstrStage<1, [CVI_ALL]>], [],
1120 []>,
1121
1122 InstrItinData <tc_e6299d16, /*SLOT0123,VP*/
1123 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1124 InstrStage<1, [CVI_XLANE]>], [9, 5],
1125 [HVX_FWD, HVX_FWD]>,
1126
1127 InstrItinData <tc_eb669007, /*SLOT01,LOAD,VA*/
1128 [InstrStage<1, [SLOT0, SLOT1], 0>,
1129 InstrStage<1, [CVI_LD], 0>,
1130 InstrStage<1, [CVI_MPY0, CVI_MPY1, CVI_SHIFT, CVI_XLANE]>], [9, 3, 1, 2],
1131 [HVX_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
1132
1133 InstrItinData <tc_eda67dcd, /*SLOT23,VX_DV*/
1134 [InstrStage<1, [SLOT2, SLOT3], 0>,
1135 InstrStage<1, [CVI_MPY01]>], [9, 5, 5],
1136 [HVX_FWD, HVX_FWD, HVX_FWD]>,
1137
1138 InstrItinData <tc_f3fc3f83, /*SLOT0123,VP*/
1139 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3], 0>,
1140 InstrStage<1, [CVI_XLANE]>], [9, 5, 5],
1141 [HVX_FWD, HVX_FWD, HVX_FWD]>
1142 ];
1143}