Reid Spencer | d0e30dc | 2006-12-02 04:23:10 +0000 | [diff] [blame] | 1 | ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm |
Chris Lattner | 6e98b49 | 2006-04-17 05:27:31 +0000 | [diff] [blame] | 2 | |
| 3 | <4 x float> %test_uu72(<4 x float> *%P1, <4 x float> *%P2) { |
| 4 | %V1 = load <4 x float> *%P1 |
| 5 | %V2 = load <4 x float> *%P2 |
| 6 | ; vmrglw + vsldoi |
| 7 | %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, |
| 8 | <4 x uint> <uint undef, uint undef, uint 7, uint 2> |
| 9 | ret <4 x float> %V3 |
| 10 | } |
| 11 | |
| 12 | <4 x float> %test_30u5(<4 x float> *%P1, <4 x float> *%P2) { |
| 13 | %V1 = load <4 x float> *%P1 |
| 14 | %V2 = load <4 x float> *%P2 |
| 15 | %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, |
| 16 | <4 x uint> <uint 3, uint 0, uint undef, uint 5> |
| 17 | ret <4 x float> %V3 |
| 18 | } |
| 19 | |
| 20 | <4 x float> %test_3u73(<4 x float> *%P1, <4 x float> *%P2) { |
| 21 | %V1 = load <4 x float> *%P1 |
| 22 | %V2 = load <4 x float> *%P2 |
| 23 | %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, |
| 24 | <4 x uint> <uint 3, uint undef, uint 7, uint 3> |
| 25 | ret <4 x float> %V3 |
| 26 | } |
| 27 | |
| 28 | <4 x float> %test_3774(<4 x float> *%P1, <4 x float> *%P2) { |
| 29 | %V1 = load <4 x float> *%P1 |
| 30 | %V2 = load <4 x float> *%P2 |
| 31 | %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, |
| 32 | <4 x uint> <uint 3, uint 7, uint 7, uint 4> |
| 33 | ret <4 x float> %V3 |
| 34 | } |
| 35 | |
| 36 | <4 x float> %test_4450(<4 x float> *%P1, <4 x float> *%P2) { |
| 37 | %V1 = load <4 x float> *%P1 |
| 38 | %V2 = load <4 x float> *%P2 |
| 39 | %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, |
| 40 | <4 x uint> <uint 4, uint 4, uint 5, uint 0> |
| 41 | ret <4 x float> %V3 |
| 42 | } |