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gerrit-public.fairphone.software / toolchain / llvm-project / aa9ca691cde9d650ec92049ca851a311baf6d15c / . / llvm / test / CodeGen / ARM / execute-only-big-stack-frame.ll
blob: 24c6a06d6af1894ecc860d5aad4355f5d6b8abbe [file] [log] [blame]
Eric Christopher015dc202017-07-01 02:55:22 +0000[diff] [blame]1; RUN: llc < %s -mtriple=thumbv7m -mattr=+execute-only -O0 %s -o - \
Prakhar Bahuguna52a7dd72016-12-15 07:59:08 +0000[diff] [blame]2; RUN: | FileCheck --check-prefix=CHECK-SUBW-ADDW %s
Eric Christopher015dc202017-07-01 02:55:22 +0000[diff] [blame]3; RUN: llc < %s -mtriple=thumbv8m.base -mattr=+execute-only -O0 %s -o - \
Prakhar Bahuguna52a7dd72016-12-15 07:59:08 +0000[diff] [blame]4; RUN: | FileCheck --check-prefix=CHECK-MOVW-MOVT-ADD %s
Eric Christopher015dc202017-07-01 02:55:22 +0000[diff] [blame]5; RUN: llc < %s -mtriple=thumbv8m.main -mattr=+execute-only -O0 %s -o - \
Prakhar Bahuguna52a7dd72016-12-15 07:59:08 +0000[diff] [blame]6; RUN: | FileCheck --check-prefix=CHECK-SUBW-ADDW %s
7
8define i8 @test_big_stack_frame() {
9; CHECK-SUBW-ADDW-LABEL: test_big_stack_frame:
10; CHECK-SUBW-ADDW-NOT: ldr {{r[0-9]+}}, .{{.*}}
11; CHECK-SUBW-ADDW: sub.w sp, sp, #65536
12; CHECK-SUBW-ADDW-NOT: ldr {{r[0-9]+}}, .{{.*}}
Matthias Braun537d0392017-06-17 02:08:18 +0000[diff] [blame]13; CHECK-SUBW-ADDW: add.w [[REG1:r[0-9]+|lr]], sp, #255
Prakhar Bahuguna52a7dd72016-12-15 07:59:08 +0000[diff] [blame]14; CHECK-SUBW-ADDW: add.w {{r[0-9]+}}, [[REG1]], #65280
15; CHECK-SUBW-ADDW-NOT: ldr {{r[0-9]+}}, .{{.*}}
Matthias Braun537d0392017-06-17 02:08:18 +0000[diff] [blame]16; CHECK-SUBW-ADDW: add.w [[REGX:r[0-9]+|lr]], sp, #61440
Prakhar Bahuguna52a7dd72016-12-15 07:59:08 +0000[diff] [blame]17; CHECK-SUBW-ADDW-NOT: ldr {{r[0-9]+}}, .{{.*}}
18; CHECK-SUBW-ADDW: add.w sp, sp, #65536
19
20; CHECK-MOVW-MOVT-ADD-LABEL: test_big_stack_frame:
21; CHECK-MOVW-MOVT-ADD-NOT: ldr {{r[0-9]+}}, .{{.*}}
22; CHECK-MOVW-MOVT-ADD: movw [[REG1:r[0-9]+]], #0
23; CHECK-MOVW-MOVT-ADD: movt [[REG1]], #65535
24; CHECK-MOVW-MOVT-ADD: add sp, [[REG1]]
25; CHECK-MOVW-MOVT-ADD-NOT: ldr {{r[0-9]+}}, .{{.*}}
26; CHECK-MOVW-MOVT-ADD: movw [[REG2:r[0-9]+]], #65532
27; CHECK-MOVW-MOVT-ADD: movt [[REG2]], #0
28; CHECK-MOVW-MOVT-ADD: add [[REG2]], sp
29; CHECK-MOVW-MOVT-ADD-NOT: ldr {{r[0-9]+}}, .{{.*}}
30; CHECK-MOVW-MOVT-ADD: movw [[REG3:r[0-9]+]], #65532
31; CHECK-MOVW-MOVT-ADD: movt [[REG3]], #0
32; CHECK-MOVW-MOVT-ADD: add [[REG3]], sp
33; CHECK-MOVW-MOVT-ADD-NOT: ldr {{r[0-9]+}}, .{{.*}}
34; CHECK-MOVW-MOVT-ADD: movw [[REG4:r[0-9]+]], #0
35; CHECK-MOVW-MOVT-ADD: movt [[REG4]], #1
36; CHECK-MOVW-MOVT-ADD: add sp, [[REG4]]
37
38entry:
39 %s1 = alloca i8
40 %buffer = alloca [65528 x i8], align 1
41 call void @foo(i8* %s1)
42 %load = load i8, i8* %s1
43 ret i8 %load
44}
45
46declare void @foo(i8*)