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Eugene Zelenko5db84df2017-02-17 21:43:25 +00001//===- LiveRegUnits.cpp - Register Unit Set -------------------------------===//
Matthias Braun710a4c12017-01-20 00:16:14 +00002//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Matthias Braun710a4c12017-01-20 00:16:14 +00006//
7//===----------------------------------------------------------------------===//
8//
9/// \file This file imlements the LiveRegUnits set.
10//
11//===----------------------------------------------------------------------===//
12
13#include "llvm/CodeGen/LiveRegUnits.h"
Matthias Braun4e8624d2017-06-03 00:26:35 +000014
Eugene Zelenko5db84df2017-02-17 21:43:25 +000015#include "llvm/CodeGen/MachineBasicBlock.h"
Matthias Braun710a4c12017-01-20 00:16:14 +000016#include "llvm/CodeGen/MachineFrameInfo.h"
17#include "llvm/CodeGen/MachineFunction.h"
18#include "llvm/CodeGen/MachineInstrBundle.h"
Eugene Zelenko5db84df2017-02-17 21:43:25 +000019#include "llvm/CodeGen/MachineOperand.h"
Matthias Braun4e8624d2017-06-03 00:26:35 +000020#include "llvm/CodeGen/MachineRegisterInfo.h"
David Blaikieb3bde2e2017-11-17 01:07:10 +000021#include "llvm/CodeGen/TargetRegisterInfo.h"
Eugene Zelenko5db84df2017-02-17 21:43:25 +000022#include "llvm/MC/MCRegisterInfo.h"
Eugene Zelenko5db84df2017-02-17 21:43:25 +000023
Matthias Braun710a4c12017-01-20 00:16:14 +000024using namespace llvm;
25
26void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) {
27 for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
28 for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
29 if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
30 Units.reset(U);
31 }
32 }
33}
34
Matthias Braun28eae8f2017-01-21 02:21:04 +000035void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
36 for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
37 for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
38 if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
39 Units.set(U);
40 }
41 }
42}
43
Matthias Braun710a4c12017-01-20 00:16:14 +000044void LiveRegUnits::stepBackward(const MachineInstr &MI) {
45 // Remove defined registers and regmask kills from the set.
46 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
47 if (O->isReg()) {
Krzysztof Parzyszek6a322932018-06-21 13:38:43 +000048 if (!O->isDef() || O->isDebug())
Matthias Braun710a4c12017-01-20 00:16:14 +000049 continue;
50 unsigned Reg = O->getReg();
51 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
52 continue;
53 removeReg(Reg);
54 } else if (O->isRegMask())
55 removeRegsNotPreserved(O->getRegMask());
56 }
57
58 // Add uses to the set.
59 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
Krzysztof Parzyszek6a322932018-06-21 13:38:43 +000060 if (!O->isReg() || !O->readsReg() || O->isDebug())
Matthias Braun710a4c12017-01-20 00:16:14 +000061 continue;
62 unsigned Reg = O->getReg();
63 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
64 continue;
65 addReg(Reg);
66 }
67}
68
Matthias Braun1b54aa52017-07-07 03:02:17 +000069void LiveRegUnits::accumulate(const MachineInstr &MI) {
Matthias Braun28eae8f2017-01-21 02:21:04 +000070 // Add defs, uses and regmask clobbers to the set.
71 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
72 if (O->isReg()) {
73 unsigned Reg = O->getReg();
74 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
75 continue;
76 if (!O->isDef() && !O->readsReg())
77 continue;
78 addReg(Reg);
79 } else if (O->isRegMask())
80 addRegsInMask(O->getRegMask());
81 }
82}
83
Matthias Braun710a4c12017-01-20 00:16:14 +000084/// Add live-in registers of basic block \p MBB to \p LiveUnits.
Matthias Braun4e8624d2017-06-03 00:26:35 +000085static void addBlockLiveIns(LiveRegUnits &LiveUnits,
86 const MachineBasicBlock &MBB) {
Matthias Braun710a4c12017-01-20 00:16:14 +000087 for (const auto &LI : MBB.liveins())
88 LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
89}
90
Matthias Braun4e8624d2017-06-03 00:26:35 +000091/// Adds all callee saved registers to \p LiveUnits.
92static void addCalleeSavedRegs(LiveRegUnits &LiveUnits,
93 const MachineFunction &MF) {
94 const MachineRegisterInfo &MRI = MF.getRegInfo();
95 for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)
96 LiveUnits.addReg(*CSR);
Matthias Braun710a4c12017-01-20 00:16:14 +000097}
98
Krzysztof Parzyszekf78eca82017-09-08 16:29:50 +000099void LiveRegUnits::addPristines(const MachineFunction &MF) {
Matthias Braun4e8624d2017-06-03 00:26:35 +0000100 const MachineFrameInfo &MFI = MF.getFrameInfo();
101 if (!MFI.isCalleeSavedInfoValid())
102 return;
Krzysztof Parzyszekf78eca82017-09-08 16:29:50 +0000103 /// This function will usually be called on an empty object, handle this
104 /// as a special case.
105 if (empty()) {
106 /// Add all callee saved regs, then remove the ones that are saved and
107 /// restored.
108 addCalleeSavedRegs(*this, MF);
109 /// Remove the ones that are not saved/restored; they are pristine.
110 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
111 removeReg(Info.getReg());
112 return;
113 }
114 /// If a callee-saved register that is not pristine is already present
115 /// in the set, we should make sure that it stays in it. Precompute the
116 /// set of pristine registers in a separate object.
Matthias Braun4e8624d2017-06-03 00:26:35 +0000117 /// Add all callee saved regs, then remove the ones that are saved+restored.
Krzysztof Parzyszekf78eca82017-09-08 16:29:50 +0000118 LiveRegUnits Pristine(*TRI);
119 addCalleeSavedRegs(Pristine, MF);
Matthias Braun4e8624d2017-06-03 00:26:35 +0000120 /// Remove the ones that are not saved/restored; they are pristine.
Matthias Braun710a4c12017-01-20 00:16:14 +0000121 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
Krzysztof Parzyszekf78eca82017-09-08 16:29:50 +0000122 Pristine.removeReg(Info.getReg());
123 addUnits(Pristine.getBitVector());
Matthias Braun710a4c12017-01-20 00:16:14 +0000124}
125
126void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) {
127 const MachineFunction &MF = *MBB.getParent();
Oliver Stannardbac11512019-02-01 09:23:51 +0000128
129 addPristines(MF);
130
131 // To get the live-outs we simply merge the live-ins of all successors.
132 for (const MachineBasicBlock *Succ : MBB.successors())
133 addBlockLiveIns(*this, *Succ);
134
135 // For the return block: Add all callee saved registers.
136 if (MBB.isReturnBlock()) {
Matthias Braun4e8624d2017-06-03 00:26:35 +0000137 const MachineFrameInfo &MFI = MF.getFrameInfo();
138 if (MFI.isCalleeSavedInfoValid())
139 addCalleeSavedRegs(*this, MF);
Matthias Braun710a4c12017-01-20 00:16:14 +0000140 }
Matthias Braun710a4c12017-01-20 00:16:14 +0000141}
142
143void LiveRegUnits::addLiveIns(const MachineBasicBlock &MBB) {
144 const MachineFunction &MF = *MBB.getParent();
Krzysztof Parzyszekf78eca82017-09-08 16:29:50 +0000145 addPristines(MF);
Matthias Braun4e8624d2017-06-03 00:26:35 +0000146 addBlockLiveIns(*this, MBB);
Matthias Braun710a4c12017-01-20 00:16:14 +0000147}