| Tony Jiang | c260e0e | 2017-07-07 16:41:55 +0000 | [diff] [blame] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s |
| 3 | ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s |
| 4 | declare i32 @llvm.bitreverse.i32(i32) |
| 5 | define i32 @testBitReverseIntrinsicI32(i32 %arg) { |
| 6 | ; CHECK-LABEL: testBitReverseIntrinsicI32: |
| 7 | ; CHECK: # BB#0: |
| 8 | ; CHECK-NEXT: lis 4, -21846 |
| 9 | ; CHECK-NEXT: lis 5, 21845 |
| 10 | ; CHECK-NEXT: slwi 6, 3, 1 |
| 11 | ; CHECK-NEXT: srwi 3, 3, 1 |
| 12 | ; CHECK-NEXT: lis 7, -13108 |
| 13 | ; CHECK-NEXT: lis 8, 13107 |
| 14 | ; CHECK-NEXT: ori 4, 4, 43690 |
| 15 | ; CHECK-NEXT: ori 5, 5, 21845 |
| 16 | ; CHECK-NEXT: lis 10, -3856 |
| 17 | ; CHECK-NEXT: lis 11, 3855 |
| 18 | ; CHECK-NEXT: and 3, 3, 5 |
| 19 | ; CHECK-NEXT: and 4, 6, 4 |
| 20 | ; CHECK-NEXT: ori 5, 8, 13107 |
| 21 | ; CHECK-NEXT: or 3, 3, 4 |
| 22 | ; CHECK-NEXT: ori 4, 7, 52428 |
| 23 | ; CHECK-NEXT: slwi 9, 3, 2 |
| 24 | ; CHECK-NEXT: srwi 3, 3, 2 |
| 25 | ; CHECK-NEXT: and 3, 3, 5 |
| 26 | ; CHECK-NEXT: and 4, 9, 4 |
| 27 | ; CHECK-NEXT: ori 5, 11, 3855 |
| 28 | ; CHECK-NEXT: or 3, 3, 4 |
| 29 | ; CHECK-NEXT: ori 4, 10, 61680 |
| 30 | ; CHECK-NEXT: slwi 12, 3, 4 |
| 31 | ; CHECK-NEXT: srwi 3, 3, 4 |
| 32 | ; CHECK-NEXT: and 4, 12, 4 |
| 33 | ; CHECK-NEXT: and 3, 3, 5 |
| 34 | ; CHECK-NEXT: or 3, 3, 4 |
| 35 | ; CHECK-NEXT: rotlwi 4, 3, 24 |
| 36 | ; CHECK-NEXT: rlwimi 4, 3, 8, 8, 15 |
| 37 | ; CHECK-NEXT: rlwimi 4, 3, 8, 24, 31 |
| 38 | ; CHECK-NEXT: rldicl 3, 4, 0, 32 |
| 39 | ; CHECK-NEXT: blr |
| 40 | %res = call i32 @llvm.bitreverse.i32(i32 %arg) |
| 41 | ret i32 %res |
| 42 | } |