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gerrit-public.fairphone.software / toolchain / llvm-project / acefbcf38eb19186af007a68683031aa870d5d96 / . / llvm / test / CodeGen / PowerPC / testBitReverse.ll
blob: 6993d17ad8f34bf1e4299c97dbefb005e35a29c0 [file] [log] [blame]
Tony Jiangc260e0e2017-07-07 16:41:55 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
3; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
4declare i32 @llvm.bitreverse.i32(i32)
5define i32 @testBitReverseIntrinsicI32(i32 %arg) {
6; CHECK-LABEL: testBitReverseIntrinsicI32:
7; CHECK: # BB#0:
8; CHECK-NEXT: lis 4, -21846
9; CHECK-NEXT: lis 5, 21845
10; CHECK-NEXT: slwi 6, 3, 1
11; CHECK-NEXT: srwi 3, 3, 1
12; CHECK-NEXT: lis 7, -13108
13; CHECK-NEXT: lis 8, 13107
14; CHECK-NEXT: ori 4, 4, 43690
15; CHECK-NEXT: ori 5, 5, 21845
16; CHECK-NEXT: lis 10, -3856
17; CHECK-NEXT: lis 11, 3855
18; CHECK-NEXT: and 3, 3, 5
19; CHECK-NEXT: and 4, 6, 4
20; CHECK-NEXT: ori 5, 8, 13107
21; CHECK-NEXT: or 3, 3, 4
22; CHECK-NEXT: ori 4, 7, 52428
23; CHECK-NEXT: slwi 9, 3, 2
24; CHECK-NEXT: srwi 3, 3, 2
25; CHECK-NEXT: and 3, 3, 5
26; CHECK-NEXT: and 4, 9, 4
27; CHECK-NEXT: ori 5, 11, 3855
28; CHECK-NEXT: or 3, 3, 4
29; CHECK-NEXT: ori 4, 10, 61680
30; CHECK-NEXT: slwi 12, 3, 4
31; CHECK-NEXT: srwi 3, 3, 4
32; CHECK-NEXT: and 4, 12, 4
33; CHECK-NEXT: and 3, 3, 5
34; CHECK-NEXT: or 3, 3, 4
35; CHECK-NEXT: rotlwi 4, 3, 24
36; CHECK-NEXT: rlwimi 4, 3, 8, 8, 15
37; CHECK-NEXT: rlwimi 4, 3, 8, 24, 31
38; CHECK-NEXT: rldicl 3, 4, 0, 32
39; CHECK-NEXT: blr
40 %res = call i32 @llvm.bitreverse.i32(i32 %arg)
41 ret i32 %res
42}
Tony Jiangacefbcf2017-07-10 18:11:23 +0000[diff] [blame^]43
44declare i64 @llvm.bitreverse.i64(i64)
45define i64 @testBitReverseIntrinsicI64(i64 %arg) {
46; CHECK-LABEL: testBitReverseIntrinsicI64:
47; CHECK: # BB#0:
48; CHECK-NEXT: lis 4, -21846
49; CHECK-NEXT: lis 5, 21845
50; CHECK-NEXT: lis 6, -13108
51; CHECK-NEXT: lis 7, 13107
52; CHECK-NEXT: sldi 8, 3, 1
53; CHECK-NEXT: rldicl 3, 3, 63, 1
54; CHECK-NEXT: ori 4, 4, 43690
55; CHECK-NEXT: ori 5, 5, 21845
56; CHECK-NEXT: ori 6, 6, 52428
57; CHECK-NEXT: ori 7, 7, 13107
58; CHECK-NEXT: sldi 4, 4, 32
59; CHECK-NEXT: sldi 5, 5, 32
60; CHECK-NEXT: oris 4, 4, 43690
61; CHECK-NEXT: oris 5, 5, 21845
62; CHECK-NEXT: ori 4, 4, 43690
63; CHECK-NEXT: ori 5, 5, 21845
64; CHECK-NEXT: and 3, 3, 5
65; CHECK-NEXT: sldi 5, 6, 32
66; CHECK-NEXT: sldi 6, 7, 32
67; CHECK-NEXT: and 4, 8, 4
68; CHECK-NEXT: lis 7, 3855
69; CHECK-NEXT: or 3, 3, 4
70; CHECK-NEXT: oris 12, 5, 52428
71; CHECK-NEXT: oris 9, 6, 13107
72; CHECK-NEXT: lis 6, -3856
73; CHECK-NEXT: ori 7, 7, 3855
74; CHECK-NEXT: sldi 8, 3, 2
75; CHECK-NEXT: ori 4, 12, 52428
76; CHECK-NEXT: rldicl 3, 3, 62, 2
77; CHECK-NEXT: ori 5, 9, 13107
78; CHECK-NEXT: ori 6, 6, 61680
79; CHECK-NEXT: and 3, 3, 5
80; CHECK-NEXT: sldi 5, 6, 32
81; CHECK-NEXT: and 4, 8, 4
82; CHECK-NEXT: sldi 6, 7, 32
83; CHECK-NEXT: or 3, 3, 4
84; CHECK-NEXT: oris 10, 5, 61680
85; CHECK-NEXT: oris 11, 6, 3855
86; CHECK-NEXT: sldi 6, 3, 4
87; CHECK-NEXT: ori 4, 10, 61680
88; CHECK-NEXT: rldicl 3, 3, 60, 4
89; CHECK-NEXT: ori 5, 11, 3855
90; CHECK-NEXT: and 4, 6, 4
91; CHECK-NEXT: and 3, 3, 5
92; CHECK-NEXT: or 3, 3, 4
93; CHECK-NEXT: rldicl 4, 3, 32, 32
94; CHECK-NEXT: rlwinm 6, 3, 24, 0, 31
95; CHECK-NEXT: rlwinm 5, 4, 24, 0, 31
96; CHECK-NEXT: rlwimi 6, 3, 8, 8, 15
97; CHECK-NEXT: rlwimi 5, 4, 8, 8, 15
98; CHECK-NEXT: rlwimi 6, 3, 8, 24, 31
99; CHECK-NEXT: rlwimi 5, 4, 8, 24, 31
100; CHECK-NEXT: sldi 12, 5, 32
101; CHECK-NEXT: or 3, 12, 6
102; CHECK-NEXT: blr
103 %res = call i64 @llvm.bitreverse.i64(i64 %arg)
104 ret i64 %res
105}