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Christian Konig2c8f6d52013-03-07 09:03:52 +00001//===---- AMDCallingConv.td - Calling Conventions for Radeon GPUs ---------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This describes the calling conventions for the AMD Radeon GPUs.
11//
12//===----------------------------------------------------------------------===//
13
14// Inversion of CCIfInReg
15class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
16
17// Calling convention for SI
18def CC_SI : CallingConv<[
19
20 CCIfInReg<CCIfType<[f32, i32] , CCAssignToReg<[
21 SGPR0, SGPR1, SGPR2, SGPR3, SGPR4, SGPR5, SGPR6, SGPR7,
Tom Stellardafcf12f2013-09-12 02:55:14 +000022 SGPR8, SGPR9, SGPR10, SGPR11, SGPR12, SGPR13, SGPR14, SGPR15,
23 SGPR16
Christian Konig2c8f6d52013-03-07 09:03:52 +000024 ]>>>,
25
26 CCIfInReg<CCIfType<[i64] , CCAssignToRegWithShadow<
27 [ SGPR0, SGPR2, SGPR4, SGPR6, SGPR8, SGPR10, SGPR12, SGPR14 ],
Tom Stellarda36f0772013-08-14 22:22:03 +000028 [ SGPR1, SGPR3, SGPR5, SGPR7, SGPR9, SGPR11, SGPR13, SGPR15 ]
Christian Konig2c8f6d52013-03-07 09:03:52 +000029 >>>,
30
31 CCIfNotInReg<CCIfType<[f32, i32] , CCAssignToReg<[
32 VGPR0, VGPR1, VGPR2, VGPR3, VGPR4, VGPR5, VGPR6, VGPR7,
33 VGPR8, VGPR9, VGPR10, VGPR11, VGPR12, VGPR13, VGPR14, VGPR15,
34 VGPR16, VGPR17, VGPR18, VGPR19, VGPR20, VGPR21, VGPR22, VGPR23,
35 VGPR24, VGPR25, VGPR26, VGPR27, VGPR28, VGPR29, VGPR30, VGPR31
Vincent Lejeuned6236442013-10-13 17:56:16 +000036 ]>>>,
37
38 CCIfByVal<CCIfType<[i64] , CCAssignToRegWithShadow<
39 [ SGPR0, SGPR2, SGPR4, SGPR6, SGPR8, SGPR10, SGPR12, SGPR14 ],
40 [ SGPR1, SGPR3, SGPR5, SGPR7, SGPR9, SGPR11, SGPR13, SGPR15 ]
41 >>>
Christian Konig2c8f6d52013-03-07 09:03:52 +000042
Tom Stellarded882c22013-06-03 17:40:11 +000043]>;
44
Tom Stellardacfeebf2013-07-23 01:48:05 +000045// Calling convention for compute kernels
46def CC_AMDGPU_Kernel : CallingConv<[
Tom Stellard0344cdf2013-08-01 15:23:42 +000047 CCIfType<[v4i32, v4f32], CCAssignToStack <16, 16>>,
48 CCIfType<[i64, f64, v2f32, v2i32], CCAssignToStack < 8, 8>>,
49 CCIfType<[i32, f32], CCAssignToStack < 4, 4>>,
50 CCIfType<[i16], CCAssignToStack < 2, 4>>,
51 CCIfType<[i8], CCAssignToStack < 1, 4>>
Christian Konig2c8f6d52013-03-07 09:03:52 +000052]>;
53
54def CC_AMDGPU : CallingConv<[
Tom Stellardacfeebf2013-07-23 01:48:05 +000055 CCIf<"State.getTarget().getSubtarget<AMDGPUSubtarget>().getGeneration() == "
56 "AMDGPUSubtarget::SOUTHERN_ISLANDS && "
57 "State.getMachineFunction().getInfo<SIMachineFunctionInfo>()->"#
58 "ShaderType == ShaderType::COMPUTE", CCDelegateTo<CC_AMDGPU_Kernel>>,
59 CCIf<"State.getTarget().getSubtarget<AMDGPUSubtarget>().getGeneration() < "
60 "AMDGPUSubtarget::SOUTHERN_ISLANDS && "
61 "State.getMachineFunction().getInfo<R600MachineFunctionInfo>()->"
62 "ShaderType == ShaderType::COMPUTE", CCDelegateTo<CC_AMDGPU_Kernel>>,
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000063 CCIf<"State.getTarget().getSubtarget<AMDGPUSubtarget>()"#
64 ".getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS", CCDelegateTo<CC_SI>>
Christian Konig2c8f6d52013-03-07 09:03:52 +000065]>;