blob: 367567183a04ca26e343e6259b9cc4615fa2bb51 [file] [log] [blame]
Alexey Bataevdb390212015-05-20 04:24:19 +00001// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s
2// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -emit-pch -o %t %s
3// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
Alexey Bataevb4505a72015-03-30 05:20:59 +00004// expected-no-diagnostics
Alexey Bataevb4505a72015-03-30 05:20:59 +00005#ifndef HEADER
6#define HEADER
7
8_Bool bv, bx;
9char cv, cx;
10unsigned char ucv, ucx;
11short sv, sx;
12unsigned short usv, usx;
13int iv, ix;
14unsigned int uiv, uix;
15long lv, lx;
16unsigned long ulv, ulx;
17long long llv, llx;
18unsigned long long ullv, ullx;
19float fv, fx;
20double dv, dx;
21long double ldv, ldx;
22_Complex int civ, cix;
23_Complex float cfv, cfx;
24_Complex double cdv, cdx;
25
26typedef int int4 __attribute__((__vector_size__(16)));
27int4 int4x;
28
29struct BitFields {
30 int : 32;
31 int a : 31;
32} bfx;
33
34struct BitFields_packed {
35 int : 32;
36 int a : 31;
37} __attribute__ ((__packed__)) bfx_packed;
38
39struct BitFields2 {
40 int : 31;
41 int a : 1;
42} bfx2;
43
44struct BitFields2_packed {
45 int : 31;
46 int a : 1;
47} __attribute__ ((__packed__)) bfx2_packed;
48
49struct BitFields3 {
50 int : 11;
51 int a : 14;
52} bfx3;
53
54struct BitFields3_packed {
55 int : 11;
56 int a : 14;
57} __attribute__ ((__packed__)) bfx3_packed;
58
59struct BitFields4 {
60 short : 16;
61 int a: 1;
62 long b : 7;
63} bfx4;
64
65struct BitFields4_packed {
66 short : 16;
67 int a: 1;
68 long b : 7;
69} __attribute__ ((__packed__)) bfx4_packed;
70
71typedef float float2 __attribute__((ext_vector_type(2)));
72float2 float2x;
73
Akira Hatanaka8c26ea62015-11-18 00:15:28 +000074// Register "0" is currently an invalid register for global register variables.
75// Use "esp" instead of "0".
76// register int rix __asm__("0");
77register int rix __asm__("esp");
Alexey Bataevb4505a72015-03-30 05:20:59 +000078
79int main() {
Alexey Bataev9d541a72015-05-08 11:47:16 +000080// CHECK-NOT: atomicrmw
81#pragma omp atomic
82 ++dv;
Alexey Bataevb4505a72015-03-30 05:20:59 +000083// CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic
84#pragma omp atomic
85 bx++;
86// CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic
87#pragma omp atomic update
88 ++cx;
89// CHECK: atomicrmw sub i8* @{{.+}}, i8 1 monotonic
90#pragma omp atomic
91 ucx--;
92// CHECK: atomicrmw sub i16* @{{.+}}, i16 1 monotonic
93#pragma omp atomic update
94 --sx;
95// CHECK: [[USV:%.+]] = load i16, i16* @{{.+}},
96// CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i32
97// CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic
98// CHECK: br label %[[CONT:.+]]
99// CHECK: [[CONT]]
100// CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
101// CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32
102// CHECK: [[ADD:%.+]] = add nsw i32 [[CONV]], [[EXPR]]
103// CHECK: [[DESIRED:%.+]] = trunc i32 [[ADD]] to i16
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000104// CHECK: store i16 [[DESIRED]], i16* [[TEMP:%.+]],
105// CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000106// CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic
107// CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0
108// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1
109// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
110// CHECK: [[EXIT]]
111#pragma omp atomic
112 usx += usv;
113// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
114// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic
115// CHECK: br label %[[CONT:.+]]
116// CHECK: [[CONT]]
117// CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
118// CHECK: [[DESIRED:%.+]] = mul nsw i32 [[EXPECTED]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000119// CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]],
120// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000121// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic
122// CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
123// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
124// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
125// CHECK: [[EXIT]]
126#pragma omp atomic update
127 ix *= iv;
128// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
129// CHECK: atomicrmw sub i32* @{{.+}}, i32 [[EXPR]] monotonic
130#pragma omp atomic
131 uix -= uiv;
132// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
133// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic
134// CHECK: br label %[[CONT:.+]]
135// CHECK: [[CONT]]
136// CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
137// CHECK: [[DESIRED:%.+]] = shl i32 [[EXPECTED]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000138// CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]],
139// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000140// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic
141// CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
142// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
143// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
144// CHECK: [[EXIT]]
145#pragma omp atomic update
146 ix <<= iv;
147// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
148// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic
149// CHECK: br label %[[CONT:.+]]
150// CHECK: [[CONT]]
151// CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
152// CHECK: [[DESIRED:%.+]] = lshr i32 [[EXPECTED]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000153// CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]],
154// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000155// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic
156// CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
157// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
158// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
159// CHECK: [[EXIT]]
160#pragma omp atomic
161 uix >>= uiv;
162// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
163// CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic
164// CHECK: br label %[[CONT:.+]]
165// CHECK: [[CONT]]
166// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
167// CHECK: [[DESIRED:%.+]] = sdiv i64 [[EXPECTED]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000168// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]],
169// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000170// CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
171// CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0
172// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
173// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
174// CHECK: [[EXIT]]
175#pragma omp atomic update
176 lx /= lv;
177// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
178// CHECK: atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic
179#pragma omp atomic
180 ulx &= ulv;
181// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
182// CHECK: atomicrmw xor i64* @{{.+}}, i64 [[EXPR]] monotonic
183#pragma omp atomic update
184 llx ^= llv;
185// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
186// CHECK: atomicrmw or i64* @{{.+}}, i64 [[EXPR]] monotonic
187#pragma omp atomic
188 ullx |= ullv;
189// CHECK: [[EXPR:%.+]] = load float, float* @{{.+}},
190// CHECK: [[OLD:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000191// CHECK: br label %[[CONT:.+]]
192// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000193// CHECK: [[EXPECTED:%.+]] = phi i32 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ]
194// CHECK: [[BITCAST:%.+]] = bitcast float* [[TEMP:%.+]] to i32*
195// CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float
Alexey Bataevb4505a72015-03-30 05:20:59 +0000196// CHECK: [[ADD:%.+]] = fadd float [[OLD]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000197// CHECK: store float [[ADD]], float* [[TEMP]],
198// CHECK: [[DESIRED:%.+]] = load i32, i32* [[BITCAST]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000199// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic
200// CHECK: [[PREV:%.+]] = extractvalue { i32, i1 } [[RES]], 0
201// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000202// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
203// CHECK: [[EXIT]]
204#pragma omp atomic update
205 fx = fx + fv;
206// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
207// CHECK: [[OLD:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000208// CHECK: br label %[[CONT:.+]]
209// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000210// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ]
211// CHECK: [[BITCAST:%.+]] = bitcast double* [[TEMP:%.+]] to i64*
212// CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double
Alexey Bataevb4505a72015-03-30 05:20:59 +0000213// CHECK: [[SUB:%.+]] = fsub double [[EXPR]], [[OLD]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000214// CHECK: store double [[SUB]], double* [[TEMP]],
215// CHECK: [[DESIRED:%.+]] = load i64, i64* [[BITCAST]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000216// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
217// CHECK: [[PREV:%.+]] = extractvalue { i64, i1 } [[RES]], 0
218// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000219// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
220// CHECK: [[EXIT]]
221#pragma omp atomic
222 dx = dv - dx;
223// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}},
224// CHECK: [[OLD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000225// CHECK: br label %[[CONT:.+]]
226// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000227// CHECK: [[EXPECTED:%.+]] = phi i128 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ]
228// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128*
229// CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]],
230// CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128*
231// CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]],
232// CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP1]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000233// CHECK: [[MUL:%.+]] = fmul x86_fp80 [[OLD]], [[EXPR]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000234// CHECK: store x86_fp80 [[MUL]], x86_fp80* [[TEMP]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000235// CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST]]
236// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic
237// CHECK: [[PREV:%.+]] = extractvalue { i128, i1 } [[RES]], 0
238// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000239// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
240// CHECK: [[EXIT]]
241#pragma omp atomic update
242 ldx = ldx * ldv;
243// CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0)
244// CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1)
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000245// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
Alexey Bataevb4505a72015-03-30 05:20:59 +0000246// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000247// CHECK: br label %[[CONT:.+]]
248// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000249// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
Alexey Bataevb4505a72015-03-30 05:20:59 +0000250// CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000251// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000252// CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]]
253// <Skip checks for complex calculations>
Alexey Bataevb4505a72015-03-30 05:20:59 +0000254// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
255// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
256// CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]]
257// CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]]
258// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
259// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
260// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000261// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
262// CHECK: [[EXIT]]
263#pragma omp atomic
264 cix = civ / cix;
265// CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0)
266// CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1)
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000267// CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8*
Alexey Bataevb4505a72015-03-30 05:20:59 +0000268// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000269// CHECK: br label %[[CONT:.+]]
270// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000271// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0
Alexey Bataevb4505a72015-03-30 05:20:59 +0000272// CHECK: [[X_RE:%.+]] = load float, float* [[X_RE_ADDR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000273// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000274// CHECK: [[X_IM:%.+]] = load float, float* [[X_IM_ADDR]]
275// <Skip checks for complex calculations>
Alexey Bataevb4505a72015-03-30 05:20:59 +0000276// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
277// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR]], i32 0, i32 1
278// CHECK: store float %{{.+}}, float* [[X_RE_ADDR]]
279// CHECK: store float %{{.+}}, float* [[X_IM_ADDR]]
280// CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8*
281// CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8*
282// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000283// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
284// CHECK: [[EXIT]]
285#pragma omp atomic update
286 cfx = cfv + cfx;
287// CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0)
288// CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1)
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000289// CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8*
Alexey Bataevb4505a72015-03-30 05:20:59 +0000290// CHECK: call void @__atomic_load(i64 16, i8* bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 5)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000291// CHECK: br label %[[CONT:.+]]
292// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000293// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0
Alexey Bataevb4505a72015-03-30 05:20:59 +0000294// CHECK: [[X_RE:%.+]] = load double, double* [[X_RE_ADDR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000295// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000296// CHECK: [[X_IM:%.+]] = load double, double* [[X_IM_ADDR]]
297// <Skip checks for complex calculations>
Alexey Bataevb4505a72015-03-30 05:20:59 +0000298// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
299// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR]], i32 0, i32 1
300// CHECK: store double %{{.+}}, double* [[X_RE_ADDR]]
301// CHECK: store double %{{.+}}, double* [[X_IM_ADDR]]
302// CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8*
303// CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8*
304// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 16, i8* bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000305// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
306// CHECK: [[EXIT]]
307// CHECK: call{{.*}} @__kmpc_flush(
308#pragma omp atomic seq_cst
309 cdx = cdx - cdv;
310// CHECK: [[BV:%.+]] = load i8, i8* @{{.+}}
311// CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1
312// CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64
313// CHECK: atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic
314#pragma omp atomic update
315 ulx = ulx & bv;
316// CHECK: [[CV:%.+]] = load i8, i8* @{{.+}}, align 1
317// CHECK: [[EXPR:%.+]] = sext i8 [[CV]] to i32
318// CHECK: [[BX:%.+]] = load atomic i8, i8* [[BX_ADDR:@.+]] monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000319// CHECK: br label %[[CONT:.+]]
320// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000321// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[BX]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
322// CHECK: [[OLD:%.+]] = trunc i8 [[EXPECTED]] to i1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000323// CHECK: [[X_RVAL:%.+]] = zext i1 [[OLD]] to i32
324// CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]]
325// CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0
Alexey Bataevb4505a72015-03-30 05:20:59 +0000326// CHECK: [[DESIRED:%.+]] = zext i1 [[CAST]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000327// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]],
328// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000329// CHECK: [[RES:%.+]] = cmpxchg i8* [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000330// CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
Alexey Bataevb4505a72015-03-30 05:20:59 +0000331// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000332// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
333// CHECK: [[EXIT]]
334#pragma omp atomic
335 bx = cv & bx;
336// CHECK: [[UCV:%.+]] = load i8, i8* @{{.+}},
337// CHECK: [[EXPR:%.+]] = zext i8 [[UCV]] to i32
338// CHECK: [[X:%.+]] = load atomic i8, i8* [[CX_ADDR:@.+]] seq_cst
339// CHECK: br label %[[CONT:.+]]
340// CHECK: [[CONT]]
341// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
342// CHECK: [[X_RVAL:%.+]] = sext i8 [[EXPECTED]] to i32
343// CHECK: [[ASHR:%.+]] = ashr i32 [[X_RVAL]], [[EXPR]]
344// CHECK: [[DESIRED:%.+]] = trunc i32 [[ASHR]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000345// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]],
346// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000347// CHECK: [[RES:%.+]] = cmpxchg i8* [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst
348// CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
349// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
350// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
351// CHECK: [[EXIT]]
352// CHECK: call{{.*}} @__kmpc_flush(
353#pragma omp atomic update, seq_cst
354 cx = cx >> ucv;
355// CHECK: [[SV:%.+]] = load i16, i16* @{{.+}},
356// CHECK: [[EXPR:%.+]] = sext i16 [[SV]] to i32
357// CHECK: [[X:%.+]] = load atomic i64, i64* [[ULX_ADDR:@.+]] monotonic
358// CHECK: br label %[[CONT:.+]]
359// CHECK: [[CONT]]
360// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
361// CHECK: [[X_RVAL:%.+]] = trunc i64 [[EXPECTED]] to i32
362// CHECK: [[SHL:%.+]] = shl i32 [[EXPR]], [[X_RVAL]]
363// CHECK: [[DESIRED:%.+]] = sext i32 [[SHL]] to i64
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000364// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]],
365// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000366// CHECK: [[RES:%.+]] = cmpxchg i64* [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
367// CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
368// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
369// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
370// CHECK: [[EXIT]]
371#pragma omp atomic update
372 ulx = sv << ulx;
373// CHECK: [[USV:%.+]] = load i16, i16* @{{.+}},
374// CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i64
375// CHECK: [[X:%.+]] = load atomic i64, i64* [[LX_ADDR:@.+]] monotonic
376// CHECK: br label %[[CONT:.+]]
377// CHECK: [[CONT]]
378// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
379// CHECK: [[DESIRED:%.+]] = srem i64 [[EXPECTED]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000380// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]],
381// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000382// CHECK: [[RES:%.+]] = cmpxchg i64* [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
383// CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
384// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
385// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
386// CHECK: [[EXIT]]
387#pragma omp atomic
388 lx = lx % usv;
389// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}
390// CHECK: atomicrmw or i32* @{{.+}}, i32 [[EXPR]] seq_cst
391// CHECK: call{{.*}} @__kmpc_flush(
392#pragma omp atomic seq_cst, update
393 uix = iv | uix;
394// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}
395// CHECK: atomicrmw and i32* @{{.+}}, i32 [[EXPR]] monotonic
396#pragma omp atomic
397 ix = ix & uiv;
398// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000399// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
Alexey Bataevb4505a72015-03-30 05:20:59 +0000400// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000401// CHECK: br label %[[CONT:.+]]
402// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000403// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
Alexey Bataevb4505a72015-03-30 05:20:59 +0000404// CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000405// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000406// CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]]
407// <Skip checks for complex calculations>
Alexey Bataevb4505a72015-03-30 05:20:59 +0000408// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
409// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
410// CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]]
411// CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]]
412// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
413// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
414// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000415// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
416// CHECK: [[EXIT]]
417#pragma omp atomic update
418 cix = lv + cix;
419// CHECK: [[ULV:%.+]] = load i64, i64* @{{.+}},
420// CHECK: [[EXPR:%.+]] = uitofp i64 [[ULV]] to float
421// CHECK: [[OLD:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000422// CHECK: br label %[[CONT:.+]]
423// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000424// CHECK: [[EXPECTED:%.+]] = phi i32 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ]
425// CHECK: [[BITCAST:%.+]] = bitcast float* [[TEMP:%.+]] to i32*
426// CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float
Alexey Bataevb4505a72015-03-30 05:20:59 +0000427// CHECK: [[MUL:%.+]] = fmul float [[OLD]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000428// CHECK: store float [[MUL]], float* [[TEMP]],
429// CHECK: [[DESIRED:%.+]] = load i32, i32* [[BITCAST]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000430// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic
431// CHECK: [[PREV:%.+]] = extractvalue { i32, i1 } [[RES]], 0
432// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000433// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
434// CHECK: [[EXIT]]
435#pragma omp atomic
436 fx = fx * ulv;
437// CHECK: [[LLV:%.+]] = load i64, i64* @{{.+}},
438// CHECK: [[EXPR:%.+]] = sitofp i64 [[LLV]] to double
439// CHECK: [[OLD:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000440// CHECK: br label %[[CONT:.+]]
441// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000442// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ]
443// CHECK: [[BITCAST:%.+]] = bitcast double* [[TEMP:%.+]] to i64*
444// CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double
Alexey Bataevb4505a72015-03-30 05:20:59 +0000445// CHECK: [[DIV:%.+]] = fdiv double [[OLD]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000446// CHECK: store double [[DIV]], double* [[TEMP]],
447// CHECK: [[DESIRED:%.+]] = load i64, i64* [[BITCAST]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000448// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
449// CHECK: [[PREV:%.+]] = extractvalue { i64, i1 } [[RES]], 0
450// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000451// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
452// CHECK: [[EXIT]]
453#pragma omp atomic update
454 dx /= llv;
455// CHECK: [[ULLV:%.+]] = load i64, i64* @{{.+}},
456// CHECK: [[EXPR:%.+]] = uitofp i64 [[ULLV]] to x86_fp80
457// CHECK: [[OLD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000458// CHECK: br label %[[CONT:.+]]
459// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000460// CHECK: [[EXPECTED:%.+]] = phi i128 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ]
461// CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128*
462// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128*
463// CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]]
464// CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000465// CHECK: [[SUB:%.+]] = fsub x86_fp80 [[OLD]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000466// CHECK: store x86_fp80 [[SUB]], x86_fp80* [[TEMP1]]
467// CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST1]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000468// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic
469// CHECK: [[PREV:%.+]] = extractvalue { i128, i1 } [[RES]], 0
470// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000471// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
472// CHECK: [[EXIT]]
473#pragma omp atomic
474 ldx -= ullv;
475// CHECK: [[EXPR:%.+]] = load float, float* @{{.+}},
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000476// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
Alexey Bataevb4505a72015-03-30 05:20:59 +0000477// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000478// CHECK: br label %[[CONT:.+]]
479// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000480// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
Alexey Bataevb4505a72015-03-30 05:20:59 +0000481// CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000482// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000483// CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]]
484// <Skip checks for complex calculations>
Alexey Bataevb4505a72015-03-30 05:20:59 +0000485// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
486// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
487// CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]]
488// CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]]
489// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
490// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
491// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000492// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
493// CHECK: [[EXIT]]
494#pragma omp atomic update
495 cix = fv / cix;
496// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
497// CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic
498// CHECK: br label %[[CONT:.+]]
499// CHECK: [[CONT]]
500// CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
501// CHECK: [[CONV:%.+]] = sext i16 [[EXPECTED]] to i32
502// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to double
503// CHECK: [[ADD:%.+]] = fadd double [[X_RVAL]], [[EXPR]]
504// CHECK: [[DESIRED:%.+]] = fptosi double [[ADD]] to i16
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000505// CHECK: store i16 [[DESIRED]], i16* [[TEMP:%.+]]
506// CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000507// CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic
508// CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0
509// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1
510// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
511// CHECK: [[EXIT]]
512#pragma omp atomic
513 sx = sx + dv;
514// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}},
515// CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000516// CHECK: br label %[[CONT:.+]]
517// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000518// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_XI8:%.+]], %[[CONT]] ]
519// CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000520// CHECK: [[CONV:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
521// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to x86_fp80
522// CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]]
523// CHECK: [[BOOL_DESIRED:%.+]] = fcmp une x86_fp80 [[MUL]], 0xK00000000000000000000
Alexey Bataevb4505a72015-03-30 05:20:59 +0000524// CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000525// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]]
526// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000527// CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic
528// CHECK: [[OLD_XI8:%.+]] = extractvalue { i8, i1 } [[RES]], 0
529// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000530// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
531// CHECK: [[EXIT]]
532#pragma omp atomic update
533 bx = ldv * bx;
534// CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR:@.+]], i32 0, i32 0),
535// CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR]], i32 0, i32 1),
536// CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000537// CHECK: br label %[[CONT:.+]]
538// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000539// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_XI8:%.+]], %[[CONT]] ]
540// CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000541// CHECK: [[X_RVAL:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
542// CHECK: [[SUB_RE:%.+]] = sub i32 [[EXPR_RE:%.+]], [[X_RVAL]]
543// CHECK: [[SUB_IM:%.+]] = sub i32 [[EXPR_IM:%.+]], 0
544// CHECK: icmp ne i32 [[SUB_RE]], 0
545// CHECK: icmp ne i32 [[SUB_IM]], 0
546// CHECK: [[BOOL_DESIRED:%.+]] = or i1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000547// CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000548// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]]
549// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000550// CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic
551// CHECK: [[OLD_XI8:%.+]] = extractvalue { i8, i1 } [[RES]], 0
552// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000553// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
554// CHECK: [[EXIT]]
555#pragma omp atomic
556 bx = civ - bx;
Alexey Bataevb4505a72015-03-30 05:20:59 +0000557// CHECK: [[IDX:%.+]] = load i16, i16* @{{.+}}
558// CHECK: load i8, i8*
559// CHECK: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32
560// CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000561// CHECK: br label %[[CONT:.+]]
562// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000563// CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_I128_OLD_VAL:%.+]], %[[CONT]] ]
564// CHECK: [[BITCAST:%.+]] = bitcast <4 x i32>* [[TEMP:%.+]] to i128*
565// CHECK: store i128 [[OLD_I128]], i128* [[BITCAST]],
566// CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i128 [[OLD_I128]] to <4 x i32>
Alexey Bataevb4505a72015-03-30 05:20:59 +0000567// CHECK: store <4 x i32> [[OLD_VEC_VAL]], <4 x i32>* [[LDTEMP:%.+]],
568// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[LDTEMP]]
569// CHECK: [[ITEM:%.+]] = extractelement <4 x i32> [[VEC_VAL]], i16 [[IDX]]
570// CHECK: [[OR:%.+]] = or i32 [[ITEM]], [[VEC_ITEM_VAL]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000571// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000572// CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[OR]], i16 [[IDX]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000573// CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[TEMP]]
574// CHECK: [[NEW_I128:%.+]] = load i128, i128* [[BITCAST]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000575// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic
576// CHECK: [[FAILED_I128_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0
577// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000578// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
579// CHECK: [[EXIT]]
580#pragma omp atomic update
581 int4x[sv] |= bv;
582// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
583// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic
584// CHECK: br label %[[CONT:.+]]
585// CHECK: [[CONT]]
586// CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000587// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000588// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
589// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
590// CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
591// CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
592// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
593// CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
594// CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000595// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000596// CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
597// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
598// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000599// CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
600// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000601// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic
602// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
603// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
604// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
605// CHECK: [[EXIT]]
606#pragma omp atomic
607 bfx.a = bfx.a - ldv;
608// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
609// CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8*
610// CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST]], i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000611// CHECK: br label %[[CONT:.+]]
612// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000613// CHECK: [[PREV_VALUE:%.+]] = load i32, i32* [[LDTEMP]]
614// CHECK: store i32 [[PREV_VALUE]], i32* [[TEMP1:%.+]],
615// CHECK: [[PREV_VALUE:%.+]] = load i32, i32* [[LDTEMP]]
616// CHECK: store i32 [[PREV_VALUE]], i32* [[TEMP:%.+]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000617// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
618// CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
619// CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
620// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
621// CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
622// CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000623// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000624// CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
625// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
626// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000627// CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
628// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8*
629// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8*
Alexey Bataevb4505a72015-03-30 05:20:59 +0000630// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000631// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
632// CHECK: [[EXIT]]
633#pragma omp atomic update
634 bfx_packed.a *= ldv;
635// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
636// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic
637// CHECK: br label %[[CONT:.+]]
638// CHECK: [[CONT]]
639// CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000640// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000641// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
642// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
643// CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31
644// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
645// CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
646// CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000647// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000648// CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1
649// CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31
650// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647
651// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000652// CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
653// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000654// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic
655// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
656// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
657// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
658// CHECK: [[EXIT]]
659#pragma omp atomic
660 bfx2.a -= ldv;
661// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
662// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic
663// CHECK: br label %[[CONT:.+]]
664// CHECK: [[CONT]]
665// CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000666// CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8*
667// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000668// CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8*
669// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
670// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
671// CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 7
672// CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i32
673// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80
674// CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[EXPR]], [[X_RVAL]]
675// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32
676// CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000677// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000678// CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1
679// CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7
680// CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127
681// CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000682// CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
683// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000684// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic
685// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
686// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
687// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
688// CHECK: [[EXIT]]
689#pragma omp atomic update
690 bfx2_packed.a = ldv / bfx2_packed.a;
691// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
692// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic
693// CHECK: br label %[[CONT:.+]]
694// CHECK: [[CONT]]
695// CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000696// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000697// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
698// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
699// CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 7
700// CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 18
701// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
702// CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[X_RVAL]], [[EXPR]]
703// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000704// CHECK: [[BF_LD:%.+]] = load i32, i32* [[TEMP1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000705// CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383
706// CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11
707// CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385
708// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000709// CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
710// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000711// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic
712// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
713// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
714// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
715// CHECK: [[EXIT]]
716#pragma omp atomic
717 bfx3.a /= ldv;
718// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
719// CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24*
720// CHECK: [[BITCAST:%.+]] = bitcast i24* %{{.+}} to i8*
721// CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST]], i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000722// CHECK: br label %[[CONT:.+]]
723// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000724// CHECK: [[PREV_VALUE:%.+]] = load i24, i24* [[LDTEMP]]
725// CHECK: store i24 [[PREV_VALUE]], i24* [[TEMP1:%.+]],
726// CHECK: [[PREV_VALUE:%.+]] = load i24, i24* [[LDTEMP]]
727// CHECK: store i24 [[PREV_VALUE]], i24* [[TEMP:%.+]],
728// CHECK: [[A_LD:%.+]] = load i24, i24* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000729// CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7
730// CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10
731// CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32
732// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80
733// CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]]
734// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32
735// CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000736// CHECK: [[BF_LD:%.+]] = load i24, i24* [[TEMP1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000737// CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383
738// CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3
739// CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065
740// CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000741// CHECK: store i24 %{{.+}}, i24* [[TEMP1]]
742// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8*
743// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[TEMP1]] to i8*
Alexey Bataevb4505a72015-03-30 05:20:59 +0000744// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0)
Alexey Bataevb4505a72015-03-30 05:20:59 +0000745// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
746// CHECK: [[EXIT]]
747#pragma omp atomic update
748 bfx3_packed.a += ldv;
749// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
750// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic
751// CHECK: br label %[[CONT:.+]]
752// CHECK: [[CONT]]
753// CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000754// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000755// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]],
756// CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]],
757// CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47
758// CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63
759// CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32
760// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST:%.+]] to x86_fp80
761// CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
762// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32
763// CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000764// CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000765// CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1
766// CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16
767// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537
768// CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000769// CHECK: store i64 %{{.+}}, i64* [[TEMP1]]
770// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000771// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic
772// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
773// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
774// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
775// CHECK: [[EXIT]]
776#pragma omp atomic
777 bfx4.a = bfx4.a * ldv;
778// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
779// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic
780// CHECK: br label %[[CONT:.+]]
781// CHECK: [[CONT]]
782// CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000783// CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8*
784// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000785// CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8*
786// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
787// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
788// CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7
789// CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7
790// CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32
791// CHECK: [[CONV:%.+]] = sitofp i32 [[CAST]] to x86_fp80
792// CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]]
793// CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32
794// CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000795// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000796// CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1
797// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2
798// CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000799// CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
800// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000801// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic
802// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
803// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
804// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
805// CHECK: [[EXIT]]
806#pragma omp atomic update
807 bfx4_packed.a -= ldv;
808// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
809// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic
810// CHECK: br label %[[CONT:.+]]
811// CHECK: [[CONT]]
812// CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000813// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000814// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]],
815// CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]],
816// CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40
817// CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57
818// CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80
819// CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]]
820// CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000821// CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000822// CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127
823// CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17
824// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145
825// CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000826// CHECK: store i64 [[VAL]], i64* [[TEMP1]]
827// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000828// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic
829// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
830// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
831// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
832// CHECK: [[EXIT]]
833#pragma omp atomic
834 bfx4.b /= ldv;
835// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
836// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic
837// CHECK: br label %[[CONT:.+]]
838// CHECK: [[CONT]]
839// CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000840// CHECK: [[BITCAST1:%.+]] = bitcast i64* %{{.+}} to i8*
841// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000842// CHECK: [[BITCAST:%.+]] = bitcast i64* %{{.+}} to i8*
843// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
844// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
845// CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1
846// CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64
847// CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80
848// CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]]
849// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64
850// CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000851// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000852// CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127
853// CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1
854// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1
855// CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000856// CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
857// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000858// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic
859// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
860// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
861// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
862// CHECK: [[EXIT]]
863#pragma omp atomic update
864 bfx4_packed.b += ldv;
865// CHECK: load i64, i64*
866// CHECK: [[EXPR:%.+]] = uitofp i64 %{{.+}} to float
867// CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) monotonic
Alexey Bataevb4505a72015-03-30 05:20:59 +0000868// CHECK: br label %[[CONT:.+]]
869// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000870// CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ]
871// CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[TEMP:%.+]] to i64*
872// CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]],
873// CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i64 [[OLD_I64]] to <2 x float>
Alexey Bataevb4505a72015-03-30 05:20:59 +0000874// CHECK: store <2 x float> [[OLD_VEC_VAL]], <2 x float>* [[LDTEMP:%.+]],
875// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]]
876// CHECK: [[X:%.+]] = extractelement <2 x float> [[VEC_VAL]], i64 0
877// CHECK: [[VEC_ITEM_VAL:%.+]] = fsub float [[EXPR]], [[X]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000878// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[TEMP]],
Alexey Bataevb4505a72015-03-30 05:20:59 +0000879// CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000880// CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[TEMP]]
881// CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]]
Alexey Bataevb4505a72015-03-30 05:20:59 +0000882// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] monotonic monotonic
883// CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0
884// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
Alexey Bataevb4505a72015-03-30 05:20:59 +0000885// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
886// CHECK: [[EXIT]]
887#pragma omp atomic
888 float2x.x = ulv - float2x.x;
889// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
890// CHECK: [[OLD_VAL:%.+]] = call i32 @llvm.read_register.i32([[REG:metadata ![0-9]+]])
891// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[OLD_VAL]] to double
892// CHECK: [[DIV:%.+]] = fdiv double [[EXPR]], [[X_RVAL]]
893// CHECK: [[NEW_VAL:%.+]] = fptosi double [[DIV]] to i32
894// CHECK: call void @llvm.write_register.i32([[REG]], i32 [[NEW_VAL]])
895// CHECK: call{{.*}} @__kmpc_flush(
896#pragma omp atomic seq_cst
897 rix = dv / rix;
898 return 0;
899}
900
901#endif