| Tom Stellard | 49f8bfd | 2015-01-06 18:00:21 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s |
| Matt Arsenault | f15a056 | 2014-05-22 18:00:20 +0000 | [diff] [blame] | 2 | ; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s |
| 3 | ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s |
| 4 | ; XUN: llc -march=r600 -mcpu=r600 -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s |
| 5 | ; XUN: llc -march=r600 -mcpu=rv770 -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s |
| Matt Arsenault | eb26020 | 2014-05-22 18:00:15 +0000 | [diff] [blame] | 6 | |
| 7 | declare i32 @llvm.AMDGPU.umad24(i32, i32, i32) nounwind readnone |
| Matt Arsenault | 95e4866 | 2014-11-13 19:26:47 +0000 | [diff] [blame] | 8 | declare i32 @llvm.r600.read.tidig.x() nounwind readnone |
| Matt Arsenault | eb26020 | 2014-05-22 18:00:15 +0000 | [diff] [blame] | 9 | |
| Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame] | 10 | ; FUNC-LABEL: {{^}}test_umad24: |
| Tom Stellard | 326d6ec | 2014-11-05 14:50:53 +0000 | [diff] [blame] | 11 | ; SI: v_mad_u32_u24 |
| Matt Arsenault | f15a056 | 2014-05-22 18:00:20 +0000 | [diff] [blame] | 12 | ; EG: MULADD_UINT24 |
| 13 | ; R600: MULLO_UINT |
| 14 | ; R600: ADD_INT |
| Matt Arsenault | eb26020 | 2014-05-22 18:00:15 +0000 | [diff] [blame] | 15 | define void @test_umad24(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) nounwind { |
| 16 | %mad = call i32 @llvm.AMDGPU.umad24(i32 %src0, i32 %src1, i32 %src2) nounwind readnone |
| 17 | store i32 %mad, i32 addrspace(1)* %out, align 4 |
| 18 | ret void |
| 19 | } |
| 20 | |
| Matt Arsenault | 95e4866 | 2014-11-13 19:26:47 +0000 | [diff] [blame] | 21 | ; FUNC-LABEL: {{^}}commute_umad24: |
| 22 | ; SI-DAG: buffer_load_dword [[SRC0:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} |
| Matt Arsenault | fb13b22 | 2014-12-03 03:12:13 +0000 | [diff] [blame] | 23 | ; SI-DAG: buffer_load_dword [[SRC2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4 |
| Matt Arsenault | 95e4866 | 2014-11-13 19:26:47 +0000 | [diff] [blame] | 24 | ; SI: v_mad_u32_u24 [[RESULT:v[0-9]+]], 4, [[SRC0]], [[SRC2]] |
| 25 | ; SI: buffer_store_dword [[RESULT]] |
| 26 | define void @commute_umad24(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { |
| 27 | %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone |
| David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 28 | %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid |
| 29 | %src0.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid |
| 30 | %src2.gep = getelementptr i32, i32 addrspace(1)* %src0.gep, i32 1 |
| Matt Arsenault | 95e4866 | 2014-11-13 19:26:47 +0000 | [diff] [blame] | 31 | |
| David Blaikie | a79ac14 | 2015-02-27 21:17:42 +0000 | [diff] [blame] | 32 | %src0 = load i32, i32 addrspace(1)* %src0.gep, align 4 |
| 33 | %src2 = load i32, i32 addrspace(1)* %src2.gep, align 4 |
| Matt Arsenault | 95e4866 | 2014-11-13 19:26:47 +0000 | [diff] [blame] | 34 | %mad = call i32 @llvm.AMDGPU.umad24(i32 %src0, i32 4, i32 %src2) nounwind readnone |
| 35 | store i32 %mad, i32 addrspace(1)* %out.gep, align 4 |
| 36 | ret void |
| 37 | } |
| 38 | |