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Jia Liub22310f2012-02-18 12:03:15 +00001//===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===//
Misha Brukmanb4402432005-04-21 23:30:14 +00002//
Nate Begeman412602d2004-08-14 22:16:36 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukmanb4402432005-04-21 23:30:14 +00007//
Nate Begeman412602d2004-08-14 22:16:36 +00008//===----------------------------------------------------------------------===//
9//
10//
Nate Begeman6cca84e2005-10-16 05:39:50 +000011//===----------------------------------------------------------------------===//
Nate Begeman412602d2004-08-14 22:16:36 +000012
Benjamin Kramera7c40ef2014-08-13 16:26:38 +000013#ifndef LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H
14#define LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H
Nate Begeman412602d2004-08-14 22:16:36 +000015
Chris Lattnerbfca1ab2005-10-14 23:51:18 +000016#include "PPC.h"
Chandler Carruth802d7552012-12-04 07:12:27 +000017#include "llvm/ADT/STLExtras.h"
Anton Korobeynikov2f931282011-01-10 12:39:04 +000018#include "llvm/Target/TargetFrameLowering.h"
Nate Begeman412602d2004-08-14 22:16:36 +000019#include "llvm/Target/TargetMachine.h"
Nate Begeman412602d2004-08-14 22:16:36 +000020
21namespace llvm {
Eric Christopherd104c312014-06-12 20:54:11 +000022class PPCSubtarget;
Nate Begeman412602d2004-08-14 22:16:36 +000023
Anton Korobeynikov2f931282011-01-10 12:39:04 +000024class PPCFrameLowering: public TargetFrameLowering {
Anton Korobeynikovf7183ed2010-11-15 00:06:54 +000025 const PPCSubtarget &Subtarget;
Eric Christopherf71609b2015-02-13 00:39:27 +000026 const unsigned ReturnSaveOffset;
Eric Christopher736d39e2015-02-13 00:39:36 +000027 const unsigned TOCSaveOffset;
Eric Christopherdc3a8a42015-02-13 00:39:38 +000028 const unsigned FramePointerSaveOffset;
Eric Christophera4ae2132015-02-13 22:22:57 +000029 const unsigned LinkageSize;
Eric Christopherfcd3d872015-02-13 22:48:53 +000030 const unsigned BasePointerSaveOffset;
Misha Brukmanb4402432005-04-21 23:30:14 +000031
Kit Barton9c432ae2015-11-16 20:22:15 +000032 /**
Nemanja Ivanovicae22101c2016-02-20 18:16:25 +000033 * \brief Find register[s] that can be used in function prologue and epilogue
Kit Barton9c432ae2015-11-16 20:22:15 +000034 *
Nemanja Ivanovicae22101c2016-02-20 18:16:25 +000035 * Find register[s] that can be use as scratch register[s] in function
Kit Barton9c432ae2015-11-16 20:22:15 +000036 * prologue and epilogue to save various registers (Link Register, Base
Nemanja Ivanovicae22101c2016-02-20 18:16:25 +000037 * Pointer, etc.). Prefer R0/R12, if available. Otherwise choose whatever
38 * register[s] are available.
Kit Barton9c432ae2015-11-16 20:22:15 +000039 *
Nemanja Ivanovicae22101c2016-02-20 18:16:25 +000040 * This method will return true if it is able to find enough unique scratch
41 * registers (1 or 2 depending on the requirement). If it is unable to find
42 * enough available registers in the block, it will return false and set
43 * any passed output parameter that corresponds to a required unique register
44 * to PPC::NoRegister.
Kit Barton9c432ae2015-11-16 20:22:15 +000045 *
46 * \param[in] MBB The machine basic block to find an available register for
47 * \param[in] UseAtEnd Specify whether the scratch register will be used at
48 * the end of the basic block (i.e., will the scratch
49 * register kill a register defined in the basic block)
Nemanja Ivanovicae22101c2016-02-20 18:16:25 +000050 * \param[in] TwoUniqueRegsRequired Specify whether this basic block will
51 * require two unique scratch registers.
52 * \param[out] SR1 The scratch register to use
53 * \param[out] SR2 The second scratch register. If this pointer is not null
54 * the function will attempt to set it to an available
55 * register regardless of whether there is a hard requirement
56 * for two unique scratch registers.
57 * \return true if the required number of registers was found.
58 * false if the required number of scratch register weren't available.
59 * If either output parameter refers to a required scratch register
60 * that isn't available, it will be set to an invalid value.
Kit Barton9c432ae2015-11-16 20:22:15 +000061 */
62 bool findScratchRegister(MachineBasicBlock *MBB,
63 bool UseAtEnd,
Nemanja Ivanovicae22101c2016-02-20 18:16:25 +000064 bool TwoUniqueRegsRequired = false,
65 unsigned *SR1 = nullptr,
66 unsigned *SR2 = nullptr) const;
67 bool twoUniqueScratchRegsRequired(MachineBasicBlock *MBB) const;
Kit Barton9c432ae2015-11-16 20:22:15 +000068
Chuang-Yu Chengf8b592f2016-04-01 06:44:32 +000069 /**
70 * \brief Create branch instruction for PPC::TCRETURN* (tail call return)
71 *
72 * \param[in] MBB that is terminated by PPC::TCRETURN*
73 */
74 void createTailCallBranchInstr(MachineBasicBlock &MBB) const;
75
Nate Begeman412602d2004-08-14 22:16:36 +000076public:
Eric Christopherd104c312014-06-12 20:54:11 +000077 PPCFrameLowering(const PPCSubtarget &STI);
Nate Begeman412602d2004-08-14 22:16:36 +000078
Hal Finkelbb420f12013-03-15 05:06:04 +000079 unsigned determineFrameLayout(MachineFunction &MF,
80 bool UpdateMF = true,
81 bool UseEstimate = false) const;
Anton Korobeynikovf7183ed2010-11-15 00:06:54 +000082
83 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
84 /// the function.
Quentin Colombet61b305e2015-05-05 17:38:16 +000085 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
Craig Topper0d3fa922014-04-29 07:57:37 +000086 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
Anton Korobeynikovf7183ed2010-11-15 00:06:54 +000087
Craig Topper0d3fa922014-04-29 07:57:37 +000088 bool hasFP(const MachineFunction &MF) const override;
Anton Korobeynikov3eb4fed2010-12-18 19:53:14 +000089 bool needsFP(const MachineFunction &MF) const;
Hal Finkelaa03c032013-03-21 19:03:19 +000090 void replaceFPWithRealFP(MachineFunction &MF) const;
Anton Korobeynikov0eecf5d2010-11-18 21:19:35 +000091
Matthias Braun02564862015-07-14 17:17:13 +000092 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
93 RegScavenger *RS = nullptr) const override;
Hal Finkel5a765fd2013-03-14 20:33:40 +000094 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
Craig Topper0d3fa922014-04-29 07:57:37 +000095 RegScavenger *RS = nullptr) const override;
Hal Finkelbb420f12013-03-15 05:06:04 +000096 void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const;
Anton Korobeynikov7283b8d2010-11-27 23:05:25 +000097
Roman Divackyc9e23d92012-09-12 14:47:47 +000098 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
99 MachineBasicBlock::iterator MI,
100 const std::vector<CalleeSavedInfo> &CSI,
Craig Topper0d3fa922014-04-29 07:57:37 +0000101 const TargetRegisterInfo *TRI) const override;
Roman Divackyc9e23d92012-09-12 14:47:47 +0000102
Hans Wennborge1a2e902016-03-31 18:33:38 +0000103 MachineBasicBlock::iterator
104 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
105 MachineBasicBlock::iterator I) const override;
Eli Bendersky8da87162013-02-21 20:05:00 +0000106
Roman Divackyc9e23d92012-09-12 14:47:47 +0000107 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
Craig Topper0d3fa922014-04-29 07:57:37 +0000108 MachineBasicBlock::iterator MI,
109 const std::vector<CalleeSavedInfo> &CSI,
110 const TargetRegisterInfo *TRI) const override;
Roman Divackyc9e23d92012-09-12 14:47:47 +0000111
Anton Korobeynikovf7183ed2010-11-15 00:06:54 +0000112 /// targetHandlesStackFrameRounding - Returns true if the target is
113 /// responsible for rounding up the stack frame (probably at emitPrologue
114 /// time).
Craig Topper0d3fa922014-04-29 07:57:37 +0000115 bool targetHandlesStackFrameRounding() const override { return true; }
Anton Korobeynikovf7183ed2010-11-15 00:06:54 +0000116
Jim Laskey527c12f2006-12-06 17:42:06 +0000117 /// getReturnSaveOffset - Return the previous frame offset to save the
118 /// return address.
Eric Christopherf71609b2015-02-13 00:39:27 +0000119 unsigned getReturnSaveOffset() const { return ReturnSaveOffset; }
Jim Laskey527c12f2006-12-06 17:42:06 +0000120
Ulrich Weigandad0cb912014-06-18 17:52:49 +0000121 /// getTOCSaveOffset - Return the previous frame offset to save the
122 /// TOC register -- 64-bit SVR4 ABI only.
Eric Christopher736d39e2015-02-13 00:39:36 +0000123 unsigned getTOCSaveOffset() const { return TOCSaveOffset; }
Ulrich Weigandad0cb912014-06-18 17:52:49 +0000124
Jim Laskey48850c12006-11-16 22:43:37 +0000125 /// getFramePointerSaveOffset - Return the previous frame offset to save the
126 /// frame pointer.
Eric Christopherdc3a8a42015-02-13 00:39:38 +0000127 unsigned getFramePointerSaveOffset() const { return FramePointerSaveOffset; }
Anton Korobeynikova5ab8f12010-11-15 00:06:05 +0000128
Hal Finkela7c54e82013-07-17 00:45:52 +0000129 /// getBasePointerSaveOffset - Return the previous frame offset to save the
130 /// base pointer.
Eric Christopherfcd3d872015-02-13 22:48:53 +0000131 unsigned getBasePointerSaveOffset() const { return BasePointerSaveOffset; }
Hal Finkela7c54e82013-07-17 00:45:52 +0000132
Jim Laskey48850c12006-11-16 22:43:37 +0000133 /// getLinkageSize - Return the size of the PowerPC ABI linkage area.
134 ///
Eric Christophera4ae2132015-02-13 22:22:57 +0000135 unsigned getLinkageSize() const { return LinkageSize; }
Jim Laskey48850c12006-11-16 22:43:37 +0000136
Tilmann Scheller336e2bd2009-09-27 17:58:47 +0000137 const SpillSlot *
Eric Christopherd104c312014-06-12 20:54:11 +0000138 getCalleeSavedSpillSlots(unsigned &NumEntries) const override;
Kit Bartond3b904d2015-09-10 01:55:44 +0000139
140 bool enableShrinkWrapping(const MachineFunction &MF) const override;
Kit Barton9c432ae2015-11-16 20:22:15 +0000141
142 /// Methods used by shrink wrapping to determine if MBB can be used for the
143 /// function prologue/epilogue.
144 bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
145 bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override;
Nate Begeman412602d2004-08-14 22:16:36 +0000146};
Alexander Kornienkof00654e2015-06-23 09:49:53 +0000147} // End llvm namespace
Nate Begeman412602d2004-08-14 22:16:36 +0000148
149#endif