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gerrit-public.fairphone.software / toolchain / llvm-project / b51a9bc35854509b9d4b125d232c4ff07ab765f5 / . / llvm / test / CodeGen / AMDGPU / i1-copy-implicit-def.ll
blob: 37d05c7ac414c2aa384d2d8c9109a40a10a737f8 [file] [log] [blame]
Matt Arsenaultf530e8b2016-11-07 19:09:33 +0000[diff] [blame]1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
Marek Olsak75170772015-01-27 17:27:15 +0000[diff] [blame]2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
Matt Arsenault72858932014-11-14 18:43:41 +0000[diff] [blame]3
4; SILowerI1Copies was not handling IMPLICIT_DEF
Matt Arsenault162c1012014-11-18 21:06:58 +0000[diff] [blame]5; SI-LABEL: {{^}}br_implicit_def:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]6; SI: %bb.0:
Matt Arsenault327188a2016-12-15 21:57:11 +0000[diff] [blame]7; SI-NEXT: s_cbranch_scc1
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000[diff] [blame]8define amdgpu_kernel void @br_implicit_def(i32 addrspace(1)* %out, i32 %arg) #0 {
Matt Arsenault72858932014-11-14 18:43:41 +0000[diff] [blame]9bb:
10 br i1 undef, label %bb1, label %bb2
11
12bb1:
13 store volatile i32 123, i32 addrspace(1)* %out
14 ret void
15
16bb2:
17 ret void
18}
19
20attributes #0 = { nounwind }