| Krzysztof Parzyszek | 046090d | 2018-03-12 14:01:28 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=hexagon < %s |
| 2 | ; REQUIRES: asserts |
| 3 | |
| 4 | ; Validates correct operand order for absolute-set stores. |
| 5 | |
| 6 | %s.0 = type { %s.1, %s.2, %s.3, %s.3, %s.4, [8 x i8] } |
| 7 | %s.1 = type { i8 } |
| 8 | %s.2 = type { i8 } |
| 9 | %s.3 = type { i32 } |
| 10 | %s.4 = type { i32, i32, i32 } |
| 11 | |
| 12 | ; Function Attrs: nounwind ssp |
| 13 | define void @f0(%s.0* nocapture readonly %a0, i32 %a1) #0 { |
| 14 | b0: |
| 15 | %v0 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 0, i32 0 |
| 16 | %v1 = load i8, i8* %v0, align 1 |
| 17 | %v2 = and i32 %a1, 1 |
| 18 | %v3 = icmp eq i32 %v2, 0 |
| 19 | br i1 %v3, label %b4, label %b1 |
| 20 | |
| 21 | b1: ; preds = %b0 |
| 22 | %v4 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 1, i32 0 |
| 23 | %v5 = load i8, i8* %v4, align 1 |
| 24 | %v6 = icmp eq i8 %v5, 0 |
| 25 | br i1 %v6, label %b3, label %b2 |
| 26 | |
| 27 | b2: ; preds = %b1 |
| 28 | %v7 = getelementptr %s.0, %s.0* %a0, i32 0, i32 2, i32 0 |
| 29 | %v8 = load i32, i32* %v7, align 4 |
| 30 | store volatile i32 %v8, i32* inttoptr (i32 -318766672 to i32*), align 16 |
| 31 | %v9 = getelementptr %s.0, %s.0* %a0, i32 0, i32 3, i32 0 |
| 32 | %v10 = load i32, i32* %v9, align 4 |
| 33 | store volatile i32 %v10, i32* inttoptr (i32 -318766672 to i32*), align 16 |
| 34 | br label %b3 |
| 35 | |
| 36 | b3: ; preds = %b2, %b1 |
| 37 | %v11 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 4, i32 0 |
| 38 | %v12 = load i32, i32* %v11, align 4 |
| 39 | %v13 = zext i8 %v1 to i32 |
| 40 | %v14 = mul nsw i32 %v13, 64 |
| 41 | %v15 = add nsw i32 %v14, -318111684 |
| 42 | %v16 = inttoptr i32 %v15 to i32* |
| 43 | store volatile i32 %v12, i32* %v16, align 4 |
| 44 | %v17 = shl i32 1, %v13 |
| 45 | %v18 = load volatile i32, i32* inttoptr (i32 -318111596 to i32*), align 4 |
| 46 | %v19 = and i32 %v17, 3 |
| 47 | %v20 = xor i32 %v19, 3 |
| 48 | %v21 = and i32 %v18, %v20 |
| 49 | %v22 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 4, i32 1 |
| 50 | %v23 = load i32, i32* %v22, align 4 |
| 51 | %v24 = and i32 %v23, 1 |
| 52 | %v25 = shl i32 %v24, %v13 |
| 53 | %v26 = or i32 %v25, %v21 |
| 54 | store volatile i32 %v26, i32* inttoptr (i32 -318111596 to i32*), align 4 |
| 55 | %v27 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 4, i32 2 |
| 56 | %v28 = load i32, i32* %v27, align 4 |
| 57 | %v29 = mul nsw i32 %v13, 4 |
| 58 | %v30 = add nsw i32 %v29, -318111592 |
| 59 | %v31 = inttoptr i32 %v30 to i32* |
| 60 | store volatile i32 %v28, i32* %v31, align 4 |
| 61 | br label %b4 |
| 62 | |
| 63 | b4: ; preds = %b3, %b0 |
| 64 | ret void |
| 65 | } |
| 66 | |
| 67 | attributes #0 = { nounwind ssp } |