| Tom Stellard | 40ce8af | 2015-01-28 16:04:26 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s |
| Tom Stellard | 794c8c0 | 2014-12-02 17:05:41 +0000 | [diff] [blame] | 2 | |
| Tom Stellard | f151a45 | 2015-06-26 21:14:58 +0000 | [diff] [blame] | 3 | ; HSA: {{^}}simple: |
| Tom Stellard | edd188c | 2015-01-23 23:59:08 +0000 | [diff] [blame] | 4 | ; HSA: .section .hsa.version |
| 5 | ; HSA-NEXT: .ascii "HSA Code Unit:0.0:AMD:0.1:GFX8.1:0" |
| Tom Stellard | f151a45 | 2015-06-26 21:14:58 +0000 | [diff] [blame] | 6 | ; Test that the amd_kernel_code_t object is emitted |
| 7 | ; HSA: .asciz |
| Tom Stellard | b5798b0 | 2015-06-26 21:15:03 +0000 | [diff] [blame^] | 8 | ; HSA: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[0:1], 0x0 |
| Tom Stellard | 794c8c0 | 2014-12-02 17:05:41 +0000 | [diff] [blame] | 9 | ; Make sure we are setting the ATC bit: |
| 10 | ; HSA: s_mov_b32 s[[HI:[0-9]]], 0x100f000 |
| 11 | ; HSA: buffer_store_dword v{{[0-9]+}}, s[0:[[HI]]], 0 |
| 12 | |
| 13 | define void @simple(i32 addrspace(1)* %out) { |
| 14 | entry: |
| 15 | store i32 0, i32 addrspace(1)* %out |
| 16 | ret void |
| 17 | } |