Carlo Bertolli | b74bfc8 | 2016-03-18 21:43:32 +0000 | [diff] [blame^] | 1 | |
| 2 | // Test target codegen - host bc file has to be created first. |
| 3 | // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fomptargets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc |
| 4 | // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fomptargets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fomp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 |
| 5 | // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fomptargets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc |
| 6 | // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fomptargets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fomp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 |
| 7 | // expected-no-diagnostics |
| 8 | #ifndef HEADER |
| 9 | #define HEADER |
| 10 | |
| 11 | template<typename tx, typename ty> |
| 12 | struct TT{ |
| 13 | tx X; |
| 14 | ty Y; |
| 15 | }; |
| 16 | |
| 17 | // TCHECK: [[TT:%.+]] = type { i64, i8 } |
| 18 | // TCHECK: [[S1:%.+]] = type { double } |
| 19 | |
| 20 | int foo(int n, double *ptr) { |
| 21 | int a = 0; |
| 22 | short aa = 0; |
| 23 | float b[10]; |
| 24 | double c[5][10]; |
| 25 | TT<long long, char> d; |
| 26 | |
| 27 | #pragma omp target firstprivate(a) |
| 28 | { |
| 29 | } |
| 30 | |
| 31 | // TCHECK: define void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A_IN:%.+]]) |
| 32 | // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 33 | // TCHECK: [[A1:%.+]] = alloca i{{[0-9]+}}, |
| 34 | // TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], |
| 35 | // TCHECK-64: [[CONV:%.+]] = bitcast i{{[0-9]+}}* [[A_ADDR]] to i{{[0-9]+}}* |
| 36 | // TCHECK-64: [[A_ADDR_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[CONV]], |
| 37 | // TCHECK-32: [[A_ADDR_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[A_ADDR]], |
| 38 | // TCHECK: store i{{[0-9]+}} [[A_ADDR_VAL]], i{{[0-9]+}}* [[A1]], |
| 39 | // TCHECK: ret void |
| 40 | |
| 41 | #pragma omp target firstprivate(aa,b,c,d) |
| 42 | { |
| 43 | aa += 1; |
| 44 | b[2] = 1.0; |
| 45 | c[1][2] = 1.0; |
| 46 | d.X = 1; |
| 47 | d.Y = 1; |
| 48 | } |
| 49 | |
| 50 | // make sure that firstprivate variables are generated in all cases and that we use those instances for operations inside the |
| 51 | // target region |
| 52 | // TCHECK: define void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A2_IN:%.+]], [10 x float]* {{.+}} [[B_IN:%.+]], [5 x [10 x double]]* {{.+}} [[C_IN:%.+]], [[TT]]* {{.+}} [[D_IN:%.+]]) |
| 53 | // TCHECK: [[A2_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 54 | // TCHECK: [[B_ADDR:%.+]] = alloca [10 x float]*, |
| 55 | // TCHECK: [[C_ADDR:%.+]] = alloca [5 x [10 x double]]*, |
| 56 | // TCHECK: [[D_ADDR:%.+]] = alloca [[TT]]*, |
| 57 | // TCHECK: [[A2_PRIV:%.+]] = alloca i{{[0-9]+}}, |
| 58 | // TCHECK: [[B_PRIV:%.+]] = alloca [10 x float], |
| 59 | // TCHECK: [[C_PRIV:%.+]] = alloca [5 x [10 x double]], |
| 60 | // TCHECK: [[D_PRIV:%.+]] = alloca [[TT]], |
| 61 | // TCHECK: store i{{[0-9]+}} [[A2_IN]], i{{[0-9]+}}* [[A2_ADDR]], |
| 62 | // TCHECK: store [10 x float]* [[B_IN]], [10 x float]** [[B_ADDR]], |
| 63 | // TCHECK: store [5 x [10 x double]]* [[C_IN]], [5 x [10 x double]]** [[C_ADDR]], |
| 64 | // TCHECK: store [[TT]]* [[D_IN]], [[TT]]** [[D_ADDR]], |
| 65 | // TCHECK: [[CONV_A2ADDR:%.+]] = bitcast i{{[0-9]+}}* [[A2_ADDR]] to i{{[0-9]+}}* |
| 66 | // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x float]*, [10 x float]** [[B_ADDR]], |
| 67 | // TCHECK: [[C_ADDR_REF:%.+]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], |
| 68 | // TCHECK: [[D_ADDR_REF:%.+]] = load [[TT]]*, [[TT]]** [[D_ADDR]], |
| 69 | |
| 70 | // firstprivate(aa): a_priv = a_in |
| 71 | // TCHECK: [[A2_CONV_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[CONV_A2ADDR]], |
| 72 | // TCHECK: store i{{[0-9]+}} [[A2_CONV_VAL]], i{{[0-9]+}}* [[A2_PRIV]], |
| 73 | |
| 74 | // firstprivate(b): memcpy(b_priv,b_in) |
| 75 | // TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x float]* [[B_PRIV]] to i8* |
| 76 | // TCHECK: [[B_ADDR_REF_BCAST:%.+]] = bitcast [10 x float]* [[B_ADDR_REF]] to i8* |
| 77 | // TCHECK: call void @llvm.memcpy.{{.+}}(i8* [[B_PRIV_BCAST]], i8* [[B_ADDR_REF_BCAST]], {{.+}}) |
| 78 | |
| 79 | // firstprivate(c) |
| 80 | // TCHECK: [[C_PRIV_BCAST:%.+]] = bitcast [5 x [10 x double]]* [[C_PRIV]] to i8* |
| 81 | // TCHECK: [[C_IN_BCAST:%.+]] = bitcast [5 x [10 x double]]* [[C_ADDR_REF]] to i8* |
| 82 | // TCHECK: call void @llvm.memcpy.{{.+}}(i8* [[C_PRIV_BCAST]], i8* [[C_IN_BCAST]],{{.+}}) |
| 83 | |
| 84 | // firstprivate(d) |
| 85 | // TCHECK: [[D_PRIV_BCAST:%.+]] = bitcast [[TT]]* [[D_PRIV]] to i8* |
| 86 | // TCHECK: [[D_IN_BCAST:%.+]] = bitcast [[TT]]* [[D_ADDR_REF]] to i8* |
| 87 | // TCHECK: call void @llvm.memcpy.{{.+}}(i8* [[D_PRIV_BCAST]], i8* [[D_IN_BCAST]],{{.+}}) |
| 88 | |
| 89 | |
| 90 | #pragma omp target firstprivate(ptr) |
| 91 | { |
| 92 | ptr[0]++; |
| 93 | } |
| 94 | |
| 95 | // TCHECK: define void @__omp_offloading_{{.+}}(double* [[PTR_IN:%.+]]) |
| 96 | // TCHECK: [[PTR_ADDR:%.+]] = alloca double*, |
| 97 | // TCHECK: [[PTR_PRIV:%.+]] = alloca double*, |
| 98 | // TCHECK: store double* [[PTR_IN]], double** [[PTR_ADDR]], |
| 99 | // TCHECK: [[PTR_IN_REF:%.+]] = load double*, double** [[PTR_ADDR]], |
| 100 | // TCHECK: store double* [[PTR_IN_REF]], double** [[PTR_PRIV]], |
| 101 | |
| 102 | return a; |
| 103 | } |
| 104 | |
| 105 | |
| 106 | template<typename tx> |
| 107 | tx ftemplate(int n) { |
| 108 | tx a = 0; |
| 109 | tx b[10]; |
| 110 | |
| 111 | #pragma omp target firstprivate(a,b) |
| 112 | { |
| 113 | a += 1; |
| 114 | b[2] += 1; |
| 115 | } |
| 116 | |
| 117 | return a; |
| 118 | } |
| 119 | |
| 120 | static |
| 121 | int fstatic(int n) { |
| 122 | int a = 0; |
| 123 | char aaa = 0; |
| 124 | int b[10]; |
| 125 | |
| 126 | #pragma omp target firstprivate(a,aaa,b) |
| 127 | { |
| 128 | a += 1; |
| 129 | aaa += 1; |
| 130 | b[2] += 1; |
| 131 | } |
| 132 | |
| 133 | return a; |
| 134 | } |
| 135 | |
| 136 | // TCHECK: define void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A_IN:%.+]], i{{[0-9]+}} [[A3_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) |
| 137 | // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 138 | // TCHECK: [[A3_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 139 | // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, |
| 140 | // TCHECK: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, |
| 141 | // TCHECK: [[A3_PRIV:%.+]] = alloca i{{[0-9]+}}, |
| 142 | // TCHECK: [[B_PRIV:%.+]] = alloca [10 x i{{[0-9]+}}], |
| 143 | // TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], |
| 144 | // TCHECK: store i{{[0-9]+}} [[A3_IN]], i{{[0-9]+}}* [[A3_ADDR]], |
| 145 | // TCHECK: store [10 x i{{[0-9]+}}]* [[B_IN]], [10 x i{{[0-9]+}}]** [[B_ADDR]], |
| 146 | // TCHECK-64: [[A_CONV:%.+]] = bitcast i{{[0-9]+}}* [[A_ADDR]] to i{{[0-9]+}}* |
| 147 | // TCHECK: [[A3_CONV:%.+]] = bitcast i{{[0-9]+}}* [[A3_ADDR]] to i8* |
| 148 | // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** [[B_ADDR]], |
| 149 | |
| 150 | // firstprivate(a): a_priv = a_in |
| 151 | // TCHECK-64: [[A_IN_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[A_CONV]], |
| 152 | // TCHECK-32: [[A_IN_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[A_ADDR]], |
| 153 | // TCHECK: store i{{[0-9]+}} [[A_IN_VAL]], i{{[0-9]+}}* [[A_PRIV]], |
| 154 | |
| 155 | // firstprivate(aaa) |
| 156 | // TCHECK: [[A3_IN_VAL:%.+]] = load i8, i8* [[A3_CONV]], |
| 157 | // TCHECK: store i{{[0-9]+}} [[A3_IN_VAL]], i{{[0-9]+}}* [[A3_PRIV]], |
| 158 | |
| 159 | // firstprivate(b) |
| 160 | // TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_PRIV]] to i8* |
| 161 | // TCHECK: [[B_IN_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_ADDR_REF]] to i8* |
| 162 | // TCHECK: call void @llvm.memcpy.{{.+}}(i8* [[B_PRIV_BCAST]], i8* [[B_IN_BCAST]],{{.+}}) |
| 163 | |
| 164 | // TCHECK: ret void |
| 165 | |
| 166 | struct S1 { |
| 167 | double a; |
| 168 | |
| 169 | int r1(int n){ |
| 170 | int b = n+1; |
| 171 | |
| 172 | #pragma omp target firstprivate(b) |
| 173 | { |
| 174 | this->a = (double)b + 1.5; |
| 175 | } |
| 176 | |
| 177 | return (int)b; |
| 178 | } |
| 179 | |
| 180 | // TCHECK: define void @__omp_offloading_{{.+}}([[S1]]* [[TH:%.+]], i{{[0-9]+}} [[B_IN:%.+]]) |
| 181 | // TCHECK: [[TH_ADDR:%.+]] = alloca [[S1]]*, |
| 182 | // TCHECK: [[B_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 183 | // TCHECK: [[B_PRIV:%.+]] = alloca i{{[0-9]+}}, |
| 184 | |
| 185 | // TCHECK: store [[S1]]* [[TH]], [[S1]]** [[TH_ADDR]], |
| 186 | // TCHECK: store i{{[0-9]+}} [[B_IN]], i{{[0-9]+}}* [[B_ADDR]], |
| 187 | // TCHECK: [[TH_ADDR_REF:%.+]] = load [[S1]]*, [[S1]]** [[TH_ADDR]], |
| 188 | // TCHECK-64: [[B_ADDR_CONV:%.+]] = bitcast i{{[0-9]+}}* [[B_ADDR]] to i{{[0-9]+}}* |
| 189 | |
| 190 | // firstprivate(b) |
| 191 | // TCHECK-64: [[B_IN_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[B_ADDR_CONV]], |
| 192 | // TCHECK-32: [[B_IN_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[B_ADDR]], |
| 193 | // TCHECK: store i{{[0-9]+}} [[B_IN_VAL]], i{{[0-9]+}}* [[B_PRIV]], |
| 194 | |
| 195 | // TCHECK: ret void |
| 196 | }; |
| 197 | |
| 198 | |
| 199 | |
| 200 | int bar(int n, double *ptr){ |
| 201 | int a = 0; |
| 202 | a += foo(n, ptr); |
| 203 | S1 S; |
| 204 | a += S.r1(n); |
| 205 | a += fstatic(n); |
| 206 | a += ftemplate<int>(n); |
| 207 | |
| 208 | return a; |
| 209 | } |
| 210 | |
| 211 | // template |
| 212 | |
| 213 | // TCHECK: define void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) |
| 214 | // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, |
| 215 | // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, |
| 216 | // TCHECK: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, |
| 217 | // TCHECK: [[B_PRIV:%.+]] = alloca [10 x i{{[0-9]+}}], |
| 218 | // TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], |
| 219 | // TCHECK: store [10 x i{{[0-9]+}}]* [[B_IN]], [10 x i{{[0-9]+}}]** [[B_ADDR]], |
| 220 | // TCHECK-64: [[A_ADDR_CONV:%.+]] = bitcast i{{[0-9]+}}* [[A_ADDR]] to i{{[0-9]+}}* |
| 221 | // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** [[B_ADDR]], |
| 222 | |
| 223 | // firstprivate(a) |
| 224 | // TCHECK-64: [[A_IN_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[A_ADDR_CONV]] |
| 225 | // TCHECK-32: [[A_IN_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[A_ADDR]] |
| 226 | // TCHECK: store i{{[0-9]+}} [[A_IN_VAL]], i{{[0-9]+}}* [[A_PRIV]], |
| 227 | |
| 228 | // firstprivate(b) |
| 229 | // TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_PRIV]] to i8* |
| 230 | // TCHECK: [[B_IN_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_ADDR_REF]] to i8* |
| 231 | // TCHECK: call void @llvm.memcpy.{{.+}}(i8* [[B_PRIV_BCAST]], i8* [[B_IN_BCAST]],{{.+}}) |
| 232 | |
| 233 | // TCHECK: ret void |
| 234 | |
| 235 | #endif |