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gerrit-public.fairphone.software / toolchain / llvm-project / b760d0cde9b5b165719cb15a5bc63aaed987352f / . / llvm / lib / Target / CellSPU / SPUCallingConv.td
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Scott Michel6e22c652007-12-04 22:23:35 +0000[diff] [blame]1//===- SPUCallingConv.td - Calling Conventions for CellSPU ------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +0000[diff] [blame]5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Scott Michel6e22c652007-12-04 22:23:35 +0000[diff] [blame]7//
8//===----------------------------------------------------------------------===//
9//
10// This describes the calling conventions for the STI Cell SPU architecture.
11//
12//===----------------------------------------------------------------------===//
13
14/// CCIfSubtarget - Match if the current subtarget has a feature F.
15class CCIfSubtarget<string F, CCAction A>
16 : CCIf<!strconcat("State.getTarget().getSubtarget<PPCSubtarget>().", F), A>;
17
18//===----------------------------------------------------------------------===//
19// Return Value Calling Convention
20//===----------------------------------------------------------------------===//
21
22// Return-value convention for Cell SPU: Everything can be passed back via $3:
23def RetCC_SPU : CallingConv<[
Scott Michel494daa72009-01-06 23:10:38 +0000[diff] [blame]24 CCIfType<[i8], CCAssignToReg<[R3]>>,
25 CCIfType<[i16], CCAssignToReg<[R3]>>,
26 CCIfType<[i32], CCAssignToReg<[R3]>>,
27 CCIfType<[i64], CCAssignToReg<[R3]>>,
28 CCIfType<[i128], CCAssignToReg<[R3]>>,
Scott Michel6e22c652007-12-04 22:23:35 +0000[diff] [blame]29 CCIfType<[f32, f64], CCAssignToReg<[R3]>>,
Scott Michel494daa72009-01-06 23:10:38 +0000[diff] [blame]30 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToReg<[R3]>>,
31 CCIfType<[v2i32], CCAssignToReg<[R3]>>
Scott Michel6e22c652007-12-04 22:23:35 +0000[diff] [blame]32]>;
33
34
35//===----------------------------------------------------------------------===//
36// CellSPU Argument Calling Conventions
Scott Michel73640252008-12-02 19:53:53 +0000[diff] [blame]37// (note: this isn't used, but presumably should be at some point when other
38// targets do.)
Scott Michel6e22c652007-12-04 22:23:35 +0000[diff] [blame]39//===----------------------------------------------------------------------===//
40/*
41def CC_SPU : CallingConv<[
Scott Michel73640252008-12-02 19:53:53 +0000[diff] [blame]42 CCIfType<[i8], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10, R11,
43 R12, R13, R14, R15, R16, R17, R18, R19, R20,
44 R21, R22, R23, R24, R25, R26, R27, R28, R29,
45 R30, R31, R32, R33, R34, R35, R36, R37, R38,
46 R39, R40, R41, R42, R43, R44, R45, R46, R47,
47 R48, R49, R50, R51, R52, R53, R54, R55, R56,
48 R57, R58, R59, R60, R61, R62, R63, R64, R65,
49 R66, R67, R68, R69, R70, R71, R72, R73, R74,
50 R75, R76, R77, R78, R79]>>,
51 CCIfType<[i16], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10, R11,
52 R12, R13, R14, R15, R16, R17, R18, R19, R20,
53 R21, R22, R23, R24, R25, R26, R27, R28, R29,
54 R30, R31, R32, R33, R34, R35, R36, R37, R38,
55 R39, R40, R41, R42, R43, R44, R45, R46, R47,
56 R48, R49, R50, R51, R52, R53, R54, R55, R56,
57 R57, R58, R59, R60, R61, R62, R63, R64, R65,
58 R66, R67, R68, R69, R70, R71, R72, R73, R74,
59 R75, R76, R77, R78, R79]>>,
60 CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10, R11,
61 R12, R13, R14, R15, R16, R17, R18, R19, R20,
62 R21, R22, R23, R24, R25, R26, R27, R28, R29,
63 R30, R31, R32, R33, R34, R35, R36, R37, R38,
64 R39, R40, R41, R42, R43, R44, R45, R46, R47,
65 R48, R49, R50, R51, R52, R53, R54, R55, R56,
66 R57, R58, R59, R60, R61, R62, R63, R64, R65,
67 R66, R67, R68, R69, R70, R71, R72, R73, R74,
68 R75, R76, R77, R78, R79]>>,
69 CCIfType<[f32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10, R11,
70 R12, R13, R14, R15, R16, R17, R18, R19, R20,
71 R21, R22, R23, R24, R25, R26, R27, R28, R29,
72 R30, R31, R32, R33, R34, R35, R36, R37, R38,
73 R39, R40, R41, R42, R43, R44, R45, R46, R47,
74 R48, R49, R50, R51, R52, R53, R54, R55, R56,
75 R57, R58, R59, R60, R61, R62, R63, R64, R65,
76 R66, R67, R68, R69, R70, R71, R72, R73, R74,
77 R75, R76, R77, R78, R79]>>,
78 CCIfType<[i64], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10, R11,
79 R12, R13, R14, R15, R16, R17, R18, R19, R20,
80 R21, R22, R23, R24, R25, R26, R27, R28, R29,
81 R30, R31, R32, R33, R34, R35, R36, R37, R38,
82 R39, R40, R41, R42, R43, R44, R45, R46, R47,
83 R48, R49, R50, R51, R52, R53, R54, R55, R56,
84 R57, R58, R59, R60, R61, R62, R63, R64, R65,
85 R66, R67, R68, R69, R70, R71, R72, R73, R74,
86 R75, R76, R77, R78, R79]>>,
87 CCIfType<[f64], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10, R11,
88 R12, R13, R14, R15, R16, R17, R18, R19, R20,
89 R21, R22, R23, R24, R25, R26, R27, R28, R29,
90 R30, R31, R32, R33, R34, R35, R36, R37, R38,
91 R39, R40, R41, R42, R43, R44, R45, R46, R47,
92 R48, R49, R50, R51, R52, R53, R54, R55, R56,
93 R57, R58, R59, R60, R61, R62, R63, R64, R65,
94 R66, R67, R68, R69, R70, R71, R72, R73, R74,
95 R75, R76, R77, R78, R79]>>,
96 CCIfType<[v16i8, v8i16, v4i32, v4f32, v2i64, v2f64],
97 CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10, R11,
98 R12, R13, R14, R15, R16, R17, R18, R19, R20,
99 R21, R22, R23, R24, R25, R26, R27, R28, R29,
100 R30, R31, R32, R33, R34, R35, R36, R37, R38,
101 R39, R40, R41, R42, R43, R44, R45, R46, R47,
102 R48, R49, R50, R51, R52, R53, R54, R55, R56,
103 R57, R58, R59, R60, R61, R62, R63, R64, R65,
104 R66, R67, R68, R69, R70, R71, R72, R73, R74,
105 R75, R76, R77, R78, R79]>>,
Scott Michel6e22c652007-12-04 22:23:35 +0000[diff] [blame]106
Scott Michel6e22c652007-12-04 22:23:35 +0000[diff] [blame]107 // Integer/FP values get stored in stack slots that are 8 bytes in size and
108 // 8-byte aligned if there are no more registers to hold them.
109 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
110
111 // Vectors get 16-byte stack slots that are 16-byte aligned.
112 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
Scott Michel73640252008-12-02 19:53:53 +0000[diff] [blame]113 CCAssignToStack<16, 16>>
Scott Michel6e22c652007-12-04 22:23:35 +0000[diff] [blame]114]>;
Scott Michel73640252008-12-02 19:53:53 +0000[diff] [blame]115*/