| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 1 | ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s |
| 2 | |
| Vincent Lejeune | f97af79 | 2013-05-02 21:52:30 +0000 | [diff] [blame] | 3 | ;CHECK: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 4 | |
| Nicolai Haehnle | df3a20c | 2016-04-06 19:40:20 +0000 | [diff] [blame] | 5 | define amdgpu_ps void @test(<4 x float> inreg %reg0) { |
| Vincent Lejeune | f143af3 | 2013-11-11 22:10:24 +0000 | [diff] [blame] | 6 | %r0 = extractelement <4 x float> %reg0, i32 0 |
| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 7 | %r1 = fdiv float 1.0, %r0 |
| Vincent Lejeune | f143af3 | 2013-11-11 22:10:24 +0000 | [diff] [blame] | 8 | %vec = insertelement <4 x float> undef, float %r1, i32 0 |
| 9 | call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0) |
| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 10 | ret void |
| 11 | } |
| 12 | |
| Vincent Lejeune | f143af3 | 2013-11-11 22:10:24 +0000 | [diff] [blame] | 13 | declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) |