| Daniel Sanders | 20c82ee4 | 2014-07-04 15:16:14 +0000 | [diff] [blame] | 1 | ; Test all important variants of the unconditional 'br' instruction. |
| 2 | |
| Daniel Sanders | f5a5fbd | 2014-07-09 10:21:59 +0000 | [diff] [blame] | 3 | ; RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6 |
| 4 | ; RUN: llc -march=mips -mcpu=mips32r2 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6 |
| Daniel Sanders | 1779314 | 2015-02-18 16:24:50 +0000 | [diff] [blame] | 5 | ; RUN: llc -march=mips -mcpu=mips32r3 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6 |
| 6 | ; RUN: llc -march=mips -mcpu=mips32r5 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6 |
| Simon Dardis | d9d41f5 | 2016-04-05 12:50:29 +0000 | [diff] [blame] | 7 | ; RUN: llc -march=mips -mcpu=mips32r6 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=R6C |
| Daniel Sanders | f5a5fbd | 2014-07-09 10:21:59 +0000 | [diff] [blame] | 8 | ; RUN: llc -march=mips64 -mcpu=mips4 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6 |
| 9 | ; RUN: llc -march=mips64 -mcpu=mips64 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6 |
| 10 | ; RUN: llc -march=mips64 -mcpu=mips64r2 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6 |
| Daniel Sanders | 1779314 | 2015-02-18 16:24:50 +0000 | [diff] [blame] | 11 | ; RUN: llc -march=mips64 -mcpu=mips64r3 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6 |
| 12 | ; RUN: llc -march=mips64 -mcpu=mips64r5 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6 |
| Daniel Sanders | f5a5fbd | 2014-07-09 10:21:59 +0000 | [diff] [blame] | 13 | ; RUN: llc -march=mips64 -mcpu=mips64r6 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=R6 |
| Daniel Sanders | 20c82ee4 | 2014-07-04 15:16:14 +0000 | [diff] [blame] | 14 | |
| 15 | define i32 @br(i8 *%addr) { |
| 16 | ; ALL-LABEL: br: |
| Daniel Sanders | f5a5fbd | 2014-07-09 10:21:59 +0000 | [diff] [blame] | 17 | ; NOT-R6: jr $4 # <MCInst #{{[0-9]+}} JR |
| Simon Dardis | 53a3492 | 2016-04-14 13:43:17 +0000 | [diff] [blame] | 18 | ; R6C: jrc $4 # <MCInst #{{[0-9]+}} JIC |
| Simon Dardis | d9d41f5 | 2016-04-05 12:50:29 +0000 | [diff] [blame] | 19 | |
| Daniel Sanders | f5a5fbd | 2014-07-09 10:21:59 +0000 | [diff] [blame] | 20 | |
| Daniel Sanders | 69c6008 | 2015-05-20 14:18:59 +0000 | [diff] [blame] | 21 | ; ALL: $BB0_1: # %L1 |
| Daniel Sanders | f5a5fbd | 2014-07-09 10:21:59 +0000 | [diff] [blame] | 22 | ; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR |
| 23 | ; R6: jr $ra # <MCInst #{{[0-9]+}} JALR |
| Simon Dardis | d9d41f5 | 2016-04-05 12:50:29 +0000 | [diff] [blame] | 24 | ; R6C: jr $ra # <MCInst #{{[0-9]+}} JALR |
| Daniel Sanders | 20c82ee4 | 2014-07-04 15:16:14 +0000 | [diff] [blame] | 25 | ; ALL: addiu $2, $zero, 0 |
| Daniel Sanders | f5a5fbd | 2014-07-09 10:21:59 +0000 | [diff] [blame] | 26 | |
| Daniel Sanders | 69c6008 | 2015-05-20 14:18:59 +0000 | [diff] [blame] | 27 | ; ALL: $BB0_2: # %L2 |
| Daniel Sanders | f5a5fbd | 2014-07-09 10:21:59 +0000 | [diff] [blame] | 28 | ; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR |
| 29 | ; R6: jr $ra # <MCInst #{{[0-9]+}} JALR |
| Simon Dardis | d9d41f5 | 2016-04-05 12:50:29 +0000 | [diff] [blame] | 30 | ; R6C: jr $ra # <MCInst #{{[0-9]+}} JALR |
| Daniel Sanders | 20c82ee4 | 2014-07-04 15:16:14 +0000 | [diff] [blame] | 31 | ; ALL: addiu $2, $zero, 1 |
| 32 | |
| 33 | entry: |
| 34 | indirectbr i8* %addr, [label %L1, label %L2] |
| 35 | |
| 36 | L1: |
| 37 | ret i32 0 |
| 38 | |
| 39 | L2: |
| 40 | ret i32 1 |
| 41 | } |