Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / bc041b82d44b51a3b7da79c38e4052e28ff8011c / . / llvm / test / MC / Disassembler / ARM / thumb1.txt
blob: a129abba70fde52d204bdf128c1dd45308d06e50 [file] [log] [blame]
Richard Bartonf1ef87d2012-06-06 09:12:53 +0000[diff] [blame]1# RUN: llvm-mc -triple=thumbv6-apple-darwin -disassemble -show-encoding < %s | FileCheck %s
Owen Andersond40d8382011-08-17 18:21:36 +0000[diff] [blame]2
3#------------------------------------------------------------------------------
4# ADC (register)
5#------------------------------------------------------------------------------
6# CHECK: adcs r4, r6
7
80x74 0x41
9
10
11#------------------------------------------------------------------------------
12# ADD (immediate)
13#------------------------------------------------------------------------------
14# CHECK: adds r1, r2, #3
15# CHECK: adds r2, r2, #3
16# CHECK: adds r2, #8
17
180xd1 0x1c
190xd2 0x1c
200x08 0x32
21
Owen Andersond40d8382011-08-17 18:21:36 +0000[diff] [blame]22#------------------------------------------------------------------------------
23# ADD (register)
24#------------------------------------------------------------------------------
25# CHECK: adds r1, r2, r3
26# CHECK: add r2, r8
27
280xd1 0x18
290x42 0x44
Owen Andersona9089632011-08-17 23:37:33 +0000[diff] [blame]30
31#------------------------------------------------------------------------------
Owen Anderson5e309722011-08-25 18:30:18 +0000[diff] [blame]32# ADD (SP plus immediate)
33#------------------------------------------------------------------------------
34# CHECK: add sp, #508
35# CHECK: add sp, #4
36# CHECK: add r2, sp, #8
37# CHECK: add r2, sp, #1020
38
390x7f 0xb0
400x01 0xb0
410x02 0xaa
420xff 0xaa
43
44
45#------------------------------------------------------------------------------
46# ADD (SP plus register)
47#------------------------------------------------------------------------------
48# CHECK: add sp, r3
49# CHECK: add r2, sp, r2
50
510x9d 0x44
520x6a 0x44
53
54#------------------------------------------------------------------------------
Owen Andersona01bcbf2011-08-26 18:09:22 +0000[diff] [blame]55# ADR
56#------------------------------------------------------------------------------
Mihai Popad36cbaa2013-07-03 09:21:44 +0000[diff] [blame]57# CHECK: adr r5, #0
58# CHECK: adr r2, #12
59# CHECK: adr r3, #1020
600x00 0xa5
Owen Andersona01bcbf2011-08-26 18:09:22 +0000[diff] [blame]610x03 0xa2
Mihai Popad36cbaa2013-07-03 09:21:44 +0000[diff] [blame]620xff 0xa3
Owen Andersona01bcbf2011-08-26 18:09:22 +0000[diff] [blame]63
64#------------------------------------------------------------------------------
Owen Andersona9089632011-08-17 23:37:33 +0000[diff] [blame]65# ASR (immediate)
66#------------------------------------------------------------------------------
67# CHECK: asrs r2, r3, #32
68# CHECK: asrs r2, r3, #5
69# CHECK: asrs r2, r3, #1
70
710x1a 0x10
720x5a 0x11
730x5a 0x10
74
Owen Andersona9089632011-08-17 23:37:33 +0000[diff] [blame]75#------------------------------------------------------------------------------
76# ASR (register)
77#------------------------------------------------------------------------------
78# CHECK: asrs r5, r2
79
800x15 0x41
81
82#------------------------------------------------------------------------------
83# BICS
84#------------------------------------------------------------------------------
85# CHECK: bics r1, r6
86
870xb1 0x43
88
Owen Andersona9089632011-08-17 23:37:33 +0000[diff] [blame]89#------------------------------------------------------------------------------
Richard Bartonf1ef87d2012-06-06 09:12:53 +0000[diff] [blame]90# B
91#------------------------------------------------------------------------------
92# CHECK: bls #128 @ encoding: [0x40,0xd9]
93# CHECK: beq #-256 @ encoding: [0x80,0xd0]
94
950x40 0xd9
960x80 0xd0
97
98#------------------------------------------------------------------------------
Owen Andersona9089632011-08-17 23:37:33 +0000[diff] [blame]99# BKPT
100#------------------------------------------------------------------------------
101# CHECK: bkpt #0
102# CHECK: bkpt #255
103
1040x00 0xbe
1050xff 0xbe
106
Owen Andersonec3884c2011-08-18 17:43:52 +0000[diff] [blame]107#------------------------------------------------------------------------------
108# BLX (register)
109#------------------------------------------------------------------------------
110# CHECK: blx r4
111
1120xa0 0x47
113
114#------------------------------------------------------------------------------
115# BX
116#------------------------------------------------------------------------------
117# CHECK: bx r2
118
1190x10 0x47
120
Owen Anderson627021d2011-08-18 20:05:06 +0000[diff] [blame]121#------------------------------------------------------------------------------
122# CMN
123#------------------------------------------------------------------------------
124# CHECK: cmn r5, r1
125
1260xcd 0x42
127
128#------------------------------------------------------------------------------
129# CMP
130#------------------------------------------------------------------------------
131# CHECK: cmp r6, #32
132# CHECK: cmp r3, r4
133# CHECK: cmp r8, r1
134
1350x20 0x2e
1360xa3 0x42
1370x88 0x45
138
139#------------------------------------------------------------------------------
140# EOR
141#------------------------------------------------------------------------------
142# CHECK: eors r4, r5
143
1440x6c 0x40
145
Owen Andersonb4981322011-08-22 17:56:58 +0000[diff] [blame]146#------------------------------------------------------------------------------
147# LDM
148#------------------------------------------------------------------------------
149# CHECK: ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7}
150# CHECK: ldm r2!, {r1, r3, r4, r5, r7}
151# CHECK: ldm r1, {r1}
152
1530xff 0xcb
1540xba 0xca
1550x02 0xc9
156
157
158#------------------------------------------------------------------------------
159# LDR (immediate)
160#------------------------------------------------------------------------------
161# CHECK: ldr r1, [r5]
162# CHECK: ldr r2, [r6, #32]
163# CHECK: ldr r3, [r7, #124]
164# CHECK: ldr r1, [sp]
165# CHECK: ldr r2, [sp, #24]
166# CHECK: ldr r3, [sp, #1020]
Jim Grosbach4739f2e2012-10-30 01:04:51 +0000[diff] [blame]167# CHECK: ldr r1, [pc, #12]
Owen Andersonb4981322011-08-22 17:56:58 +0000[diff] [blame]168
169
1700x29 0x68
1710x32 0x6a
1720xfb 0x6f
1730x00 0x99
1740x06 0x9a
1750xff 0x9b
Jim Grosbach4739f2e2012-10-30 01:04:51 +0000[diff] [blame]1760x03 0x49
Owen Andersonb4981322011-08-22 17:56:58 +0000[diff] [blame]177
Owen Andersonfe29fe42011-08-22 18:05:49 +0000[diff] [blame]178#------------------------------------------------------------------------------
179# LDR (register)
180#------------------------------------------------------------------------------
181# CHECK: ldr r1, [r2, r3]
182
1830xd1 0x58
184
185
186#------------------------------------------------------------------------------
187# LDRB (immediate)
188#------------------------------------------------------------------------------
189# CHECK: ldrb r4, [r3]
190# CHECK: ldrb r5, [r6]
191# CHECK: ldrb r6, [r7, #31]
192
1930x1c 0x78
1940x35 0x78
1950xfe 0x7f
196
197
198#------------------------------------------------------------------------------
199# LDRB (register)
200#------------------------------------------------------------------------------
201# CHECK: ldrb r6, [r4, r5]
202
2030x66 0x5d
204
205
206#------------------------------------------------------------------------------
207# LDRH (immediate)
208#------------------------------------------------------------------------------
209# CHECK: ldrh r3, [r3]
210# CHECK: ldrh r4, [r6, #2]
211# CHECK: ldrh r5, [r7, #62]
212
2130x1b 0x88
2140x74 0x88
2150xfd 0x8f
216
217#------------------------------------------------------------------------------
218# LDRH (register)
219#------------------------------------------------------------------------------
220# CHECK: ldrh r6, [r2, r6]
221
2220x96 0x5b
223
224
225#------------------------------------------------------------------------------
226# LDRSB/LDRSH
227#------------------------------------------------------------------------------
228# CHECK: ldrsb r6, [r2, r6]
229# CHECK: ldrsh r3, [r7, r1]
230
2310x96 0x57
2320x7b 0x5e
233
234#------------------------------------------------------------------------------
235# LSL (immediate)
236#------------------------------------------------------------------------------
237# CHECK: movs r4, r5
238# CHECK: lsls r4, r5, #4
239
2400x2c 0x00
2410x2c 0x01
242
243
244#------------------------------------------------------------------------------
245# LSL (register)
246#------------------------------------------------------------------------------
247# CHECK: lsls r2, r6
248
2490xb2 0x40
250
251
252#------------------------------------------------------------------------------
253# LSR (immediate)
254#------------------------------------------------------------------------------
255# CHECK: lsrs r1, r3, #1
256# CHECK: lsrs r1, r3, #32
257
2580x59 0x08
2590x19 0x08
260
261
262#------------------------------------------------------------------------------
263# LSR (register)
264#------------------------------------------------------------------------------
265# CHECK: lsrs r2, r6
266
2670xf2 0x40
268
269#------------------------------------------------------------------------------
270# MOV (immediate)
271#------------------------------------------------------------------------------
272# CHECK: movs r2, #0
273# CHECK: movs r2, #255
274# CHECK: movs r2, #23
275
2760x00 0x22
2770xff 0x22
2780x17 0x22
279
280
281#------------------------------------------------------------------------------
282# MOV (register)
283#------------------------------------------------------------------------------
284# CHECK: mov r3, r4
285# CHECK: movs r1, r3
Amaury de la Vieuvillef2f00b42013-06-24 09:11:53 +0000[diff] [blame]286# CHECK: mov r8, r8
Owen Andersonfe29fe42011-08-22 18:05:49 +0000[diff] [blame]287
2880x23 0x46
2890x19 0x00
Amaury de la Vieuvillef2f00b42013-06-24 09:11:53 +0000[diff] [blame]2900xc0 0x46
Owen Andersonfe29fe42011-08-22 18:05:49 +0000[diff] [blame]291
292
293#------------------------------------------------------------------------------
294# MUL
295#------------------------------------------------------------------------------
296# CHECK: muls r1, r2, r1
297# CHECK: muls r3, r4
298
2990x51 0x43
3000x63 0x43
301
302
303#------------------------------------------------------------------------------
304# MVN
305#------------------------------------------------------------------------------
306# CHECK: mvns r6, r3
307
3080xde 0x43
309
310#------------------------------------------------------------------------------
311# NEG
312#------------------------------------------------------------------------------
313# CHECK: rsbs r3, r4, #0
314
3150x63 0x42
316
317
318#------------------------------------------------------------------------------
Owen Andersonfe29fe42011-08-22 18:05:49 +0000[diff] [blame]319# ORR
320#------------------------------------------------------------------------------
321# CHECK: orrs r3, r4
322
3230x23 0x43
324
Owen Andersondcea6322011-08-23 17:26:35 +0000[diff] [blame]325#------------------------------------------------------------------------------
326# POP
327#------------------------------------------------------------------------------
328# CHECK: pop {r2, r3, r6}
329
3300x4c 0xbc
331
332
333#------------------------------------------------------------------------------
334# PUSH
335#------------------------------------------------------------------------------
336# CHECK: push {r1, r2, r7}
337
3380x86 0xb4
339
340
341#------------------------------------------------------------------------------
342# REV/REV16/REVSH
343#------------------------------------------------------------------------------
344# CHECK: rev r6, r3
345# CHECK: rev16 r7, r2
346# CHECK: revsh r5, r1
347
3480x1e 0xba
3490x57 0xba
3500xcd 0xba
351
352
353#------------------------------------------------------------------------------
354# ROR
355#------------------------------------------------------------------------------
356# CHECK: rors r2, r7
357
3580xfa 0x41
359
360#------------------------------------------------------------------------------
361# RSB
362#------------------------------------------------------------------------------
363# CHECK: rsbs r1, r3, #0
364
3650x59 0x42
366
367
368#------------------------------------------------------------------------------
369# SBC
370#------------------------------------------------------------------------------
371# CHECK: sbcs r4, r3
372
3730x9c 0x41
374
375
376#------------------------------------------------------------------------------
377# SETEND
378#------------------------------------------------------------------------------
379# CHECK: setend be
380# CHECK: setend le
381
3820x58 0xb6
3830x50 0xb6
Owen Anderson16fd0d92011-08-24 17:08:34 +0000[diff] [blame]384
385#------------------------------------------------------------------------------
386# STM
387#------------------------------------------------------------------------------
388# CHECK: stm r1!, {r2, r6}
389# CHECK: stm r1!, {r1, r2, r3, r7}
390
3910x44 0xc1
3920x8e 0xc1
393
394
395#------------------------------------------------------------------------------
396# STR (immediate)
397#------------------------------------------------------------------------------
398# CHECK: str r2, [r7]
399# CHECK: str r2, [r7]
400# CHECK: str r5, [r1, #4]
401# CHECK: str r3, [r7, #124]
402# CHECK: str r2, [sp]
403# CHECK: str r3, [sp]
404# CHECK: str r4, [sp, #20]
405# CHECK: str r5, [sp, #1020]
406
4070x3a 0x60
4080x3a 0x60
4090x4d 0x60
4100xfb 0x67
4110x00 0x92
4120x00 0x93
4130x05 0x94
4140xff 0x95
415
416
417#------------------------------------------------------------------------------
418# STR (register)
419#------------------------------------------------------------------------------
420# CHECK: str r2, [r7, r3]
421
4220xfa 0x50
423
424
425#------------------------------------------------------------------------------
426# STRB (immediate)
427#------------------------------------------------------------------------------
428# CHECK: strb r4, [r3]
429# CHECK: strb r5, [r6]
430# CHECK: strb r6, [r7, #31]
431
4320x1c 0x70
4330x35 0x70
4340xfe 0x77
435
436
437#------------------------------------------------------------------------------
438# STRB (register)
439#------------------------------------------------------------------------------
440# CHECK: strb r6, [r4, r5]
441
4420x66 0x55
443
444
445#------------------------------------------------------------------------------
446# STRH (immediate)
447#------------------------------------------------------------------------------
448# CHECK: strh r3, [r3]
449# CHECK: strh r4, [r6, #2]
450# CHECK: strh r5, [r7, #62]
451
4520x1b 0x80
4530x74 0x80
4540xfd 0x87
455
456
457#------------------------------------------------------------------------------
458# STRH (register)
459#------------------------------------------------------------------------------
460# CHECK: strh r6, [r2, r6]
461
4620x96 0x53
463
464
465#------------------------------------------------------------------------------
466# SUB (immediate)
467#------------------------------------------------------------------------------
468# CHECK: subs r1, r2, #3
469# CHECK: subs r2, #3
470# CHECK: subs r2, #8
471
4720xd1 0x1e
4730x03 0x3a
4740x08 0x3a
475
476#------------------------------------------------------------------------------
477# SUB (register)
478#------------------------------------------------------------------------------
479# CHECK: subs r1, r2, r3
480
4810xd1 0x1a
482
Owen Anderson5e309722011-08-25 18:30:18 +0000[diff] [blame]483#------------------------------------------------------------------------------
484# SUB (SP minus immediate)
485#------------------------------------------------------------------------------
486# CHECK: sub sp, #12
487# CHECK: sub sp, #508
488
4890x83 0xb0
4900xff 0xb0
Owen Anderson16fd0d92011-08-24 17:08:34 +0000[diff] [blame]491
492#------------------------------------------------------------------------------
493# SVC
494#------------------------------------------------------------------------------
495# CHECK: svc #0
496# CHECK: svc #255
497
4980x00 0xdf
4990xff 0xdf
500
501
502#------------------------------------------------------------------------------
503# SXTB/SXTH
504#------------------------------------------------------------------------------
505# CHECK: sxtb r3, r5
506# CHECK: sxth r3, r5
507
5080x6b 0xb2
5090x2b 0xb2
510
511
512#------------------------------------------------------------------------------
513# TST
514#------------------------------------------------------------------------------
515# CHECK: tst r6, r1
516
5170x0e 0x42
518
519
520#------------------------------------------------------------------------------
521# UXTB/UXTH
522#------------------------------------------------------------------------------
523# CHECK: uxtb r7, r2
524# CHECK: uxth r1, r4
525
5260xd7 0xb2
5270xa1 0xb2