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Eugene Zelenko4f81cdd2017-09-29 21:55:49 +00001//===- llvm/CodeGen/CriticalAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-===//
David Goodwin83704852009-10-26 16:59:04 +00002//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
David Goodwin83704852009-10-26 16:59:04 +00006//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the CriticalAntiDepBreaker class, which
10// implements register anti-dependence breaking along a blocks
11// critical path during post-RA scheduler.
12//
13//===----------------------------------------------------------------------===//
14
Benjamin Kramera7c40ef2014-08-13 16:26:38 +000015#ifndef LLVM_LIB_CODEGEN_CRITICALANTIDEPBREAKER_H
16#define LLVM_LIB_CODEGEN_CRITICALANTIDEPBREAKER_H
David Goodwin83704852009-10-26 16:59:04 +000017
David Goodwine30ed532009-10-28 18:29:54 +000018#include "AntiDepBreaker.h"
Chandler Carruth802d7552012-12-04 07:12:27 +000019#include "llvm/ADT/BitVector.h"
Eugene Zelenko4f81cdd2017-09-29 21:55:49 +000020#include "llvm/Support/Compiler.h"
21#include <map>
22#include <vector>
David Goodwin83704852009-10-26 16:59:04 +000023
24namespace llvm {
Eugene Zelenko4f81cdd2017-09-29 21:55:49 +000025
26class MachineBasicBlock;
27class MachineFunction;
28class MachineInstr;
29class MachineOperand;
30class MachineRegisterInfo;
Jakob Stoklund Olesen4f5f84c2011-06-16 21:56:21 +000031class RegisterClassInfo;
Evan Chengf128bdc2010-06-16 07:35:02 +000032class TargetInstrInfo;
Eugene Zelenko4f81cdd2017-09-29 21:55:49 +000033class TargetRegisterClass;
Evan Chengf128bdc2010-06-16 07:35:02 +000034class TargetRegisterInfo;
35
Benjamin Kramerf4c20252015-07-01 14:47:39 +000036class LLVM_LIBRARY_VISIBILITY CriticalAntiDepBreaker : public AntiDepBreaker {
David Goodwin83704852009-10-26 16:59:04 +000037 MachineFunction& MF;
38 MachineRegisterInfo &MRI;
Evan Chengf128bdc2010-06-16 07:35:02 +000039 const TargetInstrInfo *TII;
David Goodwin83704852009-10-26 16:59:04 +000040 const TargetRegisterInfo *TRI;
Jakob Stoklund Olesen4f5f84c2011-06-16 21:56:21 +000041 const RegisterClassInfo &RegClassInfo;
David Goodwin83704852009-10-26 16:59:04 +000042
Sanjay Pateld6492352014-09-21 14:48:16 +000043 /// The set of allocatable registers.
David Goodwin83704852009-10-26 16:59:04 +000044 /// We'll be ignoring anti-dependencies on non-allocatable registers,
45 /// because they may not be safe to break.
46 const BitVector AllocatableSet;
47
Sanjay Pateld6492352014-09-21 14:48:16 +000048 /// For live regs that are only used in one register class in a
David Goodwin83704852009-10-26 16:59:04 +000049 /// live range, the register class. If the register is not live, the
50 /// corresponding value is null. If the register is live but used in
51 /// multiple register classes, the corresponding value is -1 casted to a
52 /// pointer.
Eugene Zelenko4f81cdd2017-09-29 21:55:49 +000053 std::vector<const TargetRegisterClass *> Classes;
David Goodwin83704852009-10-26 16:59:04 +000054
Sanjay Pateld6492352014-09-21 14:48:16 +000055 /// Map registers to all their references within a live range.
David Goodwin83704852009-10-26 16:59:04 +000056 std::multimap<unsigned, MachineOperand *> RegRefs;
Eugene Zelenko4f81cdd2017-09-29 21:55:49 +000057
58 using RegRefIter =
59 std::multimap<unsigned, MachineOperand *>::const_iterator;
David Goodwin83704852009-10-26 16:59:04 +000060
Sanjay Pateld6492352014-09-21 14:48:16 +000061 /// The index of the most recent kill (proceeding bottom-up),
David Goodwin83704852009-10-26 16:59:04 +000062 /// or ~0u if the register is not live.
Bill Wendling51a9c0a2010-07-15 19:58:14 +000063 std::vector<unsigned> KillIndices;
David Goodwin83704852009-10-26 16:59:04 +000064
Sanjay Pateld6492352014-09-21 14:48:16 +000065 /// The index of the most recent complete def (proceeding
Sanjay Patel99475192014-06-24 21:11:51 +000066 /// bottom up), or ~0u if the register is live.
Bill Wendling51a9c0a2010-07-15 19:58:14 +000067 std::vector<unsigned> DefIndices;
David Goodwin83704852009-10-26 16:59:04 +000068
Sanjay Pateld6492352014-09-21 14:48:16 +000069 /// A set of registers which are live and cannot be changed to
David Goodwin83704852009-10-26 16:59:04 +000070 /// break anti-dependencies.
Benjamin Kramer5d1bca82012-03-17 20:22:57 +000071 BitVector KeepRegs;
David Goodwin83704852009-10-26 16:59:04 +000072
73 public:
Eugene Zelenko4f81cdd2017-09-29 21:55:49 +000074 CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo &RCI);
Alexander Kornienkof817c1c2015-04-11 02:11:45 +000075 ~CriticalAntiDepBreaker() override;
Jim Grosbacheb431da2010-01-06 16:48:02 +000076
Sanjay Pateld6492352014-09-21 14:48:16 +000077 /// Initialize anti-dep breaking for a new basic block.
Craig Topper4584cd52014-03-07 09:26:03 +000078 void StartBlock(MachineBasicBlock *BB) override;
David Goodwin83704852009-10-26 16:59:04 +000079
Sanjay Pateld6492352014-09-21 14:48:16 +000080 /// Identifiy anti-dependencies along the critical path
David Goodwin83704852009-10-26 16:59:04 +000081 /// of the ScheduleDAG and break them by renaming registers.
Eugene Zelenko4f81cdd2017-09-29 21:55:49 +000082 unsigned BreakAntiDependencies(const std::vector<SUnit> &SUnits,
Dan Gohman35bc4d42010-04-19 23:11:58 +000083 MachineBasicBlock::iterator Begin,
84 MachineBasicBlock::iterator End,
Devang Patelf02a3762011-06-02 21:26:52 +000085 unsigned InsertPosIndex,
Craig Topper4584cd52014-03-07 09:26:03 +000086 DbgValueVector &DbgValues) override;
David Goodwin83704852009-10-26 16:59:04 +000087
Sanjay Pateld6492352014-09-21 14:48:16 +000088 /// Update liveness information to account for the current
David Goodwin83704852009-10-26 16:59:04 +000089 /// instruction, which will not be scheduled.
Duncan P. N. Exon Smith5e6e8c72016-02-27 19:33:37 +000090 void Observe(MachineInstr &MI, unsigned Count,
Craig Topper4584cd52014-03-07 09:26:03 +000091 unsigned InsertPosIndex) override;
David Goodwin83704852009-10-26 16:59:04 +000092
Sanjay Pateld6492352014-09-21 14:48:16 +000093 /// Finish anti-dep breaking for a basic block.
Craig Topper4584cd52014-03-07 09:26:03 +000094 void FinishBlock() override;
David Goodwin83704852009-10-26 16:59:04 +000095
96 private:
Duncan P. N. Exon Smith5e6e8c72016-02-27 19:33:37 +000097 void PrescanInstruction(MachineInstr &MI);
98 void ScanInstruction(MachineInstr &MI, unsigned Count);
Andrew Trick4b491872011-02-08 17:39:46 +000099 bool isNewRegClobberedByRefs(RegRefIter RegRefBegin,
100 RegRefIter RegRefEnd,
101 unsigned NewReg);
Andrew Trick82ae9a92010-11-02 18:16:45 +0000102 unsigned findSuitableFreeRegister(RegRefIter RegRefBegin,
103 RegRefIter RegRefEnd,
Jim Grosbacha7cef4f2010-01-06 22:21:25 +0000104 unsigned AntiDepReg,
David Goodwin83704852009-10-26 16:59:04 +0000105 unsigned LastNewReg,
Bill Schmidt2e4ae4e2013-01-28 18:36:58 +0000106 const TargetRegisterClass *RC,
Craig Topper72cde632013-07-03 05:16:59 +0000107 SmallVectorImpl<unsigned> &Forbid);
David Goodwin83704852009-10-26 16:59:04 +0000108 };
David Goodwin83704852009-10-26 16:59:04 +0000109
Eugene Zelenko4f81cdd2017-09-29 21:55:49 +0000110} // end namespace llvm
111
112#endif // LLVM_LIB_CODEGEN_CRITICALANTIDEPBREAKER_H