blob: 735eabdccdd1db5f494acc74097c7c5f82a5219f [file] [log] [blame]
Matt Arsenault3a997592014-09-26 01:09:46 +00001; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace %s
Vincent Lejeuned6cbede2013-10-13 17:56:28 +00002
Tom Stellard79243d92014-10-01 17:15:17 +00003; CHECK-LABEL: {{^}}main:
Tom Stellard326d6ec2014-11-05 14:50:53 +00004; CHECK: s_load_dwordx4
5; CHECK: s_load_dwordx4
6; CHECK: s_waitcnt lgkmcnt(0){{$}}
7; CHECK: s_waitcnt vmcnt(0){{$}}
8; CHECK: s_waitcnt expcnt(0) lgkmcnt(0){{$}}
Matt Arsenaultc10853f2014-08-06 00:29:43 +00009define void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, <16 x i8> addrspace(2)* inreg %arg3, <16 x i8> addrspace(2)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(2)* inreg %constptr) #0 {
Vincent Lejeuned6cbede2013-10-13 17:56:28 +000010main_body:
Matt Arsenaultc10853f2014-08-06 00:29:43 +000011 %tmp = getelementptr <16 x i8> addrspace(2)* %arg3, i32 0
12 %tmp10 = load <16 x i8> addrspace(2)* %tmp, !tbaa !0
13 %tmp11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp10, i32 0, i32 %arg6)
14 %tmp12 = extractelement <4 x float> %tmp11, i32 0
15 %tmp13 = extractelement <4 x float> %tmp11, i32 1
16 call void @llvm.AMDGPU.barrier.global() #1
17 %tmp14 = extractelement <4 x float> %tmp11, i32 2
18; %tmp15 = extractelement <4 x float> %tmp11, i32 3
19 %tmp15 = load float addrspace(2)* %constptr, align 4 ; Force waiting for expcnt and lgkmcnt
20 %tmp16 = getelementptr <16 x i8> addrspace(2)* %arg3, i32 1
21 %tmp17 = load <16 x i8> addrspace(2)* %tmp16, !tbaa !0
22 %tmp18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp17, i32 0, i32 %arg6)
23 %tmp19 = extractelement <4 x float> %tmp18, i32 0
24 %tmp20 = extractelement <4 x float> %tmp18, i32 1
25 %tmp21 = extractelement <4 x float> %tmp18, i32 2
26 %tmp22 = extractelement <4 x float> %tmp18, i32 3
27 call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %tmp19, float %tmp20, float %tmp21, float %tmp22)
28 call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %tmp12, float %tmp13, float %tmp14, float %tmp15)
Vincent Lejeuned6cbede2013-10-13 17:56:28 +000029 ret void
30}
31
Matt Arsenaultc10853f2014-08-06 00:29:43 +000032; Function Attrs: noduplicate nounwind
33declare void @llvm.AMDGPU.barrier.global() #1
34
Vincent Lejeuned6cbede2013-10-13 17:56:28 +000035; Function Attrs: nounwind readnone
Matt Arsenaultc10853f2014-08-06 00:29:43 +000036declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #2
Vincent Lejeuned6cbede2013-10-13 17:56:28 +000037
38declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
39
40attributes #0 = { "ShaderType"="1" }
Matt Arsenaultc10853f2014-08-06 00:29:43 +000041attributes #1 = { noduplicate nounwind }
42attributes #2 = { nounwind readnone }
Vincent Lejeuned6cbede2013-10-13 17:56:28 +000043
Matt Arsenaultc10853f2014-08-06 00:29:43 +000044!0 = metadata !{metadata !1, metadata !1, i64 0, i32 1}
45!1 = metadata !{metadata !"const", null}