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gerrit-public.fairphone.software / toolchain / llvm-project / 48adedffb7ee3a38ab6f1540fa4277ead8c75a53 / . / llvm / test / CodeGen / X86 / vector-shuffle-combining-avx2.ll
blob: b6e66c980e9b89594e94224a016f9e3262882afc [file] [log] [blame]
Ahmed Bougacha671795a2016-03-03 16:53:50 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s
3
4declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>)
5declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>)
Simon Pilgrim21b2c562016-05-02 19:46:58 +0000[diff] [blame]6declare <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>)
Ahmed Bougacha671795a2016-03-03 16:53:50 +0000[diff] [blame]7
Simon Pilgrim8dd73e32016-06-11 13:18:21 +0000[diff] [blame]8define <32 x i8> @combine_pshufb_pslldq(<32 x i8> %a0) {
9; CHECK-LABEL: combine_pshufb_pslldq:
10; CHECK: # BB#0:
Simon Pilgrim6800a452016-06-11 13:38:28 +0000[diff] [blame]11; CHECK-NEXT: vxorps %ymm0, %ymm0, %ymm0
Simon Pilgrim8dd73e32016-06-11 13:18:21 +0000[diff] [blame]12; CHECK-NEXT: retq
13 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
14 %2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
15 ret <32 x i8> %2
16}
17
18define <32 x i8> @combine_pshufb_psrldq(<32 x i8> %a0) {
19; CHECK-LABEL: combine_pshufb_psrldq:
20; CHECK: # BB#0:
Simon Pilgrim6800a452016-06-11 13:38:28 +0000[diff] [blame]21; CHECK-NEXT: vxorps %ymm0, %ymm0, %ymm0
Simon Pilgrim8dd73e32016-06-11 13:18:21 +0000[diff] [blame]22; CHECK-NEXT: retq
23 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>)
24 %2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32>
25 ret <32 x i8> %2
26}
27
Ahmed Bougacha671795a2016-03-03 16:53:50 +0000[diff] [blame]28define <32 x i8> @combine_pshufb_vpermd(<8 x i32> %a) {
29; CHECK-LABEL: combine_pshufb_vpermd:
30; CHECK: # BB#0:
31; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,16,17,18,18]
32; CHECK-NEXT: retq
33 %tmp0 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4>)
34 %tmp1 = bitcast <8 x i32> %tmp0 to <32 x i8>
35 %tmp2 = shufflevector <32 x i8> %tmp1, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 30>
36 ret <32 x i8> %tmp2
37}
38
39define <32 x i8> @combine_pshufb_vpermps(<8 x float> %a) {
40; CHECK-LABEL: combine_pshufb_vpermps:
41; CHECK: # BB#0:
42; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,16,17,18,18]
43; CHECK-NEXT: retq
44 %tmp0 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4>)
45 %tmp1 = bitcast <8 x float> %tmp0 to <32 x i8>
46 %tmp2 = shufflevector <32 x i8> %tmp1, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 30>
47 ret <32 x i8> %tmp2
48}
Simon Pilgrim21b2c562016-05-02 19:46:58 +0000[diff] [blame]49
50define <4 x i64> @combine_permq_pshufb(<4 x i64> %a0) {
51; CHECK-LABEL: combine_permq_pshufb:
52; CHECK: # BB#0:
53; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[3,2,1,0]
Simon Pilgrimc15d2172016-06-28 08:08:15 +0000[diff] [blame]54; CHECK-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[2,3,0,1,6,7,4,5]
Simon Pilgrim21b2c562016-05-02 19:46:58 +0000[diff] [blame]55; CHECK-NEXT: retq
56 %1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
57 %2 = bitcast <4 x i64> %1 to <32 x i8>
58 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
59 %4 = bitcast <32 x i8> %3 to <4 x i64>
60 ret <4 x i64> %4
61}