Nate Begeman | 0b71e00 | 2005-10-18 00:28:58 +0000 | [diff] [blame] | 1 | //===-- PPCISelLowering.cpp - PPC DAG Lowering Implementation -------------===// |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | f3ebc3f | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
Nate Begeman | 6cca84e | 2005-10-16 05:39:50 +0000 | [diff] [blame] | 10 | // This file implements the PPCISelLowering class. |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
Chris Lattner | 6f3b954 | 2005-10-14 23:59:06 +0000 | [diff] [blame] | 14 | #include "PPCISelLowering.h" |
Chandler Carruth | ed0881b | 2012-12-03 16:50:05 +0000 | [diff] [blame] | 15 | #include "MCTargetDesc/PPCPredicates.h" |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 16 | #include "PPCMachineFunctionInfo.h" |
Bill Wendling | dd3fe94 | 2010-03-12 02:00:43 +0000 | [diff] [blame] | 17 | #include "PPCPerfectShuffle.h" |
Chris Lattner | 6f3b954 | 2005-10-14 23:59:06 +0000 | [diff] [blame] | 18 | #include "PPCTargetMachine.h" |
Bill Schmidt | 22d40dc | 2013-05-13 19:34:37 +0000 | [diff] [blame] | 19 | #include "PPCTargetObjectFile.h" |
Owen Anderson | e2f23a3 | 2007-09-07 04:06:50 +0000 | [diff] [blame] | 20 | #include "llvm/ADT/STLExtras.h" |
Hal Finkel | 0d8db46 | 2014-05-11 19:29:11 +0000 | [diff] [blame] | 21 | #include "llvm/ADT/StringSwitch.h" |
Eric Christopher | 8995833 | 2014-05-31 00:07:32 +0000 | [diff] [blame] | 22 | #include "llvm/ADT/Triple.h" |
Chris Lattner | 4f2e4e0 | 2007-03-06 00:59:59 +0000 | [diff] [blame] | 23 | #include "llvm/CodeGen/CallingConvLower.h" |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 24 | #include "llvm/CodeGen/MachineFrameInfo.h" |
| 25 | #include "llvm/CodeGen/MachineFunction.h" |
Chris Lattner | 9b577f1 | 2005-08-26 21:23:58 +0000 | [diff] [blame] | 26 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
Chris Lattner | a10fff5 | 2007-12-31 04:13:23 +0000 | [diff] [blame] | 27 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 28 | #include "llvm/CodeGen/SelectionDAG.h" |
Anton Korobeynikov | ab663a0 | 2010-02-15 22:37:53 +0000 | [diff] [blame] | 29 | #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" |
Chandler Carruth | 9fb823b | 2013-01-02 11:36:10 +0000 | [diff] [blame] | 30 | #include "llvm/IR/CallingConv.h" |
| 31 | #include "llvm/IR/Constants.h" |
| 32 | #include "llvm/IR/DerivedTypes.h" |
| 33 | #include "llvm/IR/Function.h" |
| 34 | #include "llvm/IR/Intrinsics.h" |
Chris Lattner | ce64554 | 2006-11-10 02:08:47 +0000 | [diff] [blame] | 35 | #include "llvm/Support/CommandLine.h" |
Torok Edwin | fb8d6d5 | 2009-07-08 20:53:28 +0000 | [diff] [blame] | 36 | #include "llvm/Support/ErrorHandling.h" |
Craig Topper | b25fda9 | 2012-03-17 18:46:09 +0000 | [diff] [blame] | 37 | #include "llvm/Support/MathExtras.h" |
Torok Edwin | fb8d6d5 | 2009-07-08 20:53:28 +0000 | [diff] [blame] | 38 | #include "llvm/Support/raw_ostream.h" |
Craig Topper | b25fda9 | 2012-03-17 18:46:09 +0000 | [diff] [blame] | 39 | #include "llvm/Target/TargetOptions.h" |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 40 | using namespace llvm; |
| 41 | |
Hal Finkel | 595817e | 2012-06-04 02:21:00 +0000 | [diff] [blame] | 42 | static cl::opt<bool> DisablePPCPreinc("disable-ppc-preinc", |
| 43 | cl::desc("disable preincrement load/store generation on PPC"), cl::Hidden); |
Chris Lattner | ce64554 | 2006-11-10 02:08:47 +0000 | [diff] [blame] | 44 | |
Hal Finkel | 4e9f1a8 | 2012-06-10 19:32:29 +0000 | [diff] [blame] | 45 | static cl::opt<bool> DisableILPPref("disable-ppc-ilp-pref", |
| 46 | cl::desc("disable setting the node scheduling preference to ILP on PPC"), cl::Hidden); |
| 47 | |
Hal Finkel | 8d7fbc9 | 2013-03-15 15:27:13 +0000 | [diff] [blame] | 48 | static cl::opt<bool> DisablePPCUnaligned("disable-ppc-unaligned", |
| 49 | cl::desc("disable unaligned load/store generation on PPC"), cl::Hidden); |
| 50 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 51 | // FIXME: Remove this once the bug has been fixed! |
| 52 | extern cl::opt<bool> ANDIGlueBug; |
| 53 | |
Eric Christopher | 8995833 | 2014-05-31 00:07:32 +0000 | [diff] [blame] | 54 | static TargetLoweringObjectFile *createTLOF(const Triple &TT) { |
Eric Christopher | a84189a | 2014-06-02 17:29:07 +0000 | [diff] [blame] | 55 | // If it isn't a Mach-O file then it's going to be a linux ELF |
| 56 | // object file. |
Eric Christopher | 8995833 | 2014-05-31 00:07:32 +0000 | [diff] [blame] | 57 | if (TT.isOSDarwin()) |
Bill Wendling | bbcaa40 | 2010-03-15 21:09:38 +0000 | [diff] [blame] | 58 | return new TargetLoweringObjectFileMachO(); |
Eric Christopher | a84189a | 2014-06-02 17:29:07 +0000 | [diff] [blame] | 59 | |
| 60 | return new PPC64LinuxTargetObjectFile(); |
Chris Lattner | 5e693ed | 2009-07-28 03:13:23 +0000 | [diff] [blame] | 61 | } |
| 62 | |
Chris Lattner | 584a11a | 2006-11-02 01:44:04 +0000 | [diff] [blame] | 63 | PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) |
Eric Christopher | 8995833 | 2014-05-31 00:07:32 +0000 | [diff] [blame] | 64 | : TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))), |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 65 | Subtarget(*TM.getSubtargetImpl()) { |
Nate Begeman | 4dd3831 | 2005-10-21 00:02:42 +0000 | [diff] [blame] | 66 | setPow2DivIsCheap(); |
Dale Johannesen | c31eb20 | 2008-07-31 18:13:12 +0000 | [diff] [blame] | 67 | |
Chris Lattner | a028e7a | 2005-09-27 22:18:25 +0000 | [diff] [blame] | 68 | // Use _setjmp/_longjmp instead of setjmp/longjmp. |
Anton Korobeynikov | 3b7c257 | 2006-12-10 23:12:42 +0000 | [diff] [blame] | 69 | setUseUnderscoreSetJmp(true); |
| 70 | setUseUnderscoreLongJmp(true); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 71 | |
Chris Lattner | d10babf | 2010-10-10 18:34:00 +0000 | [diff] [blame] | 72 | // On PPC32/64, arguments smaller than 4/8 bytes are extended, so all |
| 73 | // arguments are at least 4/8 bytes aligned. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 74 | bool isPPC64 = Subtarget.isPPC64(); |
Evan Cheng | 39e9002 | 2012-07-02 22:39:56 +0000 | [diff] [blame] | 75 | setMinStackArgumentAlignment(isPPC64 ? 8:4); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 76 | |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 77 | // Set up the register classes. |
Craig Topper | abadc66 | 2012-04-20 06:31:50 +0000 | [diff] [blame] | 78 | addRegisterClass(MVT::i32, &PPC::GPRCRegClass); |
| 79 | addRegisterClass(MVT::f32, &PPC::F4RCRegClass); |
| 80 | addRegisterClass(MVT::f64, &PPC::F8RCRegClass); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 81 | |
Evan Cheng | 5d9fd97 | 2006-10-04 00:56:09 +0000 | [diff] [blame] | 82 | // PowerPC has an i16 but no i8 (or i1) SEXTLOAD |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 83 | setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote); |
| 84 | setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand); |
Duncan Sands | 95d46ef | 2008-01-23 20:39:46 +0000 | [diff] [blame] | 85 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 86 | setTruncStoreAction(MVT::f64, MVT::f32, Expand); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 87 | |
Chris Lattner | c9fa36d | 2006-11-10 23:58:45 +0000 | [diff] [blame] | 88 | // PowerPC has pre-inc load and store's. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 89 | setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); |
| 90 | setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); |
| 91 | setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); |
| 92 | setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); |
| 93 | setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); |
| 94 | setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); |
| 95 | setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); |
| 96 | setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); |
| 97 | setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); |
| 98 | setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); |
Evan Cheng | 36a8fbf | 2006-11-09 19:11:50 +0000 | [diff] [blame] | 99 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 100 | if (Subtarget.useCRBits()) { |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 101 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); |
| 102 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 103 | if (isPPC64 || Subtarget.hasFPCVT()) { |
Hal Finkel | 6a56b21 | 2014-03-05 22:14:00 +0000 | [diff] [blame] | 104 | setOperationAction(ISD::SINT_TO_FP, MVT::i1, Promote); |
| 105 | AddPromotedToType (ISD::SINT_TO_FP, MVT::i1, |
| 106 | isPPC64 ? MVT::i64 : MVT::i32); |
| 107 | setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); |
| 108 | AddPromotedToType (ISD::UINT_TO_FP, MVT::i1, |
| 109 | isPPC64 ? MVT::i64 : MVT::i32); |
| 110 | } else { |
| 111 | setOperationAction(ISD::SINT_TO_FP, MVT::i1, Custom); |
| 112 | setOperationAction(ISD::UINT_TO_FP, MVT::i1, Custom); |
| 113 | } |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 114 | |
| 115 | // PowerPC does not support direct load / store of condition registers |
| 116 | setOperationAction(ISD::LOAD, MVT::i1, Custom); |
| 117 | setOperationAction(ISD::STORE, MVT::i1, Custom); |
| 118 | |
| 119 | // FIXME: Remove this once the ANDI glue bug is fixed: |
| 120 | if (ANDIGlueBug) |
| 121 | setOperationAction(ISD::TRUNCATE, MVT::i1, Custom); |
| 122 | |
| 123 | setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote); |
| 124 | setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); |
| 125 | setTruncStoreAction(MVT::i64, MVT::i1, Expand); |
| 126 | setTruncStoreAction(MVT::i32, MVT::i1, Expand); |
| 127 | setTruncStoreAction(MVT::i16, MVT::i1, Expand); |
| 128 | setTruncStoreAction(MVT::i8, MVT::i1, Expand); |
| 129 | |
| 130 | addRegisterClass(MVT::i1, &PPC::CRBITRCRegClass); |
| 131 | } |
| 132 | |
Dale Johannesen | 666323e | 2007-10-10 01:01:31 +0000 | [diff] [blame] | 133 | // This is used in the ppcf128->int sequence. Note it has different semantics |
| 134 | // from FP_ROUND: that rounds to nearest, this rounds to zero. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 135 | setOperationAction(ISD::FP_ROUND_INREG, MVT::ppcf128, Custom); |
Dale Johannesen | f864ac9 | 2007-10-06 01:24:11 +0000 | [diff] [blame] | 136 | |
Roman Divacky | 1faf5b0 | 2012-08-16 18:19:29 +0000 | [diff] [blame] | 137 | // We do not currently implement these libm ops for PowerPC. |
Owen Anderson | 0b9b9da | 2011-12-08 19:32:14 +0000 | [diff] [blame] | 138 | setOperationAction(ISD::FFLOOR, MVT::ppcf128, Expand); |
| 139 | setOperationAction(ISD::FCEIL, MVT::ppcf128, Expand); |
| 140 | setOperationAction(ISD::FTRUNC, MVT::ppcf128, Expand); |
| 141 | setOperationAction(ISD::FRINT, MVT::ppcf128, Expand); |
| 142 | setOperationAction(ISD::FNEARBYINT, MVT::ppcf128, Expand); |
Bill Schmidt | 92e2664 | 2013-04-03 13:05:44 +0000 | [diff] [blame] | 143 | setOperationAction(ISD::FREM, MVT::ppcf128, Expand); |
Owen Anderson | 0b9b9da | 2011-12-08 19:32:14 +0000 | [diff] [blame] | 144 | |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 145 | // PowerPC has no SREM/UREM instructions |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 146 | setOperationAction(ISD::SREM, MVT::i32, Expand); |
| 147 | setOperationAction(ISD::UREM, MVT::i32, Expand); |
| 148 | setOperationAction(ISD::SREM, MVT::i64, Expand); |
| 149 | setOperationAction(ISD::UREM, MVT::i64, Expand); |
Dan Gohman | 71f0d7d | 2007-10-08 17:28:24 +0000 | [diff] [blame] | 150 | |
| 151 | // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 152 | setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); |
| 153 | setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); |
| 154 | setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); |
| 155 | setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); |
| 156 | setOperationAction(ISD::UDIVREM, MVT::i32, Expand); |
| 157 | setOperationAction(ISD::SDIVREM, MVT::i32, Expand); |
| 158 | setOperationAction(ISD::UDIVREM, MVT::i64, Expand); |
| 159 | setOperationAction(ISD::SDIVREM, MVT::i64, Expand); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 160 | |
Dan Gohman | 482732a | 2007-10-11 23:21:31 +0000 | [diff] [blame] | 161 | // We don't support sin/cos/sqrt/fmod/pow |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 162 | setOperationAction(ISD::FSIN , MVT::f64, Expand); |
| 163 | setOperationAction(ISD::FCOS , MVT::f64, Expand); |
Evan Cheng | 0e88c7d | 2013-01-29 02:32:37 +0000 | [diff] [blame] | 164 | setOperationAction(ISD::FSINCOS, MVT::f64, Expand); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 165 | setOperationAction(ISD::FREM , MVT::f64, Expand); |
| 166 | setOperationAction(ISD::FPOW , MVT::f64, Expand); |
Hal Finkel | 0a479ae | 2012-06-22 00:49:52 +0000 | [diff] [blame] | 167 | setOperationAction(ISD::FMA , MVT::f64, Legal); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 168 | setOperationAction(ISD::FSIN , MVT::f32, Expand); |
| 169 | setOperationAction(ISD::FCOS , MVT::f32, Expand); |
Evan Cheng | 0e88c7d | 2013-01-29 02:32:37 +0000 | [diff] [blame] | 170 | setOperationAction(ISD::FSINCOS, MVT::f32, Expand); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 171 | setOperationAction(ISD::FREM , MVT::f32, Expand); |
| 172 | setOperationAction(ISD::FPOW , MVT::f32, Expand); |
Hal Finkel | 0a479ae | 2012-06-22 00:49:52 +0000 | [diff] [blame] | 173 | setOperationAction(ISD::FMA , MVT::f32, Legal); |
Dale Johannesen | 5c94cb3 | 2008-01-18 19:55:37 +0000 | [diff] [blame] | 174 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 175 | setOperationAction(ISD::FLT_ROUNDS_, MVT::i32, Custom); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 176 | |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 177 | // If we're enabling GP optimizations, use hardware square root |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 178 | if (!Subtarget.hasFSQRT() && |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 179 | !(TM.Options.UnsafeFPMath && |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 180 | Subtarget.hasFRSQRTE() && Subtarget.hasFRE())) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 181 | setOperationAction(ISD::FSQRT, MVT::f64, Expand); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 182 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 183 | if (!Subtarget.hasFSQRT() && |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 184 | !(TM.Options.UnsafeFPMath && |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 185 | Subtarget.hasFRSQRTES() && Subtarget.hasFRES())) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 186 | setOperationAction(ISD::FSQRT, MVT::f32, Expand); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 187 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 188 | if (Subtarget.hasFCPSGN()) { |
Hal Finkel | dbc78e1 | 2013-08-19 05:01:02 +0000 | [diff] [blame] | 189 | setOperationAction(ISD::FCOPYSIGN, MVT::f64, Legal); |
| 190 | setOperationAction(ISD::FCOPYSIGN, MVT::f32, Legal); |
| 191 | } else { |
| 192 | setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); |
| 193 | setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); |
| 194 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 195 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 196 | if (Subtarget.hasFPRND()) { |
Hal Finkel | c20a08d | 2013-03-29 08:57:48 +0000 | [diff] [blame] | 197 | setOperationAction(ISD::FFLOOR, MVT::f64, Legal); |
| 198 | setOperationAction(ISD::FCEIL, MVT::f64, Legal); |
| 199 | setOperationAction(ISD::FTRUNC, MVT::f64, Legal); |
Hal Finkel | 2b7b2f3 | 2013-08-08 04:31:34 +0000 | [diff] [blame] | 200 | setOperationAction(ISD::FROUND, MVT::f64, Legal); |
Hal Finkel | c20a08d | 2013-03-29 08:57:48 +0000 | [diff] [blame] | 201 | |
| 202 | setOperationAction(ISD::FFLOOR, MVT::f32, Legal); |
| 203 | setOperationAction(ISD::FCEIL, MVT::f32, Legal); |
| 204 | setOperationAction(ISD::FTRUNC, MVT::f32, Legal); |
Hal Finkel | 2b7b2f3 | 2013-08-08 04:31:34 +0000 | [diff] [blame] | 205 | setOperationAction(ISD::FROUND, MVT::f32, Legal); |
Hal Finkel | c20a08d | 2013-03-29 08:57:48 +0000 | [diff] [blame] | 206 | } |
| 207 | |
Nate Begeman | 2fba8a3 | 2006-01-14 03:14:10 +0000 | [diff] [blame] | 208 | // PowerPC does not have BSWAP, CTPOP or CTTZ |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 209 | setOperationAction(ISD::BSWAP, MVT::i32 , Expand); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 210 | setOperationAction(ISD::CTTZ , MVT::i32 , Expand); |
Chandler Carruth | 637cc6a | 2011-12-13 01:56:10 +0000 | [diff] [blame] | 211 | setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); |
| 212 | setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 213 | setOperationAction(ISD::BSWAP, MVT::i64 , Expand); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 214 | setOperationAction(ISD::CTTZ , MVT::i64 , Expand); |
Chandler Carruth | 637cc6a | 2011-12-13 01:56:10 +0000 | [diff] [blame] | 215 | setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); |
| 216 | setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 217 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 218 | if (Subtarget.hasPOPCNTD()) { |
Hal Finkel | 290376d | 2013-04-01 15:58:15 +0000 | [diff] [blame] | 219 | setOperationAction(ISD::CTPOP, MVT::i32 , Legal); |
Hal Finkel | a4d0748 | 2013-03-28 13:29:47 +0000 | [diff] [blame] | 220 | setOperationAction(ISD::CTPOP, MVT::i64 , Legal); |
| 221 | } else { |
| 222 | setOperationAction(ISD::CTPOP, MVT::i32 , Expand); |
| 223 | setOperationAction(ISD::CTPOP, MVT::i64 , Expand); |
| 224 | } |
| 225 | |
Nate Begeman | 1b8121b | 2006-01-11 21:21:00 +0000 | [diff] [blame] | 226 | // PowerPC does not have ROTR |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 227 | setOperationAction(ISD::ROTR, MVT::i32 , Expand); |
| 228 | setOperationAction(ISD::ROTR, MVT::i64 , Expand); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 229 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 230 | if (!Subtarget.useCRBits()) { |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 231 | // PowerPC does not have Select |
| 232 | setOperationAction(ISD::SELECT, MVT::i32, Expand); |
| 233 | setOperationAction(ISD::SELECT, MVT::i64, Expand); |
| 234 | setOperationAction(ISD::SELECT, MVT::f32, Expand); |
| 235 | setOperationAction(ISD::SELECT, MVT::f64, Expand); |
| 236 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 237 | |
Chris Lattner | 7f1fa8e | 2005-08-26 17:36:52 +0000 | [diff] [blame] | 238 | // PowerPC wants to turn select_cc of FP into fsel when possible. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 239 | setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); |
| 240 | setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); |
Nate Begeman | a162f20 | 2006-01-31 08:17:29 +0000 | [diff] [blame] | 241 | |
Nate Begeman | 7e7f439 | 2006-02-01 07:19:44 +0000 | [diff] [blame] | 242 | // PowerPC wants to optimize integer setcc a bit |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 243 | if (!Subtarget.useCRBits()) |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 244 | setOperationAction(ISD::SETCC, MVT::i32, Custom); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 245 | |
Nate Begeman | bb01d4f | 2006-03-17 01:40:33 +0000 | [diff] [blame] | 246 | // PowerPC does not have BRCOND which requires SetCC |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 247 | if (!Subtarget.useCRBits()) |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 248 | setOperationAction(ISD::BRCOND, MVT::Other, Expand); |
Evan Cheng | 0d41d19 | 2006-10-30 08:02:39 +0000 | [diff] [blame] | 249 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 250 | setOperationAction(ISD::BR_JT, MVT::Other, Expand); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 251 | |
Chris Lattner | da2e04c | 2005-08-31 21:09:52 +0000 | [diff] [blame] | 252 | // PowerPC turns FP_TO_SINT into FCTIWZ and some load/stores. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 253 | setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); |
Nate Begeman | 6095214 | 2005-09-06 22:03:27 +0000 | [diff] [blame] | 254 | |
Jim Laskey | 6267b2c | 2005-08-17 00:40:22 +0000 | [diff] [blame] | 255 | // PowerPC does not have [U|S]INT_TO_FP |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 256 | setOperationAction(ISD::SINT_TO_FP, MVT::i32, Expand); |
| 257 | setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); |
Jim Laskey | 6267b2c | 2005-08-17 00:40:22 +0000 | [diff] [blame] | 258 | |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 259 | setOperationAction(ISD::BITCAST, MVT::f32, Expand); |
| 260 | setOperationAction(ISD::BITCAST, MVT::i32, Expand); |
| 261 | setOperationAction(ISD::BITCAST, MVT::i64, Expand); |
| 262 | setOperationAction(ISD::BITCAST, MVT::f64, Expand); |
Chris Lattner | c46fc24 | 2005-12-23 05:13:35 +0000 | [diff] [blame] | 263 | |
Chris Lattner | 84b49d5 | 2006-04-28 21:56:10 +0000 | [diff] [blame] | 264 | // We cannot sextinreg(i1). Expand to shifts. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 265 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); |
Jim Laskey | e0008e2 | 2007-02-22 14:56:36 +0000 | [diff] [blame] | 266 | |
Hal Finkel | 1996f3d | 2013-03-27 19:10:42 +0000 | [diff] [blame] | 267 | // NOTE: EH_SJLJ_SETJMP/_LONGJMP supported here is NOT intended to support |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 268 | // SjLj exception handling but a light-weight setjmp/longjmp replacement to |
| 269 | // support continuation, user-level threading, and etc.. As a result, no |
| 270 | // other SjLj exception interfaces are implemented and please don't build |
| 271 | // your own exception handling based on them. |
| 272 | // LLVM/Clang supports zero-cost DWARF exception handling. |
| 273 | setOperationAction(ISD::EH_SJLJ_SETJMP, MVT::i32, Custom); |
| 274 | setOperationAction(ISD::EH_SJLJ_LONGJMP, MVT::Other, Custom); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 275 | |
| 276 | // We want to legalize GlobalAddress and ConstantPool nodes into the |
Nate Begeman | 4e56db6 | 2005-12-10 02:36:00 +0000 | [diff] [blame] | 277 | // appropriate instructions to materialize the address. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 278 | setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); |
| 279 | setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom); |
Bob Wilson | f84f710 | 2009-11-04 21:31:18 +0000 | [diff] [blame] | 280 | setOperationAction(ISD::BlockAddress, MVT::i32, Custom); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 281 | setOperationAction(ISD::ConstantPool, MVT::i32, Custom); |
| 282 | setOperationAction(ISD::JumpTable, MVT::i32, Custom); |
| 283 | setOperationAction(ISD::GlobalAddress, MVT::i64, Custom); |
| 284 | setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom); |
Bob Wilson | f84f710 | 2009-11-04 21:31:18 +0000 | [diff] [blame] | 285 | setOperationAction(ISD::BlockAddress, MVT::i64, Custom); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 286 | setOperationAction(ISD::ConstantPool, MVT::i64, Custom); |
| 287 | setOperationAction(ISD::JumpTable, MVT::i64, Custom); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 288 | |
Nate Begeman | f69d13b | 2008-08-11 17:36:31 +0000 | [diff] [blame] | 289 | // TRAP is legal. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 290 | setOperationAction(ISD::TRAP, MVT::Other, Legal); |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 291 | |
| 292 | // TRAMPOLINE is custom lowered. |
Duncan Sands | a098436 | 2011-09-06 13:37:06 +0000 | [diff] [blame] | 293 | setOperationAction(ISD::INIT_TRAMPOLINE, MVT::Other, Custom); |
| 294 | setOperationAction(ISD::ADJUST_TRAMPOLINE, MVT::Other, Custom); |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 295 | |
Nate Begeman | e74795c | 2006-01-25 18:21:52 +0000 | [diff] [blame] | 296 | // VASTART needs to be custom lowered to use the VarArgsFrameIndex |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 297 | setOperationAction(ISD::VASTART , MVT::Other, Custom); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 298 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 299 | if (Subtarget.isSVR4ABI()) { |
Evan Cheng | 39e9002 | 2012-07-02 22:39:56 +0000 | [diff] [blame] | 300 | if (isPPC64) { |
Hal Finkel | e44eb28 | 2012-03-24 03:53:55 +0000 | [diff] [blame] | 301 | // VAARG always uses double-word chunks, so promote anything smaller. |
| 302 | setOperationAction(ISD::VAARG, MVT::i1, Promote); |
| 303 | AddPromotedToType (ISD::VAARG, MVT::i1, MVT::i64); |
| 304 | setOperationAction(ISD::VAARG, MVT::i8, Promote); |
| 305 | AddPromotedToType (ISD::VAARG, MVT::i8, MVT::i64); |
| 306 | setOperationAction(ISD::VAARG, MVT::i16, Promote); |
| 307 | AddPromotedToType (ISD::VAARG, MVT::i16, MVT::i64); |
| 308 | setOperationAction(ISD::VAARG, MVT::i32, Promote); |
| 309 | AddPromotedToType (ISD::VAARG, MVT::i32, MVT::i64); |
| 310 | setOperationAction(ISD::VAARG, MVT::Other, Expand); |
| 311 | } else { |
| 312 | // VAARG is custom lowered with the 32-bit SVR4 ABI. |
| 313 | setOperationAction(ISD::VAARG, MVT::Other, Custom); |
| 314 | setOperationAction(ISD::VAARG, MVT::i64, Custom); |
| 315 | } |
Roman Divacky | 4394e68 | 2011-06-28 15:30:42 +0000 | [diff] [blame] | 316 | } else |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 317 | setOperationAction(ISD::VAARG, MVT::Other, Expand); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 318 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 319 | if (Subtarget.isSVR4ABI() && !isPPC64) |
Roman Divacky | c3825df | 2013-07-25 21:36:47 +0000 | [diff] [blame] | 320 | // VACOPY is custom lowered with the 32-bit SVR4 ABI. |
| 321 | setOperationAction(ISD::VACOPY , MVT::Other, Custom); |
| 322 | else |
| 323 | setOperationAction(ISD::VACOPY , MVT::Other, Expand); |
| 324 | |
Chris Lattner | 5bd514d | 2006-01-15 09:02:48 +0000 | [diff] [blame] | 325 | // Use the default implementation. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 326 | setOperationAction(ISD::VAEND , MVT::Other, Expand); |
| 327 | setOperationAction(ISD::STACKSAVE , MVT::Other, Expand); |
| 328 | setOperationAction(ISD::STACKRESTORE , MVT::Other, Custom); |
| 329 | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Custom); |
| 330 | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64 , Custom); |
Chris Lattner | ab4df834 | 2006-10-18 01:18:48 +0000 | [diff] [blame] | 331 | |
Chris Lattner | 6961fc7 | 2006-03-26 10:06:40 +0000 | [diff] [blame] | 332 | // We want to custom lower some of our intrinsics. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 333 | setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 334 | |
Hal Finkel | 25c1992 | 2013-05-15 21:37:41 +0000 | [diff] [blame] | 335 | // To handle counter-based loop conditions. |
| 336 | setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i1, Custom); |
| 337 | |
Dale Johannesen | 160be0f | 2008-11-07 22:54:33 +0000 | [diff] [blame] | 338 | // Comparisons that require checking two conditions. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 339 | setCondCodeAction(ISD::SETULT, MVT::f32, Expand); |
| 340 | setCondCodeAction(ISD::SETULT, MVT::f64, Expand); |
| 341 | setCondCodeAction(ISD::SETUGT, MVT::f32, Expand); |
| 342 | setCondCodeAction(ISD::SETUGT, MVT::f64, Expand); |
| 343 | setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand); |
| 344 | setCondCodeAction(ISD::SETUEQ, MVT::f64, Expand); |
| 345 | setCondCodeAction(ISD::SETOGE, MVT::f32, Expand); |
| 346 | setCondCodeAction(ISD::SETOGE, MVT::f64, Expand); |
| 347 | setCondCodeAction(ISD::SETOLE, MVT::f32, Expand); |
| 348 | setCondCodeAction(ISD::SETOLE, MVT::f64, Expand); |
| 349 | setCondCodeAction(ISD::SETONE, MVT::f32, Expand); |
| 350 | setCondCodeAction(ISD::SETONE, MVT::f64, Expand); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 351 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 352 | if (Subtarget.has64BitSupport()) { |
Nate Begeman | 0b71e00 | 2005-10-18 00:28:58 +0000 | [diff] [blame] | 353 | // They also have instructions for converting between i64 and fp. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 354 | setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); |
| 355 | setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); |
| 356 | setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom); |
| 357 | setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); |
Dale Johannesen | 37bc85f | 2009-06-04 20:53:52 +0000 | [diff] [blame] | 358 | // This is just the low 32 bits of a (signed) fp->i64 conversion. |
| 359 | // We cannot do this with Promote because i64 is not a legal type. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 360 | setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 361 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 362 | if (Subtarget.hasLFIWAX() || Subtarget.isPPC64()) |
Hal Finkel | e53429a | 2013-03-31 01:58:02 +0000 | [diff] [blame] | 363 | setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom); |
Nate Begeman | 762bf80 | 2005-10-25 23:48:36 +0000 | [diff] [blame] | 364 | } else { |
Chris Lattner | 595088a | 2005-11-17 07:30:41 +0000 | [diff] [blame] | 365 | // PowerPC does not have FP_TO_UINT on 32-bit implementations. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 366 | setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); |
Nate Begeman | e74dfbb | 2005-10-18 00:56:42 +0000 | [diff] [blame] | 367 | } |
| 368 | |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 369 | // With the instructions enabled under FPCVT, we can do everything. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 370 | if (Subtarget.hasFPCVT()) { |
| 371 | if (Subtarget.has64BitSupport()) { |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 372 | setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); |
| 373 | setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); |
| 374 | setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom); |
| 375 | setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); |
| 376 | } |
| 377 | |
| 378 | setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); |
| 379 | setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); |
| 380 | setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom); |
| 381 | setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); |
| 382 | } |
| 383 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 384 | if (Subtarget.use64BitRegs()) { |
Chris Lattner | b193576 | 2007-10-19 04:08:28 +0000 | [diff] [blame] | 385 | // 64-bit PowerPC implementations can support i64 types directly |
Craig Topper | abadc66 | 2012-04-20 06:31:50 +0000 | [diff] [blame] | 386 | addRegisterClass(MVT::i64, &PPC::G8RCRegClass); |
Nate Begeman | 0b71e00 | 2005-10-18 00:28:58 +0000 | [diff] [blame] | 387 | // BUILD_PAIR can't be handled natively, and should be expanded to shl/or |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 388 | setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); |
Dan Gohman | 8d2ead2 | 2008-03-07 20:36:53 +0000 | [diff] [blame] | 389 | // 64-bit PowerPC wants to expand i128 shifts itself. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 390 | setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); |
| 391 | setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); |
| 392 | setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); |
Nate Begeman | 0b71e00 | 2005-10-18 00:28:58 +0000 | [diff] [blame] | 393 | } else { |
Chris Lattner | b193576 | 2007-10-19 04:08:28 +0000 | [diff] [blame] | 394 | // 32-bit PowerPC wants to expand i64 shifts itself. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 395 | setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); |
| 396 | setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); |
| 397 | setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); |
Nate Begeman | 6095214 | 2005-09-06 22:03:27 +0000 | [diff] [blame] | 398 | } |
Evan Cheng | 1926427 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 399 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 400 | if (Subtarget.hasAltivec()) { |
Chris Lattner | baa73e0 | 2006-03-31 19:52:36 +0000 | [diff] [blame] | 401 | // First set operation action for all vector types to expand. Then we |
| 402 | // will selectively turn on ones that can be effectively codegen'd. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 403 | for (unsigned i = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; |
| 404 | i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) { |
| 405 | MVT::SimpleValueType VT = (MVT::SimpleValueType)i; |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 406 | |
Chris Lattner | 06a21ba | 2006-04-16 01:37:57 +0000 | [diff] [blame] | 407 | // add/sub are legal for all supported vector VT's. |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 408 | setOperationAction(ISD::ADD , VT, Legal); |
| 409 | setOperationAction(ISD::SUB , VT, Legal); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 410 | |
Chris Lattner | 95c7adc | 2006-04-04 17:25:31 +0000 | [diff] [blame] | 411 | // We promote all shuffles to v16i8. |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 412 | setOperationAction(ISD::VECTOR_SHUFFLE, VT, Promote); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 413 | AddPromotedToType (ISD::VECTOR_SHUFFLE, VT, MVT::v16i8); |
Chris Lattner | 06a21ba | 2006-04-16 01:37:57 +0000 | [diff] [blame] | 414 | |
| 415 | // We promote all non-typed operations to v4i32. |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 416 | setOperationAction(ISD::AND , VT, Promote); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 417 | AddPromotedToType (ISD::AND , VT, MVT::v4i32); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 418 | setOperationAction(ISD::OR , VT, Promote); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 419 | AddPromotedToType (ISD::OR , VT, MVT::v4i32); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 420 | setOperationAction(ISD::XOR , VT, Promote); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 421 | AddPromotedToType (ISD::XOR , VT, MVT::v4i32); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 422 | setOperationAction(ISD::LOAD , VT, Promote); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 423 | AddPromotedToType (ISD::LOAD , VT, MVT::v4i32); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 424 | setOperationAction(ISD::SELECT, VT, Promote); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 425 | AddPromotedToType (ISD::SELECT, VT, MVT::v4i32); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 426 | setOperationAction(ISD::STORE, VT, Promote); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 427 | AddPromotedToType (ISD::STORE, VT, MVT::v4i32); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 428 | |
Chris Lattner | 06a21ba | 2006-04-16 01:37:57 +0000 | [diff] [blame] | 429 | // No other operations are legal. |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 430 | setOperationAction(ISD::MUL , VT, Expand); |
| 431 | setOperationAction(ISD::SDIV, VT, Expand); |
| 432 | setOperationAction(ISD::SREM, VT, Expand); |
| 433 | setOperationAction(ISD::UDIV, VT, Expand); |
| 434 | setOperationAction(ISD::UREM, VT, Expand); |
| 435 | setOperationAction(ISD::FDIV, VT, Expand); |
Hal Finkel | e393022 | 2013-07-08 17:30:25 +0000 | [diff] [blame] | 436 | setOperationAction(ISD::FREM, VT, Expand); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 437 | setOperationAction(ISD::FNEG, VT, Expand); |
Craig Topper | c8a2adf | 2012-11-15 08:02:19 +0000 | [diff] [blame] | 438 | setOperationAction(ISD::FSQRT, VT, Expand); |
| 439 | setOperationAction(ISD::FLOG, VT, Expand); |
| 440 | setOperationAction(ISD::FLOG10, VT, Expand); |
| 441 | setOperationAction(ISD::FLOG2, VT, Expand); |
| 442 | setOperationAction(ISD::FEXP, VT, Expand); |
| 443 | setOperationAction(ISD::FEXP2, VT, Expand); |
| 444 | setOperationAction(ISD::FSIN, VT, Expand); |
| 445 | setOperationAction(ISD::FCOS, VT, Expand); |
| 446 | setOperationAction(ISD::FABS, VT, Expand); |
| 447 | setOperationAction(ISD::FPOWI, VT, Expand); |
Craig Topper | c4343f2 | 2012-11-14 08:11:25 +0000 | [diff] [blame] | 448 | setOperationAction(ISD::FFLOOR, VT, Expand); |
Craig Topper | 61d0457 | 2012-11-15 06:51:10 +0000 | [diff] [blame] | 449 | setOperationAction(ISD::FCEIL, VT, Expand); |
| 450 | setOperationAction(ISD::FTRUNC, VT, Expand); |
| 451 | setOperationAction(ISD::FRINT, VT, Expand); |
| 452 | setOperationAction(ISD::FNEARBYINT, VT, Expand); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 453 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Expand); |
| 454 | setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Expand); |
| 455 | setOperationAction(ISD::BUILD_VECTOR, VT, Expand); |
| 456 | setOperationAction(ISD::UMUL_LOHI, VT, Expand); |
| 457 | setOperationAction(ISD::SMUL_LOHI, VT, Expand); |
| 458 | setOperationAction(ISD::UDIVREM, VT, Expand); |
| 459 | setOperationAction(ISD::SDIVREM, VT, Expand); |
| 460 | setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Expand); |
| 461 | setOperationAction(ISD::FPOW, VT, Expand); |
Benjamin Kramer | f3ad235 | 2014-05-19 13:12:38 +0000 | [diff] [blame] | 462 | setOperationAction(ISD::BSWAP, VT, Expand); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 463 | setOperationAction(ISD::CTPOP, VT, Expand); |
| 464 | setOperationAction(ISD::CTLZ, VT, Expand); |
Chandler Carruth | 637cc6a | 2011-12-13 01:56:10 +0000 | [diff] [blame] | 465 | setOperationAction(ISD::CTLZ_ZERO_UNDEF, VT, Expand); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 466 | setOperationAction(ISD::CTTZ, VT, Expand); |
Chandler Carruth | 637cc6a | 2011-12-13 01:56:10 +0000 | [diff] [blame] | 467 | setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); |
Benjamin Kramer | c507146 | 2012-12-19 15:49:14 +0000 | [diff] [blame] | 468 | setOperationAction(ISD::VSELECT, VT, Expand); |
Adhemerval Zanella | c4182d1 | 2012-11-05 17:15:56 +0000 | [diff] [blame] | 469 | setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Expand); |
| 470 | |
| 471 | for (unsigned j = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; |
| 472 | j <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++j) { |
| 473 | MVT::SimpleValueType InnerVT = (MVT::SimpleValueType)j; |
| 474 | setTruncStoreAction(VT, InnerVT, Expand); |
| 475 | } |
| 476 | setLoadExtAction(ISD::SEXTLOAD, VT, Expand); |
| 477 | setLoadExtAction(ISD::ZEXTLOAD, VT, Expand); |
| 478 | setLoadExtAction(ISD::EXTLOAD, VT, Expand); |
Chris Lattner | baa73e0 | 2006-03-31 19:52:36 +0000 | [diff] [blame] | 479 | } |
| 480 | |
Chris Lattner | 95c7adc | 2006-04-04 17:25:31 +0000 | [diff] [blame] | 481 | // We can custom expand all VECTOR_SHUFFLEs to VPERM, others we can handle |
| 482 | // with merges, splats, etc. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 483 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom); |
Chris Lattner | 95c7adc | 2006-04-04 17:25:31 +0000 | [diff] [blame] | 484 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 485 | setOperationAction(ISD::AND , MVT::v4i32, Legal); |
| 486 | setOperationAction(ISD::OR , MVT::v4i32, Legal); |
| 487 | setOperationAction(ISD::XOR , MVT::v4i32, Legal); |
| 488 | setOperationAction(ISD::LOAD , MVT::v4i32, Legal); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 489 | setOperationAction(ISD::SELECT, MVT::v4i32, |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 490 | Subtarget.useCRBits() ? Legal : Expand); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 491 | setOperationAction(ISD::STORE , MVT::v4i32, Legal); |
Adhemerval Zanella | 5c6e084 | 2012-10-08 17:27:24 +0000 | [diff] [blame] | 492 | setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Legal); |
| 493 | setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); |
| 494 | setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Legal); |
| 495 | setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal); |
Adhemerval Zanella | bdface5 | 2012-11-15 20:56:03 +0000 | [diff] [blame] | 496 | setOperationAction(ISD::FFLOOR, MVT::v4f32, Legal); |
| 497 | setOperationAction(ISD::FCEIL, MVT::v4f32, Legal); |
| 498 | setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); |
| 499 | setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Legal); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 500 | |
Craig Topper | abadc66 | 2012-04-20 06:31:50 +0000 | [diff] [blame] | 501 | addRegisterClass(MVT::v4f32, &PPC::VRRCRegClass); |
| 502 | addRegisterClass(MVT::v4i32, &PPC::VRRCRegClass); |
| 503 | addRegisterClass(MVT::v8i16, &PPC::VRRCRegClass); |
| 504 | addRegisterClass(MVT::v16i8, &PPC::VRRCRegClass); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 505 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 506 | setOperationAction(ISD::MUL, MVT::v4f32, Legal); |
Hal Finkel | 0a479ae | 2012-06-22 00:49:52 +0000 | [diff] [blame] | 507 | setOperationAction(ISD::FMA, MVT::v4f32, Legal); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 508 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 509 | if (TM.Options.UnsafeFPMath || Subtarget.hasVSX()) { |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 510 | setOperationAction(ISD::FDIV, MVT::v4f32, Legal); |
| 511 | setOperationAction(ISD::FSQRT, MVT::v4f32, Legal); |
| 512 | } |
| 513 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 514 | setOperationAction(ISD::MUL, MVT::v4i32, Custom); |
| 515 | setOperationAction(ISD::MUL, MVT::v8i16, Custom); |
| 516 | setOperationAction(ISD::MUL, MVT::v16i8, Custom); |
Chris Lattner | a8713b1 | 2006-03-20 01:53:53 +0000 | [diff] [blame] | 517 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 518 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom); |
| 519 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Custom); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 520 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 521 | setOperationAction(ISD::BUILD_VECTOR, MVT::v16i8, Custom); |
| 522 | setOperationAction(ISD::BUILD_VECTOR, MVT::v8i16, Custom); |
| 523 | setOperationAction(ISD::BUILD_VECTOR, MVT::v4i32, Custom); |
| 524 | setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom); |
Adhemerval Zanella | 56775e0 | 2012-10-30 13:50:19 +0000 | [diff] [blame] | 525 | |
| 526 | // Altivec does not contain unordered floating-point compare instructions |
| 527 | setCondCodeAction(ISD::SETUO, MVT::v4f32, Expand); |
| 528 | setCondCodeAction(ISD::SETUEQ, MVT::v4f32, Expand); |
| 529 | setCondCodeAction(ISD::SETUGT, MVT::v4f32, Expand); |
| 530 | setCondCodeAction(ISD::SETUGE, MVT::v4f32, Expand); |
| 531 | setCondCodeAction(ISD::SETULT, MVT::v4f32, Expand); |
| 532 | setCondCodeAction(ISD::SETULE, MVT::v4f32, Expand); |
Hal Finkel | 21ada79 | 2013-07-08 20:00:03 +0000 | [diff] [blame] | 533 | |
| 534 | setCondCodeAction(ISD::SETO, MVT::v4f32, Expand); |
| 535 | setCondCodeAction(ISD::SETONE, MVT::v4f32, Expand); |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 536 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 537 | if (Subtarget.hasVSX()) { |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 538 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2f64, Legal); |
Hal Finkel | 82569b6 | 2014-03-27 22:22:48 +0000 | [diff] [blame] | 539 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f64, Legal); |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 540 | |
| 541 | setOperationAction(ISD::FFLOOR, MVT::v2f64, Legal); |
| 542 | setOperationAction(ISD::FCEIL, MVT::v2f64, Legal); |
| 543 | setOperationAction(ISD::FTRUNC, MVT::v2f64, Legal); |
| 544 | setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Legal); |
| 545 | setOperationAction(ISD::FROUND, MVT::v2f64, Legal); |
| 546 | |
| 547 | setOperationAction(ISD::FROUND, MVT::v4f32, Legal); |
| 548 | |
| 549 | setOperationAction(ISD::MUL, MVT::v2f64, Legal); |
| 550 | setOperationAction(ISD::FMA, MVT::v2f64, Legal); |
| 551 | |
| 552 | setOperationAction(ISD::FDIV, MVT::v2f64, Legal); |
| 553 | setOperationAction(ISD::FSQRT, MVT::v2f64, Legal); |
| 554 | |
Hal Finkel | 732f0f7 | 2014-03-26 12:49:28 +0000 | [diff] [blame] | 555 | setOperationAction(ISD::VSELECT, MVT::v16i8, Legal); |
| 556 | setOperationAction(ISD::VSELECT, MVT::v8i16, Legal); |
| 557 | setOperationAction(ISD::VSELECT, MVT::v4i32, Legal); |
| 558 | setOperationAction(ISD::VSELECT, MVT::v4f32, Legal); |
| 559 | setOperationAction(ISD::VSELECT, MVT::v2f64, Legal); |
| 560 | |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 561 | // Share the Altivec comparison restrictions. |
| 562 | setCondCodeAction(ISD::SETUO, MVT::v2f64, Expand); |
| 563 | setCondCodeAction(ISD::SETUEQ, MVT::v2f64, Expand); |
| 564 | setCondCodeAction(ISD::SETUGT, MVT::v2f64, Expand); |
| 565 | setCondCodeAction(ISD::SETUGE, MVT::v2f64, Expand); |
| 566 | setCondCodeAction(ISD::SETULT, MVT::v2f64, Expand); |
| 567 | setCondCodeAction(ISD::SETULE, MVT::v2f64, Expand); |
| 568 | |
| 569 | setCondCodeAction(ISD::SETO, MVT::v2f64, Expand); |
| 570 | setCondCodeAction(ISD::SETONE, MVT::v2f64, Expand); |
| 571 | |
Hal Finkel | 9281c9a | 2014-03-26 18:26:30 +0000 | [diff] [blame] | 572 | setOperationAction(ISD::LOAD, MVT::v2f64, Legal); |
| 573 | setOperationAction(ISD::STORE, MVT::v2f64, Legal); |
| 574 | |
Hal Finkel | df3e34d | 2014-03-26 22:58:37 +0000 | [diff] [blame] | 575 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Legal); |
| 576 | |
Hal Finkel | 19be506 | 2014-03-29 05:29:01 +0000 | [diff] [blame] | 577 | addRegisterClass(MVT::f64, &PPC::VSFRCRegClass); |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 578 | |
| 579 | addRegisterClass(MVT::v4f32, &PPC::VSRCRegClass); |
| 580 | addRegisterClass(MVT::v2f64, &PPC::VSRCRegClass); |
Hal Finkel | a6c8b51 | 2014-03-26 16:12:58 +0000 | [diff] [blame] | 581 | |
| 582 | // VSX v2i64 only supports non-arithmetic operations. |
| 583 | setOperationAction(ISD::ADD, MVT::v2i64, Expand); |
| 584 | setOperationAction(ISD::SUB, MVT::v2i64, Expand); |
| 585 | |
Hal Finkel | ad801b7 | 2014-03-27 21:26:33 +0000 | [diff] [blame] | 586 | setOperationAction(ISD::SHL, MVT::v2i64, Expand); |
| 587 | setOperationAction(ISD::SRA, MVT::v2i64, Expand); |
| 588 | setOperationAction(ISD::SRL, MVT::v2i64, Expand); |
| 589 | |
Hal Finkel | 777c9dd | 2014-03-29 16:04:40 +0000 | [diff] [blame] | 590 | setOperationAction(ISD::SETCC, MVT::v2i64, Custom); |
| 591 | |
Hal Finkel | 9281c9a | 2014-03-26 18:26:30 +0000 | [diff] [blame] | 592 | setOperationAction(ISD::LOAD, MVT::v2i64, Promote); |
| 593 | AddPromotedToType (ISD::LOAD, MVT::v2i64, MVT::v2f64); |
| 594 | setOperationAction(ISD::STORE, MVT::v2i64, Promote); |
| 595 | AddPromotedToType (ISD::STORE, MVT::v2i64, MVT::v2f64); |
| 596 | |
Hal Finkel | df3e34d | 2014-03-26 22:58:37 +0000 | [diff] [blame] | 597 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Legal); |
| 598 | |
Hal Finkel | 7279f4b | 2014-03-26 19:13:54 +0000 | [diff] [blame] | 599 | setOperationAction(ISD::SINT_TO_FP, MVT::v2i64, Legal); |
| 600 | setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal); |
| 601 | setOperationAction(ISD::FP_TO_SINT, MVT::v2i64, Legal); |
| 602 | setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal); |
| 603 | |
Hal Finkel | 5c0d145 | 2014-03-30 13:22:59 +0000 | [diff] [blame] | 604 | // Vector operation legalization checks the result type of |
| 605 | // SIGN_EXTEND_INREG, overall legalization checks the inner type. |
| 606 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i64, Legal); |
| 607 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i32, Legal); |
| 608 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i16, Custom); |
| 609 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i8, Custom); |
| 610 | |
Hal Finkel | a6c8b51 | 2014-03-26 16:12:58 +0000 | [diff] [blame] | 611 | addRegisterClass(MVT::v2i64, &PPC::VSRCRegClass); |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 612 | } |
Nate Begeman | 3e7db9c | 2005-11-29 08:17:20 +0000 | [diff] [blame] | 613 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 614 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 615 | if (Subtarget.has64BitSupport()) { |
Hal Finkel | 322e41a | 2012-04-01 20:08:17 +0000 | [diff] [blame] | 616 | setOperationAction(ISD::PREFETCH, MVT::Other, Legal); |
Hal Finkel | 70381a7 | 2012-08-04 14:10:46 +0000 | [diff] [blame] | 617 | setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Legal); |
| 618 | } |
Hal Finkel | 322e41a | 2012-04-01 20:08:17 +0000 | [diff] [blame] | 619 | |
Eli Friedman | 7dfa791 | 2011-08-29 18:23:02 +0000 | [diff] [blame] | 620 | setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); |
| 621 | setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Expand); |
Hal Finkel | 1b5ff08 | 2012-12-25 17:22:53 +0000 | [diff] [blame] | 622 | setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand); |
| 623 | setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Expand); |
Eli Friedman | 7dfa791 | 2011-08-29 18:23:02 +0000 | [diff] [blame] | 624 | |
Duncan Sands | 8d6e2e1 | 2008-11-23 15:47:28 +0000 | [diff] [blame] | 625 | setBooleanContents(ZeroOrOneBooleanContent); |
Bill Schmidt | a76bf5a | 2013-04-23 18:49:44 +0000 | [diff] [blame] | 626 | // Altivec instructions set fields to all zeros or all ones. |
| 627 | setBooleanVectorContents(ZeroOrNegativeOneBooleanContent); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 628 | |
Evan Cheng | 39e9002 | 2012-07-02 22:39:56 +0000 | [diff] [blame] | 629 | if (isPPC64) { |
Chris Lattner | 454436d | 2006-10-18 01:20:43 +0000 | [diff] [blame] | 630 | setStackPointerRegisterToSaveRestore(PPC::X1); |
Jim Laskey | e0008e2 | 2007-02-22 14:56:36 +0000 | [diff] [blame] | 631 | setExceptionPointerRegister(PPC::X3); |
| 632 | setExceptionSelectorRegister(PPC::X4); |
| 633 | } else { |
Chris Lattner | 454436d | 2006-10-18 01:20:43 +0000 | [diff] [blame] | 634 | setStackPointerRegisterToSaveRestore(PPC::R1); |
Jim Laskey | e0008e2 | 2007-02-22 14:56:36 +0000 | [diff] [blame] | 635 | setExceptionPointerRegister(PPC::R3); |
| 636 | setExceptionSelectorRegister(PPC::R4); |
| 637 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 638 | |
Chris Lattner | f418435 | 2006-03-01 04:57:39 +0000 | [diff] [blame] | 639 | // We have target-specific dag combine patterns for the following nodes: |
| 640 | setTargetDAGCombine(ISD::SINT_TO_FP); |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 641 | setTargetDAGCombine(ISD::LOAD); |
Chris Lattner | 27f5345 | 2006-03-01 05:50:56 +0000 | [diff] [blame] | 642 | setTargetDAGCombine(ISD::STORE); |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 643 | setTargetDAGCombine(ISD::BR_CC); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 644 | if (Subtarget.useCRBits()) |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 645 | setTargetDAGCombine(ISD::BRCOND); |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 646 | setTargetDAGCombine(ISD::BSWAP); |
Hal Finkel | bc2ee4c | 2013-05-25 04:05:05 +0000 | [diff] [blame] | 647 | setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 648 | |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 649 | setTargetDAGCombine(ISD::SIGN_EXTEND); |
| 650 | setTargetDAGCombine(ISD::ZERO_EXTEND); |
| 651 | setTargetDAGCombine(ISD::ANY_EXTEND); |
| 652 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 653 | if (Subtarget.useCRBits()) { |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 654 | setTargetDAGCombine(ISD::TRUNCATE); |
| 655 | setTargetDAGCombine(ISD::SETCC); |
| 656 | setTargetDAGCombine(ISD::SELECT_CC); |
| 657 | } |
| 658 | |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 659 | // Use reciprocal estimates. |
| 660 | if (TM.Options.UnsafeFPMath) { |
| 661 | setTargetDAGCombine(ISD::FDIV); |
| 662 | setTargetDAGCombine(ISD::FSQRT); |
| 663 | } |
| 664 | |
Dale Johannesen | 10432e5 | 2007-10-19 00:59:18 +0000 | [diff] [blame] | 665 | // Darwin long double math library functions have $LDBL128 appended. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 666 | if (Subtarget.isDarwin()) { |
Duncan Sands | 53c954f | 2008-01-10 10:28:30 +0000 | [diff] [blame] | 667 | setLibcallName(RTLIB::COS_PPCF128, "cosl$LDBL128"); |
Dale Johannesen | 10432e5 | 2007-10-19 00:59:18 +0000 | [diff] [blame] | 668 | setLibcallName(RTLIB::POW_PPCF128, "powl$LDBL128"); |
| 669 | setLibcallName(RTLIB::REM_PPCF128, "fmodl$LDBL128"); |
Duncan Sands | 53c954f | 2008-01-10 10:28:30 +0000 | [diff] [blame] | 670 | setLibcallName(RTLIB::SIN_PPCF128, "sinl$LDBL128"); |
| 671 | setLibcallName(RTLIB::SQRT_PPCF128, "sqrtl$LDBL128"); |
Dale Johannesen | da2d806 | 2008-09-04 00:47:13 +0000 | [diff] [blame] | 672 | setLibcallName(RTLIB::LOG_PPCF128, "logl$LDBL128"); |
| 673 | setLibcallName(RTLIB::LOG2_PPCF128, "log2l$LDBL128"); |
| 674 | setLibcallName(RTLIB::LOG10_PPCF128, "log10l$LDBL128"); |
| 675 | setLibcallName(RTLIB::EXP_PPCF128, "expl$LDBL128"); |
| 676 | setLibcallName(RTLIB::EXP2_PPCF128, "exp2l$LDBL128"); |
Dale Johannesen | 10432e5 | 2007-10-19 00:59:18 +0000 | [diff] [blame] | 677 | } |
| 678 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 679 | // With 32 condition bits, we don't need to sink (and duplicate) compares |
| 680 | // aggressively in CodeGenPrep. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 681 | if (Subtarget.useCRBits()) |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 682 | setHasMultipleConditionRegisters(); |
| 683 | |
Hal Finkel | 6529857 | 2011-10-17 18:53:03 +0000 | [diff] [blame] | 684 | setMinFunctionAlignment(2); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 685 | if (Subtarget.isDarwin()) |
Hal Finkel | 6529857 | 2011-10-17 18:53:03 +0000 | [diff] [blame] | 686 | setPrefFunctionAlignment(4); |
Eli Friedman | 2518f83 | 2011-05-06 20:34:06 +0000 | [diff] [blame] | 687 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 688 | if (isPPC64 && Subtarget.isJITCodeModel()) |
Evan Cheng | 39e9002 | 2012-07-02 22:39:56 +0000 | [diff] [blame] | 689 | // Temporary workaround for the inability of PPC64 JIT to handle jump |
| 690 | // tables. |
| 691 | setSupportJumpTables(false); |
| 692 | |
Eli Friedman | 30a49e9 | 2011-08-03 21:06:02 +0000 | [diff] [blame] | 693 | setInsertFencesForAtomic(true); |
| 694 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 695 | if (Subtarget.enableMachineScheduler()) |
Hal Finkel | 21442b2 | 2013-09-11 23:05:25 +0000 | [diff] [blame] | 696 | setSchedulingPreference(Sched::Source); |
| 697 | else |
| 698 | setSchedulingPreference(Sched::Hybrid); |
Hal Finkel | 6f0ae78 | 2011-11-22 16:21:04 +0000 | [diff] [blame] | 699 | |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 700 | computeRegisterProperties(); |
Hal Finkel | 742b535 | 2012-08-28 16:12:39 +0000 | [diff] [blame] | 701 | |
| 702 | // The Freescale cores does better with aggressive inlining of memcpy and |
| 703 | // friends. Gcc uses same threshold of 128 bytes (= 32 word stores). |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 704 | if (Subtarget.getDarwinDirective() == PPC::DIR_E500mc || |
| 705 | Subtarget.getDarwinDirective() == PPC::DIR_E5500) { |
Jim Grosbach | 341ad3e | 2013-02-20 21:13:59 +0000 | [diff] [blame] | 706 | MaxStoresPerMemset = 32; |
| 707 | MaxStoresPerMemsetOptSize = 16; |
| 708 | MaxStoresPerMemcpy = 32; |
| 709 | MaxStoresPerMemcpyOptSize = 8; |
| 710 | MaxStoresPerMemmove = 32; |
| 711 | MaxStoresPerMemmoveOptSize = 8; |
Hal Finkel | 742b535 | 2012-08-28 16:12:39 +0000 | [diff] [blame] | 712 | |
| 713 | setPrefFunctionAlignment(4); |
Hal Finkel | 742b535 | 2012-08-28 16:12:39 +0000 | [diff] [blame] | 714 | } |
Chris Lattner | f22556d | 2005-08-16 17:14:42 +0000 | [diff] [blame] | 715 | } |
| 716 | |
Hal Finkel | 262a224 | 2013-09-12 23:20:06 +0000 | [diff] [blame] | 717 | /// getMaxByValAlign - Helper for getByValTypeAlignment to determine |
| 718 | /// the desired ByVal argument alignment. |
| 719 | static void getMaxByValAlign(Type *Ty, unsigned &MaxAlign, |
| 720 | unsigned MaxMaxAlign) { |
| 721 | if (MaxAlign == MaxMaxAlign) |
| 722 | return; |
| 723 | if (VectorType *VTy = dyn_cast<VectorType>(Ty)) { |
| 724 | if (MaxMaxAlign >= 32 && VTy->getBitWidth() >= 256) |
| 725 | MaxAlign = 32; |
| 726 | else if (VTy->getBitWidth() >= 128 && MaxAlign < 16) |
| 727 | MaxAlign = 16; |
| 728 | } else if (ArrayType *ATy = dyn_cast<ArrayType>(Ty)) { |
| 729 | unsigned EltAlign = 0; |
| 730 | getMaxByValAlign(ATy->getElementType(), EltAlign, MaxMaxAlign); |
| 731 | if (EltAlign > MaxAlign) |
| 732 | MaxAlign = EltAlign; |
| 733 | } else if (StructType *STy = dyn_cast<StructType>(Ty)) { |
| 734 | for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { |
| 735 | unsigned EltAlign = 0; |
| 736 | getMaxByValAlign(STy->getElementType(i), EltAlign, MaxMaxAlign); |
| 737 | if (EltAlign > MaxAlign) |
| 738 | MaxAlign = EltAlign; |
| 739 | if (MaxAlign == MaxMaxAlign) |
| 740 | break; |
| 741 | } |
| 742 | } |
| 743 | } |
| 744 | |
Dale Johannesen | cbde4c2 | 2008-02-28 22:31:51 +0000 | [diff] [blame] | 745 | /// getByValTypeAlignment - Return the desired alignment for ByVal aggregate |
| 746 | /// function arguments in the caller parameter area. |
Chris Lattner | 229907c | 2011-07-18 04:54:35 +0000 | [diff] [blame] | 747 | unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty) const { |
Dale Johannesen | cbde4c2 | 2008-02-28 22:31:51 +0000 | [diff] [blame] | 748 | // Darwin passes everything on 4 byte boundary. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 749 | if (Subtarget.isDarwin()) |
Dale Johannesen | cbde4c2 | 2008-02-28 22:31:51 +0000 | [diff] [blame] | 750 | return 4; |
Roman Divacky | b9663cc | 2012-04-02 15:49:30 +0000 | [diff] [blame] | 751 | |
| 752 | // 16byte and wider vectors are passed on 16byte boundary. |
Roman Divacky | b9663cc | 2012-04-02 15:49:30 +0000 | [diff] [blame] | 753 | // The rest is 8 on PPC64 and 4 on PPC32 boundary. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 754 | unsigned Align = Subtarget.isPPC64() ? 8 : 4; |
| 755 | if (Subtarget.hasAltivec() || Subtarget.hasQPX()) |
| 756 | getMaxByValAlign(Ty, Align, Subtarget.hasQPX() ? 32 : 16); |
Hal Finkel | 262a224 | 2013-09-12 23:20:06 +0000 | [diff] [blame] | 757 | return Align; |
Dale Johannesen | cbde4c2 | 2008-02-28 22:31:51 +0000 | [diff] [blame] | 758 | } |
| 759 | |
Chris Lattner | 347ed8a | 2006-01-09 23:52:17 +0000 | [diff] [blame] | 760 | const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const { |
| 761 | switch (Opcode) { |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 762 | default: return nullptr; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 763 | case PPCISD::FSEL: return "PPCISD::FSEL"; |
| 764 | case PPCISD::FCFID: return "PPCISD::FCFID"; |
| 765 | case PPCISD::FCTIDZ: return "PPCISD::FCTIDZ"; |
| 766 | case PPCISD::FCTIWZ: return "PPCISD::FCTIWZ"; |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 767 | case PPCISD::FRE: return "PPCISD::FRE"; |
| 768 | case PPCISD::FRSQRTE: return "PPCISD::FRSQRTE"; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 769 | case PPCISD::STFIWX: return "PPCISD::STFIWX"; |
| 770 | case PPCISD::VMADDFP: return "PPCISD::VMADDFP"; |
| 771 | case PPCISD::VNMSUBFP: return "PPCISD::VNMSUBFP"; |
| 772 | case PPCISD::VPERM: return "PPCISD::VPERM"; |
| 773 | case PPCISD::Hi: return "PPCISD::Hi"; |
| 774 | case PPCISD::Lo: return "PPCISD::Lo"; |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 775 | case PPCISD::TOC_ENTRY: return "PPCISD::TOC_ENTRY"; |
Tilmann Scheller | 79fef93 | 2009-12-18 13:00:15 +0000 | [diff] [blame] | 776 | case PPCISD::LOAD: return "PPCISD::LOAD"; |
| 777 | case PPCISD::LOAD_TOC: return "PPCISD::LOAD_TOC"; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 778 | case PPCISD::DYNALLOC: return "PPCISD::DYNALLOC"; |
| 779 | case PPCISD::GlobalBaseReg: return "PPCISD::GlobalBaseReg"; |
| 780 | case PPCISD::SRL: return "PPCISD::SRL"; |
| 781 | case PPCISD::SRA: return "PPCISD::SRA"; |
| 782 | case PPCISD::SHL: return "PPCISD::SHL"; |
Ulrich Weigand | f62e83f | 2013-03-22 15:24:13 +0000 | [diff] [blame] | 783 | case PPCISD::CALL: return "PPCISD::CALL"; |
| 784 | case PPCISD::CALL_NOP: return "PPCISD::CALL_NOP"; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 785 | case PPCISD::MTCTR: return "PPCISD::MTCTR"; |
Ulrich Weigand | f62e83f | 2013-03-22 15:24:13 +0000 | [diff] [blame] | 786 | case PPCISD::BCTRL: return "PPCISD::BCTRL"; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 787 | case PPCISD::RET_FLAG: return "PPCISD::RET_FLAG"; |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 788 | case PPCISD::EH_SJLJ_SETJMP: return "PPCISD::EH_SJLJ_SETJMP"; |
| 789 | case PPCISD::EH_SJLJ_LONGJMP: return "PPCISD::EH_SJLJ_LONGJMP"; |
Ulrich Weigand | d5ebc62 | 2013-07-03 17:05:42 +0000 | [diff] [blame] | 790 | case PPCISD::MFOCRF: return "PPCISD::MFOCRF"; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 791 | case PPCISD::VCMP: return "PPCISD::VCMP"; |
| 792 | case PPCISD::VCMPo: return "PPCISD::VCMPo"; |
| 793 | case PPCISD::LBRX: return "PPCISD::LBRX"; |
| 794 | case PPCISD::STBRX: return "PPCISD::STBRX"; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 795 | case PPCISD::LARX: return "PPCISD::LARX"; |
| 796 | case PPCISD::STCX: return "PPCISD::STCX"; |
| 797 | case PPCISD::COND_BRANCH: return "PPCISD::COND_BRANCH"; |
Hal Finkel | 25c1992 | 2013-05-15 21:37:41 +0000 | [diff] [blame] | 798 | case PPCISD::BDNZ: return "PPCISD::BDNZ"; |
| 799 | case PPCISD::BDZ: return "PPCISD::BDZ"; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 800 | case PPCISD::MFFS: return "PPCISD::MFFS"; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 801 | case PPCISD::FADDRTZ: return "PPCISD::FADDRTZ"; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 802 | case PPCISD::TC_RETURN: return "PPCISD::TC_RETURN"; |
Hal Finkel | 5ab3780 | 2012-08-28 02:10:27 +0000 | [diff] [blame] | 803 | case PPCISD::CR6SET: return "PPCISD::CR6SET"; |
| 804 | case PPCISD::CR6UNSET: return "PPCISD::CR6UNSET"; |
Bill Schmidt | 34627e3 | 2012-11-27 17:35:46 +0000 | [diff] [blame] | 805 | case PPCISD::ADDIS_TOC_HA: return "PPCISD::ADDIS_TOC_HA"; |
| 806 | case PPCISD::LD_TOC_L: return "PPCISD::LD_TOC_L"; |
| 807 | case PPCISD::ADDI_TOC_L: return "PPCISD::ADDI_TOC_L"; |
Roman Divacky | 32143e2 | 2013-12-20 18:08:54 +0000 | [diff] [blame] | 808 | case PPCISD::PPC32_GOT: return "PPCISD::PPC32_GOT"; |
Bill Schmidt | 9f0b4ec | 2012-12-14 17:02:38 +0000 | [diff] [blame] | 809 | case PPCISD::ADDIS_GOT_TPREL_HA: return "PPCISD::ADDIS_GOT_TPREL_HA"; |
| 810 | case PPCISD::LD_GOT_TPREL_L: return "PPCISD::LD_GOT_TPREL_L"; |
Bill Schmidt | ca4a0c9 | 2012-12-04 16:18:08 +0000 | [diff] [blame] | 811 | case PPCISD::ADD_TLS: return "PPCISD::ADD_TLS"; |
Bill Schmidt | c56f1d3 | 2012-12-11 20:30:11 +0000 | [diff] [blame] | 812 | case PPCISD::ADDIS_TLSGD_HA: return "PPCISD::ADDIS_TLSGD_HA"; |
| 813 | case PPCISD::ADDI_TLSGD_L: return "PPCISD::ADDI_TLSGD_L"; |
| 814 | case PPCISD::GET_TLS_ADDR: return "PPCISD::GET_TLS_ADDR"; |
Bill Schmidt | 24b8dd6 | 2012-12-12 19:29:35 +0000 | [diff] [blame] | 815 | case PPCISD::ADDIS_TLSLD_HA: return "PPCISD::ADDIS_TLSLD_HA"; |
| 816 | case PPCISD::ADDI_TLSLD_L: return "PPCISD::ADDI_TLSLD_L"; |
| 817 | case PPCISD::GET_TLSLD_ADDR: return "PPCISD::GET_TLSLD_ADDR"; |
| 818 | case PPCISD::ADDIS_DTPREL_HA: return "PPCISD::ADDIS_DTPREL_HA"; |
| 819 | case PPCISD::ADDI_DTPREL_L: return "PPCISD::ADDI_DTPREL_L"; |
Bill Schmidt | 51e7951 | 2013-02-20 15:50:31 +0000 | [diff] [blame] | 820 | case PPCISD::VADD_SPLAT: return "PPCISD::VADD_SPLAT"; |
Bill Schmidt | a87a7e2 | 2013-05-14 19:35:45 +0000 | [diff] [blame] | 821 | case PPCISD::SC: return "PPCISD::SC"; |
Chris Lattner | 347ed8a | 2006-01-09 23:52:17 +0000 | [diff] [blame] | 822 | } |
| 823 | } |
| 824 | |
Matt Arsenault | 75865923 | 2013-05-18 00:21:46 +0000 | [diff] [blame] | 825 | EVT PPCTargetLowering::getSetCCResultType(LLVMContext &, EVT VT) const { |
Adhemerval Zanella | fe3f793 | 2012-10-08 18:59:53 +0000 | [diff] [blame] | 826 | if (!VT.isVector()) |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 827 | return Subtarget.useCRBits() ? MVT::i1 : MVT::i32; |
Adhemerval Zanella | fe3f793 | 2012-10-08 18:59:53 +0000 | [diff] [blame] | 828 | return VT.changeVectorElementTypeToInteger(); |
Scott Michel | a6729e8 | 2008-03-10 15:42:14 +0000 | [diff] [blame] | 829 | } |
| 830 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 831 | //===----------------------------------------------------------------------===// |
| 832 | // Node matching predicates, for use by the tblgen matching code. |
| 833 | //===----------------------------------------------------------------------===// |
| 834 | |
Chris Lattner | 7f1fa8e | 2005-08-26 17:36:52 +0000 | [diff] [blame] | 835 | /// isFloatingPointZero - Return true if this is 0.0 or -0.0. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 836 | static bool isFloatingPointZero(SDValue Op) { |
Chris Lattner | 7f1fa8e | 2005-08-26 17:36:52 +0000 | [diff] [blame] | 837 | if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Op)) |
Dale Johannesen | 3cf889f | 2007-08-31 04:03:46 +0000 | [diff] [blame] | 838 | return CFP->getValueAPF().isZero(); |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 839 | else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) { |
Chris Lattner | 7f1fa8e | 2005-08-26 17:36:52 +0000 | [diff] [blame] | 840 | // Maybe this has already been legalized into the constant pool? |
| 841 | if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op.getOperand(1))) |
Dan Gohman | bcaf681 | 2010-04-15 01:51:59 +0000 | [diff] [blame] | 842 | if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CP->getConstVal())) |
Dale Johannesen | 3cf889f | 2007-08-31 04:03:46 +0000 | [diff] [blame] | 843 | return CFP->getValueAPF().isZero(); |
Chris Lattner | 7f1fa8e | 2005-08-26 17:36:52 +0000 | [diff] [blame] | 844 | } |
| 845 | return false; |
| 846 | } |
| 847 | |
Chris Lattner | e8b83b4 | 2006-04-06 17:23:16 +0000 | [diff] [blame] | 848 | /// isConstantOrUndef - Op is either an undef node or a ConstantSDNode. Return |
| 849 | /// true if Op is undef or if it matches the specified value. |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 850 | static bool isConstantOrUndef(int Op, int Val) { |
| 851 | return Op < 0 || Op == Val; |
Chris Lattner | e8b83b4 | 2006-04-06 17:23:16 +0000 | [diff] [blame] | 852 | } |
| 853 | |
| 854 | /// isVPKUHUMShuffleMask - Return true if this is the shuffle mask for a |
| 855 | /// VPKUHUM instruction. |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 856 | bool PPC::isVPKUHUMShuffleMask(ShuffleVectorSDNode *N, bool isUnary, |
| 857 | SelectionDAG &DAG) { |
| 858 | unsigned j = DAG.getTarget().getDataLayout()->isLittleEndian() ? 0 : 1; |
Chris Lattner | a4bbfae | 2006-04-06 22:28:36 +0000 | [diff] [blame] | 859 | if (!isUnary) { |
| 860 | for (unsigned i = 0; i != 16; ++i) |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 861 | if (!isConstantOrUndef(N->getMaskElt(i), i*2+j)) |
Chris Lattner | a4bbfae | 2006-04-06 22:28:36 +0000 | [diff] [blame] | 862 | return false; |
| 863 | } else { |
| 864 | for (unsigned i = 0; i != 8; ++i) |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 865 | if (!isConstantOrUndef(N->getMaskElt(i), i*2+j) || |
| 866 | !isConstantOrUndef(N->getMaskElt(i+8), i*2+j)) |
Chris Lattner | a4bbfae | 2006-04-06 22:28:36 +0000 | [diff] [blame] | 867 | return false; |
| 868 | } |
Chris Lattner | 1d33819 | 2006-04-06 18:26:28 +0000 | [diff] [blame] | 869 | return true; |
Chris Lattner | e8b83b4 | 2006-04-06 17:23:16 +0000 | [diff] [blame] | 870 | } |
| 871 | |
| 872 | /// isVPKUWUMShuffleMask - Return true if this is the shuffle mask for a |
| 873 | /// VPKUWUM instruction. |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 874 | bool PPC::isVPKUWUMShuffleMask(ShuffleVectorSDNode *N, bool isUnary, |
| 875 | SelectionDAG &DAG) { |
| 876 | unsigned j, k; |
| 877 | if (DAG.getTarget().getDataLayout()->isLittleEndian()) { |
| 878 | j = 0; |
| 879 | k = 1; |
| 880 | } else { |
| 881 | j = 2; |
| 882 | k = 3; |
| 883 | } |
Chris Lattner | a4bbfae | 2006-04-06 22:28:36 +0000 | [diff] [blame] | 884 | if (!isUnary) { |
| 885 | for (unsigned i = 0; i != 16; i += 2) |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 886 | if (!isConstantOrUndef(N->getMaskElt(i ), i*2+j) || |
| 887 | !isConstantOrUndef(N->getMaskElt(i+1), i*2+k)) |
Chris Lattner | a4bbfae | 2006-04-06 22:28:36 +0000 | [diff] [blame] | 888 | return false; |
| 889 | } else { |
| 890 | for (unsigned i = 0; i != 8; i += 2) |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 891 | if (!isConstantOrUndef(N->getMaskElt(i ), i*2+j) || |
| 892 | !isConstantOrUndef(N->getMaskElt(i+1), i*2+k) || |
| 893 | !isConstantOrUndef(N->getMaskElt(i+8), i*2+j) || |
| 894 | !isConstantOrUndef(N->getMaskElt(i+9), i*2+k)) |
Chris Lattner | a4bbfae | 2006-04-06 22:28:36 +0000 | [diff] [blame] | 895 | return false; |
| 896 | } |
Chris Lattner | 1d33819 | 2006-04-06 18:26:28 +0000 | [diff] [blame] | 897 | return true; |
Chris Lattner | e8b83b4 | 2006-04-06 17:23:16 +0000 | [diff] [blame] | 898 | } |
| 899 | |
Chris Lattner | f38e033 | 2006-04-06 22:02:42 +0000 | [diff] [blame] | 900 | /// isVMerge - Common function, used to match vmrg* shuffles. |
| 901 | /// |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 902 | static bool isVMerge(ShuffleVectorSDNode *N, unsigned UnitSize, |
Chris Lattner | f38e033 | 2006-04-06 22:02:42 +0000 | [diff] [blame] | 903 | unsigned LHSStart, unsigned RHSStart) { |
Hal Finkel | df3e34d | 2014-03-26 22:58:37 +0000 | [diff] [blame] | 904 | if (N->getValueType(0) != MVT::v16i8) |
| 905 | return false; |
Chris Lattner | d1dcb52 | 2006-04-06 21:11:54 +0000 | [diff] [blame] | 906 | assert((UnitSize == 1 || UnitSize == 2 || UnitSize == 4) && |
| 907 | "Unsupported merge size!"); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 908 | |
Chris Lattner | d1dcb52 | 2006-04-06 21:11:54 +0000 | [diff] [blame] | 909 | for (unsigned i = 0; i != 8/UnitSize; ++i) // Step over units |
| 910 | for (unsigned j = 0; j != UnitSize; ++j) { // Step over bytes within unit |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 911 | if (!isConstantOrUndef(N->getMaskElt(i*UnitSize*2+j), |
Chris Lattner | f38e033 | 2006-04-06 22:02:42 +0000 | [diff] [blame] | 912 | LHSStart+j+i*UnitSize) || |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 913 | !isConstantOrUndef(N->getMaskElt(i*UnitSize*2+UnitSize+j), |
Chris Lattner | f38e033 | 2006-04-06 22:02:42 +0000 | [diff] [blame] | 914 | RHSStart+j+i*UnitSize)) |
Chris Lattner | d1dcb52 | 2006-04-06 21:11:54 +0000 | [diff] [blame] | 915 | return false; |
| 916 | } |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 917 | return true; |
Chris Lattner | f38e033 | 2006-04-06 22:02:42 +0000 | [diff] [blame] | 918 | } |
| 919 | |
| 920 | /// isVMRGLShuffleMask - Return true if this is a shuffle mask suitable for |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 921 | /// a VMRGL* instruction with the specified unit size (1,2 or 4 bytes). |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 922 | bool PPC::isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 923 | bool isUnary, SelectionDAG &DAG) { |
| 924 | if (DAG.getTarget().getDataLayout()->isLittleEndian()) { |
| 925 | if (!isUnary) |
| 926 | return isVMerge(N, UnitSize, 0, 16); |
| 927 | return isVMerge(N, UnitSize, 0, 0); |
| 928 | } else { |
| 929 | if (!isUnary) |
| 930 | return isVMerge(N, UnitSize, 8, 24); |
| 931 | return isVMerge(N, UnitSize, 8, 8); |
| 932 | } |
Chris Lattner | d1dcb52 | 2006-04-06 21:11:54 +0000 | [diff] [blame] | 933 | } |
| 934 | |
| 935 | /// isVMRGHShuffleMask - Return true if this is a shuffle mask suitable for |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 936 | /// a VMRGH* instruction with the specified unit size (1,2 or 4 bytes). |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 937 | bool PPC::isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 938 | bool isUnary, SelectionDAG &DAG) { |
| 939 | if (DAG.getTarget().getDataLayout()->isLittleEndian()) { |
| 940 | if (!isUnary) |
| 941 | return isVMerge(N, UnitSize, 8, 24); |
| 942 | return isVMerge(N, UnitSize, 8, 8); |
| 943 | } else { |
| 944 | if (!isUnary) |
| 945 | return isVMerge(N, UnitSize, 0, 16); |
| 946 | return isVMerge(N, UnitSize, 0, 0); |
| 947 | } |
Chris Lattner | d1dcb52 | 2006-04-06 21:11:54 +0000 | [diff] [blame] | 948 | } |
| 949 | |
| 950 | |
Chris Lattner | 1d33819 | 2006-04-06 18:26:28 +0000 | [diff] [blame] | 951 | /// isVSLDOIShuffleMask - If this is a vsldoi shuffle mask, return the shift |
| 952 | /// amount, otherwise return -1. |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 953 | int PPC::isVSLDOIShuffleMask(SDNode *N, bool isUnary, SelectionDAG &DAG) { |
Hal Finkel | df3e34d | 2014-03-26 22:58:37 +0000 | [diff] [blame] | 954 | if (N->getValueType(0) != MVT::v16i8) |
Hal Finkel | a775e51 | 2014-04-08 19:00:27 +0000 | [diff] [blame] | 955 | return -1; |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 956 | |
| 957 | ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(N); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 958 | |
Chris Lattner | 1d33819 | 2006-04-06 18:26:28 +0000 | [diff] [blame] | 959 | // Find the first non-undef value in the shuffle mask. |
| 960 | unsigned i; |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 961 | for (i = 0; i != 16 && SVOp->getMaskElt(i) < 0; ++i) |
Chris Lattner | 1d33819 | 2006-04-06 18:26:28 +0000 | [diff] [blame] | 962 | /*search*/; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 963 | |
Chris Lattner | 1d33819 | 2006-04-06 18:26:28 +0000 | [diff] [blame] | 964 | if (i == 16) return -1; // all undef. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 965 | |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 966 | // Otherwise, check to see if the rest of the elements are consecutively |
Chris Lattner | 1d33819 | 2006-04-06 18:26:28 +0000 | [diff] [blame] | 967 | // numbered from this value. |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 968 | unsigned ShiftAmt = SVOp->getMaskElt(i); |
Chris Lattner | 1d33819 | 2006-04-06 18:26:28 +0000 | [diff] [blame] | 969 | if (ShiftAmt < i) return -1; |
Chris Lattner | e8b83b4 | 2006-04-06 17:23:16 +0000 | [diff] [blame] | 970 | |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 971 | if (DAG.getTarget().getDataLayout()->isLittleEndian()) { |
| 972 | |
| 973 | ShiftAmt += i; |
| 974 | |
| 975 | if (!isUnary) { |
| 976 | // Check the rest of the elements to see if they are consecutive. |
| 977 | for (++i; i != 16; ++i) |
| 978 | if (!isConstantOrUndef(SVOp->getMaskElt(i), ShiftAmt - i)) |
| 979 | return -1; |
| 980 | } else { |
| 981 | // Check the rest of the elements to see if they are consecutive. |
| 982 | for (++i; i != 16; ++i) |
| 983 | if (!isConstantOrUndef(SVOp->getMaskElt(i), (ShiftAmt - i) & 15)) |
| 984 | return -1; |
| 985 | } |
| 986 | |
| 987 | } else { // Big Endian |
| 988 | |
| 989 | ShiftAmt -= i; |
| 990 | |
| 991 | if (!isUnary) { |
| 992 | // Check the rest of the elements to see if they are consecutive. |
| 993 | for (++i; i != 16; ++i) |
| 994 | if (!isConstantOrUndef(SVOp->getMaskElt(i), ShiftAmt+i)) |
| 995 | return -1; |
| 996 | } else { |
| 997 | // Check the rest of the elements to see if they are consecutive. |
| 998 | for (++i; i != 16; ++i) |
| 999 | if (!isConstantOrUndef(SVOp->getMaskElt(i), (ShiftAmt+i) & 15)) |
| 1000 | return -1; |
| 1001 | } |
Chris Lattner | a4bbfae | 2006-04-06 22:28:36 +0000 | [diff] [blame] | 1002 | } |
Chris Lattner | 1d33819 | 2006-04-06 18:26:28 +0000 | [diff] [blame] | 1003 | return ShiftAmt; |
| 1004 | } |
Chris Lattner | ffc4756 | 2006-03-20 06:33:01 +0000 | [diff] [blame] | 1005 | |
| 1006 | /// isSplatShuffleMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1007 | /// specifies a splat of a single element that is suitable for input to |
| 1008 | /// VSPLTB/VSPLTH/VSPLTW. |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 1009 | bool PPC::isSplatShuffleMask(ShuffleVectorSDNode *N, unsigned EltSize) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1010 | assert(N->getValueType(0) == MVT::v16i8 && |
Chris Lattner | 95c7adc | 2006-04-04 17:25:31 +0000 | [diff] [blame] | 1011 | (EltSize == 1 || EltSize == 2 || EltSize == 4)); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1012 | |
Chris Lattner | a8fbb6d | 2006-03-20 06:37:44 +0000 | [diff] [blame] | 1013 | // This is a splat operation if each element of the permute is the same, and |
| 1014 | // if the value doesn't reference the second vector. |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 1015 | unsigned ElementBase = N->getMaskElt(0); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1016 | |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 1017 | // FIXME: Handle UNDEF elements too! |
| 1018 | if (ElementBase >= 16) |
Chris Lattner | 95c7adc | 2006-04-04 17:25:31 +0000 | [diff] [blame] | 1019 | return false; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1020 | |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 1021 | // Check that the indices are consecutive, in the case of a multi-byte element |
| 1022 | // splatted with a v16i8 mask. |
| 1023 | for (unsigned i = 1; i != EltSize; ++i) |
| 1024 | if (N->getMaskElt(i) < 0 || N->getMaskElt(i) != (int)(i+ElementBase)) |
Chris Lattner | 95c7adc | 2006-04-04 17:25:31 +0000 | [diff] [blame] | 1025 | return false; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1026 | |
Chris Lattner | 95c7adc | 2006-04-04 17:25:31 +0000 | [diff] [blame] | 1027 | for (unsigned i = EltSize, e = 16; i != e; i += EltSize) { |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 1028 | if (N->getMaskElt(i) < 0) continue; |
Chris Lattner | 95c7adc | 2006-04-04 17:25:31 +0000 | [diff] [blame] | 1029 | for (unsigned j = 0; j != EltSize; ++j) |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 1030 | if (N->getMaskElt(i+j) != N->getMaskElt(j)) |
Chris Lattner | 95c7adc | 2006-04-04 17:25:31 +0000 | [diff] [blame] | 1031 | return false; |
Chris Lattner | a8fbb6d | 2006-03-20 06:37:44 +0000 | [diff] [blame] | 1032 | } |
Chris Lattner | 95c7adc | 2006-04-04 17:25:31 +0000 | [diff] [blame] | 1033 | return true; |
Chris Lattner | ffc4756 | 2006-03-20 06:33:01 +0000 | [diff] [blame] | 1034 | } |
| 1035 | |
Evan Cheng | 581d279 | 2007-07-30 07:51:22 +0000 | [diff] [blame] | 1036 | /// isAllNegativeZeroVector - Returns true if all elements of build_vector |
| 1037 | /// are -0.0. |
| 1038 | bool PPC::isAllNegativeZeroVector(SDNode *N) { |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 1039 | BuildVectorSDNode *BV = cast<BuildVectorSDNode>(N); |
| 1040 | |
| 1041 | APInt APVal, APUndef; |
| 1042 | unsigned BitSize; |
| 1043 | bool HasAnyUndefs; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1044 | |
Dale Johannesen | 5f4eecf | 2009-11-13 01:45:18 +0000 | [diff] [blame] | 1045 | if (BV->isConstantSplat(APVal, APUndef, BitSize, HasAnyUndefs, 32, true)) |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 1046 | if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0))) |
Dale Johannesen | 3cf889f | 2007-08-31 04:03:46 +0000 | [diff] [blame] | 1047 | return CFP->getValueAPF().isNegZero(); |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 1048 | |
Evan Cheng | 581d279 | 2007-07-30 07:51:22 +0000 | [diff] [blame] | 1049 | return false; |
| 1050 | } |
| 1051 | |
Chris Lattner | ffc4756 | 2006-03-20 06:33:01 +0000 | [diff] [blame] | 1052 | /// getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the |
| 1053 | /// specified isSplatShuffleMask VECTOR_SHUFFLE mask. |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 1054 | unsigned PPC::getVSPLTImmediate(SDNode *N, unsigned EltSize, |
| 1055 | SelectionDAG &DAG) { |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 1056 | ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(N); |
| 1057 | assert(isSplatShuffleMask(SVOp, EltSize)); |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 1058 | if (DAG.getTarget().getDataLayout()->isLittleEndian()) |
| 1059 | return (16 / EltSize) - 1 - (SVOp->getMaskElt(0) / EltSize); |
| 1060 | else |
| 1061 | return SVOp->getMaskElt(0) / EltSize; |
Chris Lattner | ffc4756 | 2006-03-20 06:33:01 +0000 | [diff] [blame] | 1062 | } |
| 1063 | |
Chris Lattner | 74cf9ff | 2006-04-12 17:37:20 +0000 | [diff] [blame] | 1064 | /// get_VSPLTI_elt - If this is a build_vector of constants which can be formed |
Chris Lattner | d71a1f9 | 2006-04-08 06:46:53 +0000 | [diff] [blame] | 1065 | /// by using a vspltis[bhw] instruction of the specified element size, return |
| 1066 | /// the constant being splatted. The ByteSize field indicates the number of |
| 1067 | /// bytes of each element [124] -> [bhw]. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1068 | SDValue PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) { |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 1069 | SDValue OpVal(nullptr, 0); |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1070 | |
| 1071 | // If ByteSize of the splat is bigger than the element size of the |
| 1072 | // build_vector, then we have a case where we are checking for a splat where |
| 1073 | // multiple elements of the buildvector are folded together into a single |
| 1074 | // logical element of the splat (e.g. "vsplish 1" to splat {0,1}*8). |
| 1075 | unsigned EltSize = 16/N->getNumOperands(); |
| 1076 | if (EltSize < ByteSize) { |
| 1077 | unsigned Multiple = ByteSize/EltSize; // Number of BV entries per spltval. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1078 | SDValue UniquedVals[4]; |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1079 | assert(Multiple > 1 && Multiple <= 4 && "How can this happen?"); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1080 | |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1081 | // See if all of the elements in the buildvector agree across. |
| 1082 | for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { |
| 1083 | if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue; |
| 1084 | // If the element isn't a constant, bail fully out. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1085 | if (!isa<ConstantSDNode>(N->getOperand(i))) return SDValue(); |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1086 | |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1087 | |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 1088 | if (!UniquedVals[i&(Multiple-1)].getNode()) |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1089 | UniquedVals[i&(Multiple-1)] = N->getOperand(i); |
| 1090 | else if (UniquedVals[i&(Multiple-1)] != N->getOperand(i)) |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1091 | return SDValue(); // no match. |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1092 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1093 | |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1094 | // Okay, if we reached this point, UniquedVals[0..Multiple-1] contains |
| 1095 | // either constant or undef values that are identical for each chunk. See |
| 1096 | // if these chunks can form into a larger vspltis*. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1097 | |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1098 | // Check to see if all of the leading entries are either 0 or -1. If |
| 1099 | // neither, then this won't fit into the immediate field. |
| 1100 | bool LeadingZero = true; |
| 1101 | bool LeadingOnes = true; |
| 1102 | for (unsigned i = 0; i != Multiple-1; ++i) { |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 1103 | if (!UniquedVals[i].getNode()) continue; // Must have been undefs. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1104 | |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1105 | LeadingZero &= cast<ConstantSDNode>(UniquedVals[i])->isNullValue(); |
| 1106 | LeadingOnes &= cast<ConstantSDNode>(UniquedVals[i])->isAllOnesValue(); |
| 1107 | } |
| 1108 | // Finally, check the least significant entry. |
| 1109 | if (LeadingZero) { |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 1110 | if (!UniquedVals[Multiple-1].getNode()) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1111 | return DAG.getTargetConstant(0, MVT::i32); // 0,0,0,undef |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1112 | int Val = cast<ConstantSDNode>(UniquedVals[Multiple-1])->getZExtValue(); |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1113 | if (Val < 16) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1114 | return DAG.getTargetConstant(Val, MVT::i32); // 0,0,0,4 -> vspltisw(4) |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1115 | } |
| 1116 | if (LeadingOnes) { |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 1117 | if (!UniquedVals[Multiple-1].getNode()) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1118 | return DAG.getTargetConstant(~0U, MVT::i32); // -1,-1,-1,undef |
Dan Gohman | 6e05483 | 2008-09-26 21:54:37 +0000 | [diff] [blame] | 1119 | int Val =cast<ConstantSDNode>(UniquedVals[Multiple-1])->getSExtValue(); |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1120 | if (Val >= -16) // -1,-1,-1,-2 -> vspltisw(-2) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1121 | return DAG.getTargetConstant(Val, MVT::i32); |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1122 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1123 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1124 | return SDValue(); |
Chris Lattner | d9e80f4 | 2006-04-08 07:14:26 +0000 | [diff] [blame] | 1125 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1126 | |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1127 | // Check to see if this buildvec has a single non-undef value in its elements. |
| 1128 | for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { |
| 1129 | if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue; |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 1130 | if (!OpVal.getNode()) |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1131 | OpVal = N->getOperand(i); |
| 1132 | else if (OpVal != N->getOperand(i)) |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1133 | return SDValue(); |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1134 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1135 | |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 1136 | if (!OpVal.getNode()) return SDValue(); // All UNDEF: use implicit def. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1137 | |
Eli Friedman | 9c6ab1a | 2009-05-24 02:03:36 +0000 | [diff] [blame] | 1138 | unsigned ValSizeInBytes = EltSize; |
Nate Begeman | 1b39287 | 2006-03-28 04:15:58 +0000 | [diff] [blame] | 1139 | uint64_t Value = 0; |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1140 | if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) { |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1141 | Value = CN->getZExtValue(); |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1142 | } else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1143 | assert(CN->getValueType(0) == MVT::f32 && "Only one legal FP vector type!"); |
Dale Johannesen | 3cf889f | 2007-08-31 04:03:46 +0000 | [diff] [blame] | 1144 | Value = FloatToBits(CN->getValueAPF().convertToFloat()); |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1145 | } |
| 1146 | |
| 1147 | // If the splat value is larger than the element value, then we can never do |
| 1148 | // this splat. The only case that we could fit the replicated bits into our |
| 1149 | // immediate field for would be zero, and we prefer to use vxor for it. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1150 | if (ValSizeInBytes < ByteSize) return SDValue(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1151 | |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1152 | // If the element value is larger than the splat value, cut it in half and |
| 1153 | // check to see if the two halves are equal. Continue doing this until we |
| 1154 | // get to ByteSize. This allows us to handle 0x01010101 as 0x01. |
| 1155 | while (ValSizeInBytes > ByteSize) { |
| 1156 | ValSizeInBytes >>= 1; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1157 | |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1158 | // If the top half equals the bottom half, we're still ok. |
Chris Lattner | 39cc717 | 2006-04-05 17:39:25 +0000 | [diff] [blame] | 1159 | if (((Value >> (ValSizeInBytes*8)) & ((1 << (8*ValSizeInBytes))-1)) != |
| 1160 | (Value & ((1 << (8*ValSizeInBytes))-1))) |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1161 | return SDValue(); |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1162 | } |
| 1163 | |
| 1164 | // Properly sign extend the value. |
Richard Smith | 228e6d4 | 2012-08-24 23:29:28 +0000 | [diff] [blame] | 1165 | int MaskVal = SignExtend32(Value, ByteSize * 8); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1166 | |
Evan Cheng | b1ddc98 | 2006-03-26 09:52:32 +0000 | [diff] [blame] | 1167 | // If this is zero, don't match, zero matches ISD::isBuildVectorAllZeros. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1168 | if (MaskVal == 0) return SDValue(); |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1169 | |
Chris Lattner | d71a1f9 | 2006-04-08 06:46:53 +0000 | [diff] [blame] | 1170 | // Finally, if this value fits in a 5 bit sext field, return it |
Richard Smith | 228e6d4 | 2012-08-24 23:29:28 +0000 | [diff] [blame] | 1171 | if (SignExtend32<5>(MaskVal) == MaskVal) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1172 | return DAG.getTargetConstant(MaskVal, MVT::i32); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1173 | return SDValue(); |
Chris Lattner | 2771e2c | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 1174 | } |
| 1175 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1176 | //===----------------------------------------------------------------------===// |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1177 | // Addressing Mode Selection |
| 1178 | //===----------------------------------------------------------------------===// |
| 1179 | |
| 1180 | /// isIntS16Immediate - This method tests to see if the node is either a 32-bit |
| 1181 | /// or 64-bit immediate, and if the value can be accurately represented as a |
| 1182 | /// sign extension from a 16-bit value. If so, this returns true and the |
| 1183 | /// immediate. |
| 1184 | static bool isIntS16Immediate(SDNode *N, short &Imm) { |
Adam Nemet | 571eb5f | 2014-05-20 17:20:34 +0000 | [diff] [blame] | 1185 | if (!isa<ConstantSDNode>(N)) |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1186 | return false; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1187 | |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1188 | Imm = (short)cast<ConstantSDNode>(N)->getZExtValue(); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1189 | if (N->getValueType(0) == MVT::i32) |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1190 | return Imm == (int32_t)cast<ConstantSDNode>(N)->getZExtValue(); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1191 | else |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1192 | return Imm == (int64_t)cast<ConstantSDNode>(N)->getZExtValue(); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1193 | } |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1194 | static bool isIntS16Immediate(SDValue Op, short &Imm) { |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 1195 | return isIntS16Immediate(Op.getNode(), Imm); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1196 | } |
| 1197 | |
| 1198 | |
| 1199 | /// SelectAddressRegReg - Given the specified addressed, check to see if it |
| 1200 | /// can be represented as an indexed [r+r] operation. Returns false if it |
| 1201 | /// can be more efficiently represented with [r+imm]. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1202 | bool PPCTargetLowering::SelectAddressRegReg(SDValue N, SDValue &Base, |
| 1203 | SDValue &Index, |
Dan Gohman | 02b9313 | 2009-01-15 16:29:45 +0000 | [diff] [blame] | 1204 | SelectionDAG &DAG) const { |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1205 | short imm = 0; |
| 1206 | if (N.getOpcode() == ISD::ADD) { |
| 1207 | if (isIntS16Immediate(N.getOperand(1), imm)) |
| 1208 | return false; // r+i |
| 1209 | if (N.getOperand(1).getOpcode() == PPCISD::Lo) |
| 1210 | return false; // r+i |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1211 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1212 | Base = N.getOperand(0); |
| 1213 | Index = N.getOperand(1); |
| 1214 | return true; |
| 1215 | } else if (N.getOpcode() == ISD::OR) { |
| 1216 | if (isIntS16Immediate(N.getOperand(1), imm)) |
| 1217 | return false; // r+i can fold it if we can. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1218 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1219 | // If this is an or of disjoint bitfields, we can codegen this as an add |
| 1220 | // (for better address arithmetic) if the LHS and RHS of the OR are provably |
| 1221 | // disjoint. |
Dan Gohman | f19609a | 2008-02-27 01:23:58 +0000 | [diff] [blame] | 1222 | APInt LHSKnownZero, LHSKnownOne; |
| 1223 | APInt RHSKnownZero, RHSKnownOne; |
Jay Foad | a0653a3 | 2014-05-14 21:14:37 +0000 | [diff] [blame] | 1224 | DAG.computeKnownBits(N.getOperand(0), |
| 1225 | LHSKnownZero, LHSKnownOne); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1226 | |
Dan Gohman | f19609a | 2008-02-27 01:23:58 +0000 | [diff] [blame] | 1227 | if (LHSKnownZero.getBoolValue()) { |
Jay Foad | a0653a3 | 2014-05-14 21:14:37 +0000 | [diff] [blame] | 1228 | DAG.computeKnownBits(N.getOperand(1), |
| 1229 | RHSKnownZero, RHSKnownOne); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1230 | // If all of the bits are known zero on the LHS or RHS, the add won't |
| 1231 | // carry. |
Dan Gohman | 26854f2 | 2008-02-27 21:12:32 +0000 | [diff] [blame] | 1232 | if (~(LHSKnownZero | RHSKnownZero) == 0) { |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1233 | Base = N.getOperand(0); |
| 1234 | Index = N.getOperand(1); |
| 1235 | return true; |
| 1236 | } |
| 1237 | } |
| 1238 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1239 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1240 | return false; |
| 1241 | } |
| 1242 | |
Hal Finkel | dbbf09b | 2013-07-09 06:34:51 +0000 | [diff] [blame] | 1243 | // If we happen to be doing an i64 load or store into a stack slot that has |
| 1244 | // less than a 4-byte alignment, then the frame-index elimination may need to |
| 1245 | // use an indexed load or store instruction (because the offset may not be a |
| 1246 | // multiple of 4). The extra register needed to hold the offset comes from the |
| 1247 | // register scavenger, and it is possible that the scavenger will need to use |
| 1248 | // an emergency spill slot. As a result, we need to make sure that a spill slot |
| 1249 | // is allocated when doing an i64 load/store into a less-than-4-byte-aligned |
| 1250 | // stack slot. |
| 1251 | static void fixupFuncForFI(SelectionDAG &DAG, int FrameIdx, EVT VT) { |
| 1252 | // FIXME: This does not handle the LWA case. |
| 1253 | if (VT != MVT::i64) |
| 1254 | return; |
| 1255 | |
Hal Finkel | 7ab3db5 | 2013-07-10 15:29:01 +0000 | [diff] [blame] | 1256 | // NOTE: We'll exclude negative FIs here, which come from argument |
| 1257 | // lowering, because there are no known test cases triggering this problem |
| 1258 | // using packed structures (or similar). We can remove this exclusion if |
| 1259 | // we find such a test case. The reason why this is so test-case driven is |
| 1260 | // because this entire 'fixup' is only to prevent crashes (from the |
| 1261 | // register scavenger) on not-really-valid inputs. For example, if we have: |
| 1262 | // %a = alloca i1 |
| 1263 | // %b = bitcast i1* %a to i64* |
| 1264 | // store i64* a, i64 b |
| 1265 | // then the store should really be marked as 'align 1', but is not. If it |
| 1266 | // were marked as 'align 1' then the indexed form would have been |
| 1267 | // instruction-selected initially, and the problem this 'fixup' is preventing |
| 1268 | // won't happen regardless. |
Hal Finkel | dbbf09b | 2013-07-09 06:34:51 +0000 | [diff] [blame] | 1269 | if (FrameIdx < 0) |
| 1270 | return; |
| 1271 | |
| 1272 | MachineFunction &MF = DAG.getMachineFunction(); |
| 1273 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 1274 | |
| 1275 | unsigned Align = MFI->getObjectAlignment(FrameIdx); |
| 1276 | if (Align >= 4) |
| 1277 | return; |
| 1278 | |
| 1279 | PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); |
| 1280 | FuncInfo->setHasNonRISpills(); |
| 1281 | } |
| 1282 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1283 | /// Returns true if the address N can be represented by a base register plus |
| 1284 | /// a signed 16-bit displacement [r+imm], and if it is not better |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 1285 | /// represented as reg+reg. If Aligned is true, only accept displacements |
| 1286 | /// suitable for STD and friends, i.e. multiples of 4. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1287 | bool PPCTargetLowering::SelectAddressRegImm(SDValue N, SDValue &Disp, |
Dan Gohman | 02b9313 | 2009-01-15 16:29:45 +0000 | [diff] [blame] | 1288 | SDValue &Base, |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 1289 | SelectionDAG &DAG, |
| 1290 | bool Aligned) const { |
Dale Johannesen | ab8e442 | 2009-02-06 19:16:40 +0000 | [diff] [blame] | 1291 | // FIXME dl should come from parent load or store, not from address |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 1292 | SDLoc dl(N); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1293 | // If this can be more profitably realized as r+r, fail. |
| 1294 | if (SelectAddressRegReg(N, Disp, Base, DAG)) |
| 1295 | return false; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1296 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1297 | if (N.getOpcode() == ISD::ADD) { |
| 1298 | short imm = 0; |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 1299 | if (isIntS16Immediate(N.getOperand(1), imm) && |
| 1300 | (!Aligned || (imm & 3) == 0)) { |
Ulrich Weigand | 7aa76b6 | 2013-05-16 14:53:05 +0000 | [diff] [blame] | 1301 | Disp = DAG.getTargetConstant(imm, N.getValueType()); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1302 | if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N.getOperand(0))) { |
| 1303 | Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType()); |
Hal Finkel | dbbf09b | 2013-07-09 06:34:51 +0000 | [diff] [blame] | 1304 | fixupFuncForFI(DAG, FI->getIndex(), N.getValueType()); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1305 | } else { |
| 1306 | Base = N.getOperand(0); |
| 1307 | } |
| 1308 | return true; // [r+i] |
| 1309 | } else if (N.getOperand(1).getOpcode() == PPCISD::Lo) { |
| 1310 | // Match LOAD (ADD (X, Lo(G))). |
Gabor Greif | c8a9abe | 2012-04-20 11:41:38 +0000 | [diff] [blame] | 1311 | assert(!cast<ConstantSDNode>(N.getOperand(1).getOperand(1))->getZExtValue() |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1312 | && "Cannot handle constant offsets yet!"); |
| 1313 | Disp = N.getOperand(1).getOperand(0); // The global address. |
| 1314 | assert(Disp.getOpcode() == ISD::TargetGlobalAddress || |
Roman Divacky | e3f15c98 | 2012-06-04 17:36:38 +0000 | [diff] [blame] | 1315 | Disp.getOpcode() == ISD::TargetGlobalTLSAddress || |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1316 | Disp.getOpcode() == ISD::TargetConstantPool || |
| 1317 | Disp.getOpcode() == ISD::TargetJumpTable); |
| 1318 | Base = N.getOperand(0); |
| 1319 | return true; // [&g+r] |
| 1320 | } |
| 1321 | } else if (N.getOpcode() == ISD::OR) { |
| 1322 | short imm = 0; |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 1323 | if (isIntS16Immediate(N.getOperand(1), imm) && |
| 1324 | (!Aligned || (imm & 3) == 0)) { |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1325 | // If this is an or of disjoint bitfields, we can codegen this as an add |
| 1326 | // (for better address arithmetic) if the LHS and RHS of the OR are |
| 1327 | // provably disjoint. |
Dan Gohman | f19609a | 2008-02-27 01:23:58 +0000 | [diff] [blame] | 1328 | APInt LHSKnownZero, LHSKnownOne; |
Jay Foad | a0653a3 | 2014-05-14 21:14:37 +0000 | [diff] [blame] | 1329 | DAG.computeKnownBits(N.getOperand(0), LHSKnownZero, LHSKnownOne); |
Bill Wendling | 6306183 | 2008-03-24 23:16:37 +0000 | [diff] [blame] | 1330 | |
Dan Gohman | f19609a | 2008-02-27 01:23:58 +0000 | [diff] [blame] | 1331 | if ((LHSKnownZero.getZExtValue()|~(uint64_t)imm) == ~0ULL) { |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1332 | // If all of the bits are known zero on the LHS or RHS, the add won't |
| 1333 | // carry. |
| 1334 | Base = N.getOperand(0); |
Ulrich Weigand | 7aa76b6 | 2013-05-16 14:53:05 +0000 | [diff] [blame] | 1335 | Disp = DAG.getTargetConstant(imm, N.getValueType()); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1336 | return true; |
| 1337 | } |
| 1338 | } |
| 1339 | } else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N)) { |
| 1340 | // Loading from a constant address. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1341 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1342 | // If this address fits entirely in a 16-bit sext immediate field, codegen |
| 1343 | // this as "d, 0" |
| 1344 | short Imm; |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 1345 | if (isIntS16Immediate(CN, Imm) && (!Aligned || (Imm & 3) == 0)) { |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1346 | Disp = DAG.getTargetConstant(Imm, CN->getValueType(0)); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 1347 | Base = DAG.getRegister(Subtarget.isPPC64() ? PPC::ZERO8 : PPC::ZERO, |
Hal Finkel | f70c41e | 2013-03-21 23:45:03 +0000 | [diff] [blame] | 1348 | CN->getValueType(0)); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1349 | return true; |
| 1350 | } |
Chris Lattner | 4a9c0bb | 2007-02-17 06:44:03 +0000 | [diff] [blame] | 1351 | |
| 1352 | // Handle 32-bit sext immediates with LIS + addr mode. |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 1353 | if ((CN->getValueType(0) == MVT::i32 || |
| 1354 | (int64_t)CN->getZExtValue() == (int)CN->getZExtValue()) && |
| 1355 | (!Aligned || (CN->getZExtValue() & 3) == 0)) { |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1356 | int Addr = (int)CN->getZExtValue(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1357 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1358 | // Otherwise, break this down into an LIS + disp. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1359 | Disp = DAG.getTargetConstant((short)Addr, MVT::i32); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1360 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1361 | Base = DAG.getTargetConstant((Addr - (signed short)Addr) >> 16, MVT::i32); |
| 1362 | unsigned Opc = CN->getValueType(0) == MVT::i32 ? PPC::LIS : PPC::LIS8; |
Dan Gohman | 32f71d7 | 2009-09-25 18:54:59 +0000 | [diff] [blame] | 1363 | Base = SDValue(DAG.getMachineNode(Opc, dl, CN->getValueType(0), Base), 0); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1364 | return true; |
| 1365 | } |
| 1366 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1367 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1368 | Disp = DAG.getTargetConstant(0, getPointerTy()); |
Hal Finkel | dbbf09b | 2013-07-09 06:34:51 +0000 | [diff] [blame] | 1369 | if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N)) { |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1370 | Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType()); |
Hal Finkel | dbbf09b | 2013-07-09 06:34:51 +0000 | [diff] [blame] | 1371 | fixupFuncForFI(DAG, FI->getIndex(), N.getValueType()); |
| 1372 | } else |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1373 | Base = N; |
| 1374 | return true; // [r+0] |
| 1375 | } |
| 1376 | |
| 1377 | /// SelectAddressRegRegOnly - Given the specified addressed, force it to be |
| 1378 | /// represented as an indexed [r+r] operation. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1379 | bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base, |
| 1380 | SDValue &Index, |
Dan Gohman | 02b9313 | 2009-01-15 16:29:45 +0000 | [diff] [blame] | 1381 | SelectionDAG &DAG) const { |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1382 | // Check to see if we can easily represent this as an [r+r] address. This |
| 1383 | // will fail if it thinks that the address is more profitably represented as |
| 1384 | // reg+imm, e.g. where imm = 0. |
| 1385 | if (SelectAddressRegReg(N, Base, Index, DAG)) |
| 1386 | return true; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1387 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1388 | // If the operand is an addition, always emit this as [r+r], since this is |
| 1389 | // better (for code size, and execution, as the memop does the add for free) |
| 1390 | // than emitting an explicit add. |
| 1391 | if (N.getOpcode() == ISD::ADD) { |
| 1392 | Base = N.getOperand(0); |
| 1393 | Index = N.getOperand(1); |
| 1394 | return true; |
| 1395 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1396 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1397 | // Otherwise, do it the hard way, using R0 as the base register. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 1398 | Base = DAG.getRegister(Subtarget.isPPC64() ? PPC::ZERO8 : PPC::ZERO, |
Hal Finkel | f70c41e | 2013-03-21 23:45:03 +0000 | [diff] [blame] | 1399 | N.getValueType()); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1400 | Index = N; |
| 1401 | return true; |
| 1402 | } |
| 1403 | |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1404 | /// getPreIndexedAddressParts - returns true by value, base pointer and |
| 1405 | /// offset pointer and addressing mode by reference if the node's address |
| 1406 | /// can be legally represented as pre-indexed load / store address. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1407 | bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base, |
| 1408 | SDValue &Offset, |
Evan Cheng | b150007 | 2006-11-09 17:55:04 +0000 | [diff] [blame] | 1409 | ISD::MemIndexedMode &AM, |
Dan Gohman | 02b9313 | 2009-01-15 16:29:45 +0000 | [diff] [blame] | 1410 | SelectionDAG &DAG) const { |
Hal Finkel | 595817e | 2012-06-04 02:21:00 +0000 | [diff] [blame] | 1411 | if (DisablePPCPreinc) return false; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1412 | |
Ulrich Weigand | e90b022 | 2013-03-22 14:58:48 +0000 | [diff] [blame] | 1413 | bool isLoad = true; |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1414 | SDValue Ptr; |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 1415 | EVT VT; |
Hal Finkel | b09680b | 2013-03-18 23:00:58 +0000 | [diff] [blame] | 1416 | unsigned Alignment; |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1417 | if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { |
| 1418 | Ptr = LD->getBasePtr(); |
Dan Gohman | 47a7d6f | 2008-01-30 00:15:11 +0000 | [diff] [blame] | 1419 | VT = LD->getMemoryVT(); |
Hal Finkel | b09680b | 2013-03-18 23:00:58 +0000 | [diff] [blame] | 1420 | Alignment = LD->getAlignment(); |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1421 | } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { |
Chris Lattner | 6837125 | 2006-11-14 01:38:31 +0000 | [diff] [blame] | 1422 | Ptr = ST->getBasePtr(); |
Dan Gohman | 47a7d6f | 2008-01-30 00:15:11 +0000 | [diff] [blame] | 1423 | VT = ST->getMemoryVT(); |
Hal Finkel | b09680b | 2013-03-18 23:00:58 +0000 | [diff] [blame] | 1424 | Alignment = ST->getAlignment(); |
Ulrich Weigand | e90b022 | 2013-03-22 14:58:48 +0000 | [diff] [blame] | 1425 | isLoad = false; |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1426 | } else |
| 1427 | return false; |
| 1428 | |
Chris Lattner | 6837125 | 2006-11-14 01:38:31 +0000 | [diff] [blame] | 1429 | // PowerPC doesn't have preinc load/store instructions for vectors. |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1430 | if (VT.isVector()) |
Chris Lattner | 6837125 | 2006-11-14 01:38:31 +0000 | [diff] [blame] | 1431 | return false; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1432 | |
Ulrich Weigand | e90b022 | 2013-03-22 14:58:48 +0000 | [diff] [blame] | 1433 | if (SelectAddressRegReg(Ptr, Base, Offset, DAG)) { |
| 1434 | |
| 1435 | // Common code will reject creating a pre-inc form if the base pointer |
| 1436 | // is a frame index, or if N is a store and the base pointer is either |
| 1437 | // the same as or a predecessor of the value being stored. Check for |
| 1438 | // those situations here, and try with swapped Base/Offset instead. |
| 1439 | bool Swap = false; |
| 1440 | |
| 1441 | if (isa<FrameIndexSDNode>(Base) || isa<RegisterSDNode>(Base)) |
| 1442 | Swap = true; |
| 1443 | else if (!isLoad) { |
| 1444 | SDValue Val = cast<StoreSDNode>(N)->getValue(); |
| 1445 | if (Val == Base || Base.getNode()->isPredecessorOf(Val.getNode())) |
| 1446 | Swap = true; |
| 1447 | } |
| 1448 | |
| 1449 | if (Swap) |
| 1450 | std::swap(Base, Offset); |
| 1451 | |
Hal Finkel | ca542be | 2012-06-20 15:43:03 +0000 | [diff] [blame] | 1452 | AM = ISD::PRE_INC; |
| 1453 | return true; |
Hal Finkel | 1cc27e4 | 2012-06-19 02:34:32 +0000 | [diff] [blame] | 1454 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1455 | |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 1456 | // LDU/STU can only handle immediates that are a multiple of 4. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1457 | if (VT != MVT::i64) { |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 1458 | if (!SelectAddressRegImm(Ptr, Offset, Base, DAG, false)) |
Chris Lattner | 474b5b7 | 2006-11-15 19:55:13 +0000 | [diff] [blame] | 1459 | return false; |
| 1460 | } else { |
Hal Finkel | b09680b | 2013-03-18 23:00:58 +0000 | [diff] [blame] | 1461 | // LDU/STU need an address with at least 4-byte alignment. |
| 1462 | if (Alignment < 4) |
| 1463 | return false; |
| 1464 | |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 1465 | if (!SelectAddressRegImm(Ptr, Offset, Base, DAG, true)) |
Chris Lattner | 474b5b7 | 2006-11-15 19:55:13 +0000 | [diff] [blame] | 1466 | return false; |
| 1467 | } |
Chris Lattner | b314b15 | 2006-11-11 00:08:42 +0000 | [diff] [blame] | 1468 | |
Chris Lattner | b314b15 | 2006-11-11 00:08:42 +0000 | [diff] [blame] | 1469 | if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { |
Chris Lattner | 474b5b7 | 2006-11-15 19:55:13 +0000 | [diff] [blame] | 1470 | // PPC64 doesn't have lwau, but it does have lwaux. Reject preinc load of |
| 1471 | // sext i32 to i64 when addr mode is r+i. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1472 | if (LD->getValueType(0) == MVT::i64 && LD->getMemoryVT() == MVT::i32 && |
Chris Lattner | b314b15 | 2006-11-11 00:08:42 +0000 | [diff] [blame] | 1473 | LD->getExtensionType() == ISD::SEXTLOAD && |
| 1474 | isa<ConstantSDNode>(Offset)) |
| 1475 | return false; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1476 | } |
| 1477 | |
Chris Lattner | ce64554 | 2006-11-10 02:08:47 +0000 | [diff] [blame] | 1478 | AM = ISD::PRE_INC; |
| 1479 | return true; |
Chris Lattner | a801fced | 2006-11-08 02:15:41 +0000 | [diff] [blame] | 1480 | } |
| 1481 | |
| 1482 | //===----------------------------------------------------------------------===// |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1483 | // LowerOperation implementation |
| 1484 | //===----------------------------------------------------------------------===// |
| 1485 | |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1486 | /// GetLabelAccessInfo - Return true if we should reference labels using a |
| 1487 | /// PICBase, set the HiOpFlags and LoOpFlags to the target MO flags. |
| 1488 | static bool GetLabelAccessInfo(const TargetMachine &TM, unsigned &HiOpFlags, |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 1489 | unsigned &LoOpFlags, |
| 1490 | const GlobalValue *GV = nullptr) { |
Ulrich Weigand | d51c09f | 2013-06-21 14:42:20 +0000 | [diff] [blame] | 1491 | HiOpFlags = PPCII::MO_HA; |
| 1492 | LoOpFlags = PPCII::MO_LO; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1493 | |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1494 | // Don't use the pic base if not in PIC relocation model. Or if we are on a |
| 1495 | // non-darwin platform. We don't support PIC on other platforms yet. |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1496 | bool isPIC = TM.getRelocationModel() == Reloc::PIC_ && |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1497 | TM.getSubtarget<PPCSubtarget>().isDarwin(); |
Chris Lattner | dd6df84 | 2010-11-15 03:13:19 +0000 | [diff] [blame] | 1498 | if (isPIC) { |
| 1499 | HiOpFlags |= PPCII::MO_PIC_FLAG; |
| 1500 | LoOpFlags |= PPCII::MO_PIC_FLAG; |
| 1501 | } |
| 1502 | |
| 1503 | // If this is a reference to a global value that requires a non-lazy-ptr, make |
| 1504 | // sure that instruction lowering adds it. |
| 1505 | if (GV && TM.getSubtarget<PPCSubtarget>().hasLazyResolverStub(GV, TM)) { |
| 1506 | HiOpFlags |= PPCII::MO_NLP_FLAG; |
| 1507 | LoOpFlags |= PPCII::MO_NLP_FLAG; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1508 | |
Chris Lattner | dd6df84 | 2010-11-15 03:13:19 +0000 | [diff] [blame] | 1509 | if (GV->hasHiddenVisibility()) { |
| 1510 | HiOpFlags |= PPCII::MO_NLP_HIDDEN_FLAG; |
| 1511 | LoOpFlags |= PPCII::MO_NLP_HIDDEN_FLAG; |
| 1512 | } |
| 1513 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1514 | |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1515 | return isPIC; |
| 1516 | } |
| 1517 | |
| 1518 | static SDValue LowerLabelRef(SDValue HiPart, SDValue LoPart, bool isPIC, |
| 1519 | SelectionDAG &DAG) { |
| 1520 | EVT PtrVT = HiPart.getValueType(); |
| 1521 | SDValue Zero = DAG.getConstant(0, PtrVT); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 1522 | SDLoc DL(HiPart); |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1523 | |
| 1524 | SDValue Hi = DAG.getNode(PPCISD::Hi, DL, PtrVT, HiPart, Zero); |
| 1525 | SDValue Lo = DAG.getNode(PPCISD::Lo, DL, PtrVT, LoPart, Zero); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1526 | |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1527 | // With PIC, the first instruction is actually "GR+hi(&G)". |
| 1528 | if (isPIC) |
| 1529 | Hi = DAG.getNode(ISD::ADD, DL, PtrVT, |
| 1530 | DAG.getNode(PPCISD::GlobalBaseReg, DL, PtrVT), Hi); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1531 | |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1532 | // Generate non-pic code that has direct accesses to the constant pool. |
| 1533 | // The address of the global is just (hi(&g)+lo(&g)). |
| 1534 | return DAG.getNode(ISD::ADD, DL, PtrVT, Hi, Lo); |
| 1535 | } |
| 1536 | |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1537 | SDValue PPCTargetLowering::LowerConstantPool(SDValue Op, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1538 | SelectionDAG &DAG) const { |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 1539 | EVT PtrVT = Op.getValueType(); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1540 | ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op); |
Dan Gohman | bcaf681 | 2010-04-15 01:51:59 +0000 | [diff] [blame] | 1541 | const Constant *C = CP->getConstVal(); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1542 | |
Roman Divacky | ace4707 | 2012-08-24 16:26:02 +0000 | [diff] [blame] | 1543 | // 64-bit SVR4 ABI code is always position-independent. |
| 1544 | // The actual address of the GlobalValue is stored in the TOC. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 1545 | if (Subtarget.isSVR4ABI() && Subtarget.isPPC64()) { |
Roman Divacky | ace4707 | 2012-08-24 16:26:02 +0000 | [diff] [blame] | 1546 | SDValue GA = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment(), 0); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 1547 | return DAG.getNode(PPCISD::TOC_ENTRY, SDLoc(CP), MVT::i64, GA, |
Roman Divacky | ace4707 | 2012-08-24 16:26:02 +0000 | [diff] [blame] | 1548 | DAG.getRegister(PPC::X2, MVT::i64)); |
| 1549 | } |
| 1550 | |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1551 | unsigned MOHiFlag, MOLoFlag; |
| 1552 | bool isPIC = GetLabelAccessInfo(DAG.getTarget(), MOHiFlag, MOLoFlag); |
| 1553 | SDValue CPIHi = |
| 1554 | DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment(), 0, MOHiFlag); |
| 1555 | SDValue CPILo = |
| 1556 | DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment(), 0, MOLoFlag); |
| 1557 | return LowerLabelRef(CPIHi, CPILo, isPIC, DAG); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1558 | } |
| 1559 | |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1560 | SDValue PPCTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const { |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 1561 | EVT PtrVT = Op.getValueType(); |
Nate Begeman | 4ca2ea5 | 2006-04-22 18:53:45 +0000 | [diff] [blame] | 1562 | JumpTableSDNode *JT = cast<JumpTableSDNode>(Op); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1563 | |
Roman Divacky | ace4707 | 2012-08-24 16:26:02 +0000 | [diff] [blame] | 1564 | // 64-bit SVR4 ABI code is always position-independent. |
| 1565 | // The actual address of the GlobalValue is stored in the TOC. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 1566 | if (Subtarget.isSVR4ABI() && Subtarget.isPPC64()) { |
Roman Divacky | ace4707 | 2012-08-24 16:26:02 +0000 | [diff] [blame] | 1567 | SDValue GA = DAG.getTargetJumpTable(JT->getIndex(), PtrVT); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 1568 | return DAG.getNode(PPCISD::TOC_ENTRY, SDLoc(JT), MVT::i64, GA, |
Roman Divacky | ace4707 | 2012-08-24 16:26:02 +0000 | [diff] [blame] | 1569 | DAG.getRegister(PPC::X2, MVT::i64)); |
| 1570 | } |
| 1571 | |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1572 | unsigned MOHiFlag, MOLoFlag; |
| 1573 | bool isPIC = GetLabelAccessInfo(DAG.getTarget(), MOHiFlag, MOLoFlag); |
| 1574 | SDValue JTIHi = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MOHiFlag); |
| 1575 | SDValue JTILo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MOLoFlag); |
| 1576 | return LowerLabelRef(JTIHi, JTILo, isPIC, DAG); |
Lauro Ramos Venancio | 09d73c0 | 2007-07-11 17:19:51 +0000 | [diff] [blame] | 1577 | } |
| 1578 | |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1579 | SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op, |
| 1580 | SelectionDAG &DAG) const { |
Bob Wilson | f84f710 | 2009-11-04 21:31:18 +0000 | [diff] [blame] | 1581 | EVT PtrVT = Op.getValueType(); |
Bob Wilson | f84f710 | 2009-11-04 21:31:18 +0000 | [diff] [blame] | 1582 | |
Dan Gohman | bcaf681 | 2010-04-15 01:51:59 +0000 | [diff] [blame] | 1583 | const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress(); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1584 | |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1585 | unsigned MOHiFlag, MOLoFlag; |
| 1586 | bool isPIC = GetLabelAccessInfo(DAG.getTarget(), MOHiFlag, MOLoFlag); |
Michael Liao | abb87d4 | 2012-09-12 21:43:09 +0000 | [diff] [blame] | 1587 | SDValue TgtBAHi = DAG.getTargetBlockAddress(BA, PtrVT, 0, MOHiFlag); |
| 1588 | SDValue TgtBALo = DAG.getTargetBlockAddress(BA, PtrVT, 0, MOLoFlag); |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1589 | return LowerLabelRef(TgtBAHi, TgtBALo, isPIC, DAG); |
| 1590 | } |
| 1591 | |
Roman Divacky | e3f15c98 | 2012-06-04 17:36:38 +0000 | [diff] [blame] | 1592 | SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op, |
| 1593 | SelectionDAG &DAG) const { |
| 1594 | |
Bill Schmidt | bdae03f | 2013-09-17 20:22:05 +0000 | [diff] [blame] | 1595 | // FIXME: TLS addresses currently use medium model code sequences, |
| 1596 | // which is the most useful form. Eventually support for small and |
| 1597 | // large models could be added if users need it, at the cost of |
| 1598 | // additional complexity. |
Roman Divacky | e3f15c98 | 2012-06-04 17:36:38 +0000 | [diff] [blame] | 1599 | GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 1600 | SDLoc dl(GA); |
Roman Divacky | e3f15c98 | 2012-06-04 17:36:38 +0000 | [diff] [blame] | 1601 | const GlobalValue *GV = GA->getGlobal(); |
| 1602 | EVT PtrVT = getPointerTy(); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 1603 | bool is64bit = Subtarget.isPPC64(); |
Roman Divacky | e3f15c98 | 2012-06-04 17:36:38 +0000 | [diff] [blame] | 1604 | |
Bill Schmidt | ca4a0c9 | 2012-12-04 16:18:08 +0000 | [diff] [blame] | 1605 | TLSModel::Model Model = getTargetMachine().getTLSModel(GV); |
Roman Divacky | e3f15c98 | 2012-06-04 17:36:38 +0000 | [diff] [blame] | 1606 | |
Bill Schmidt | ca4a0c9 | 2012-12-04 16:18:08 +0000 | [diff] [blame] | 1607 | if (Model == TLSModel::LocalExec) { |
| 1608 | SDValue TGAHi = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, |
Ulrich Weigand | d51c09f | 2013-06-21 14:42:20 +0000 | [diff] [blame] | 1609 | PPCII::MO_TPREL_HA); |
Bill Schmidt | ca4a0c9 | 2012-12-04 16:18:08 +0000 | [diff] [blame] | 1610 | SDValue TGALo = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, |
Ulrich Weigand | d51c09f | 2013-06-21 14:42:20 +0000 | [diff] [blame] | 1611 | PPCII::MO_TPREL_LO); |
Bill Schmidt | ca4a0c9 | 2012-12-04 16:18:08 +0000 | [diff] [blame] | 1612 | SDValue TLSReg = DAG.getRegister(is64bit ? PPC::X13 : PPC::R2, |
| 1613 | is64bit ? MVT::i64 : MVT::i32); |
| 1614 | SDValue Hi = DAG.getNode(PPCISD::Hi, dl, PtrVT, TGAHi, TLSReg); |
| 1615 | return DAG.getNode(PPCISD::Lo, dl, PtrVT, TGALo, Hi); |
| 1616 | } |
Roman Divacky | e3f15c98 | 2012-06-04 17:36:38 +0000 | [diff] [blame] | 1617 | |
Bill Schmidt | c56f1d3 | 2012-12-11 20:30:11 +0000 | [diff] [blame] | 1618 | if (Model == TLSModel::InitialExec) { |
Bill Schmidt | 732eb91 | 2012-12-13 18:45:54 +0000 | [diff] [blame] | 1619 | SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0); |
Ulrich Weigand | 5b42759 | 2013-07-05 12:22:36 +0000 | [diff] [blame] | 1620 | SDValue TGATLS = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, |
| 1621 | PPCII::MO_TLS); |
Roman Divacky | 32143e2 | 2013-12-20 18:08:54 +0000 | [diff] [blame] | 1622 | SDValue GOTPtr; |
| 1623 | if (is64bit) { |
| 1624 | SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64); |
| 1625 | GOTPtr = DAG.getNode(PPCISD::ADDIS_GOT_TPREL_HA, dl, |
| 1626 | PtrVT, GOTReg, TGA); |
| 1627 | } else |
| 1628 | GOTPtr = DAG.getNode(PPCISD::PPC32_GOT, dl, PtrVT); |
Bill Schmidt | 9f0b4ec | 2012-12-14 17:02:38 +0000 | [diff] [blame] | 1629 | SDValue TPOffset = DAG.getNode(PPCISD::LD_GOT_TPREL_L, dl, |
Roman Divacky | 32143e2 | 2013-12-20 18:08:54 +0000 | [diff] [blame] | 1630 | PtrVT, TGA, GOTPtr); |
Ulrich Weigand | 5b42759 | 2013-07-05 12:22:36 +0000 | [diff] [blame] | 1631 | return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TPOffset, TGATLS); |
Bill Schmidt | c56f1d3 | 2012-12-11 20:30:11 +0000 | [diff] [blame] | 1632 | } |
Bill Schmidt | ca4a0c9 | 2012-12-04 16:18:08 +0000 | [diff] [blame] | 1633 | |
Bill Schmidt | c56f1d3 | 2012-12-11 20:30:11 +0000 | [diff] [blame] | 1634 | if (Model == TLSModel::GeneralDynamic) { |
| 1635 | SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0); |
| 1636 | SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64); |
| 1637 | SDValue GOTEntryHi = DAG.getNode(PPCISD::ADDIS_TLSGD_HA, dl, PtrVT, |
| 1638 | GOTReg, TGA); |
| 1639 | SDValue GOTEntry = DAG.getNode(PPCISD::ADDI_TLSGD_L, dl, PtrVT, |
| 1640 | GOTEntryHi, TGA); |
| 1641 | |
| 1642 | // We need a chain node, and don't have one handy. The underlying |
| 1643 | // call has no side effects, so using the function entry node |
| 1644 | // suffices. |
| 1645 | SDValue Chain = DAG.getEntryNode(); |
| 1646 | Chain = DAG.getCopyToReg(Chain, dl, PPC::X3, GOTEntry); |
| 1647 | SDValue ParmReg = DAG.getRegister(PPC::X3, MVT::i64); |
| 1648 | SDValue TLSAddr = DAG.getNode(PPCISD::GET_TLS_ADDR, dl, |
| 1649 | PtrVT, ParmReg, TGA); |
Bill Schmidt | 24b8dd6 | 2012-12-12 19:29:35 +0000 | [diff] [blame] | 1650 | // The return value from GET_TLS_ADDR really is in X3 already, but |
| 1651 | // some hacks are needed here to tie everything together. The extra |
| 1652 | // copies dissolve during subsequent transforms. |
Bill Schmidt | c56f1d3 | 2012-12-11 20:30:11 +0000 | [diff] [blame] | 1653 | Chain = DAG.getCopyToReg(Chain, dl, PPC::X3, TLSAddr); |
| 1654 | return DAG.getCopyFromReg(Chain, dl, PPC::X3, PtrVT); |
| 1655 | } |
| 1656 | |
Bill Schmidt | 24b8dd6 | 2012-12-12 19:29:35 +0000 | [diff] [blame] | 1657 | if (Model == TLSModel::LocalDynamic) { |
| 1658 | SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0); |
| 1659 | SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64); |
| 1660 | SDValue GOTEntryHi = DAG.getNode(PPCISD::ADDIS_TLSLD_HA, dl, PtrVT, |
| 1661 | GOTReg, TGA); |
| 1662 | SDValue GOTEntry = DAG.getNode(PPCISD::ADDI_TLSLD_L, dl, PtrVT, |
| 1663 | GOTEntryHi, TGA); |
| 1664 | |
| 1665 | // We need a chain node, and don't have one handy. The underlying |
| 1666 | // call has no side effects, so using the function entry node |
| 1667 | // suffices. |
| 1668 | SDValue Chain = DAG.getEntryNode(); |
| 1669 | Chain = DAG.getCopyToReg(Chain, dl, PPC::X3, GOTEntry); |
| 1670 | SDValue ParmReg = DAG.getRegister(PPC::X3, MVT::i64); |
| 1671 | SDValue TLSAddr = DAG.getNode(PPCISD::GET_TLSLD_ADDR, dl, |
| 1672 | PtrVT, ParmReg, TGA); |
| 1673 | // The return value from GET_TLSLD_ADDR really is in X3 already, but |
| 1674 | // some hacks are needed here to tie everything together. The extra |
| 1675 | // copies dissolve during subsequent transforms. |
| 1676 | Chain = DAG.getCopyToReg(Chain, dl, PPC::X3, TLSAddr); |
| 1677 | SDValue DtvOffsetHi = DAG.getNode(PPCISD::ADDIS_DTPREL_HA, dl, PtrVT, |
Bill Schmidt | 9ed4dbc | 2012-12-13 20:57:10 +0000 | [diff] [blame] | 1678 | Chain, ParmReg, TGA); |
Bill Schmidt | 24b8dd6 | 2012-12-12 19:29:35 +0000 | [diff] [blame] | 1679 | return DAG.getNode(PPCISD::ADDI_DTPREL_L, dl, PtrVT, DtvOffsetHi, TGA); |
| 1680 | } |
| 1681 | |
| 1682 | llvm_unreachable("Unknown TLS model!"); |
Roman Divacky | e3f15c98 | 2012-06-04 17:36:38 +0000 | [diff] [blame] | 1683 | } |
| 1684 | |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1685 | SDValue PPCTargetLowering::LowerGlobalAddress(SDValue Op, |
| 1686 | SelectionDAG &DAG) const { |
| 1687 | EVT PtrVT = Op.getValueType(); |
| 1688 | GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 1689 | SDLoc DL(GSDN); |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1690 | const GlobalValue *GV = GSDN->getGlobal(); |
| 1691 | |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1692 | // 64-bit SVR4 ABI code is always position-independent. |
| 1693 | // The actual address of the GlobalValue is stored in the TOC. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 1694 | if (Subtarget.isSVR4ABI() && Subtarget.isPPC64()) { |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1695 | SDValue GA = DAG.getTargetGlobalAddress(GV, DL, PtrVT, GSDN->getOffset()); |
| 1696 | return DAG.getNode(PPCISD::TOC_ENTRY, DL, MVT::i64, GA, |
| 1697 | DAG.getRegister(PPC::X2, MVT::i64)); |
| 1698 | } |
| 1699 | |
Chris Lattner | dd6df84 | 2010-11-15 03:13:19 +0000 | [diff] [blame] | 1700 | unsigned MOHiFlag, MOLoFlag; |
| 1701 | bool isPIC = GetLabelAccessInfo(DAG.getTarget(), MOHiFlag, MOLoFlag, GV); |
Chris Lattner | edb9d84 | 2010-11-15 02:46:57 +0000 | [diff] [blame] | 1702 | |
Chris Lattner | dd6df84 | 2010-11-15 03:13:19 +0000 | [diff] [blame] | 1703 | SDValue GAHi = |
| 1704 | DAG.getTargetGlobalAddress(GV, DL, PtrVT, GSDN->getOffset(), MOHiFlag); |
| 1705 | SDValue GALo = |
| 1706 | DAG.getTargetGlobalAddress(GV, DL, PtrVT, GSDN->getOffset(), MOLoFlag); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1707 | |
Chris Lattner | dd6df84 | 2010-11-15 03:13:19 +0000 | [diff] [blame] | 1708 | SDValue Ptr = LowerLabelRef(GAHi, GALo, isPIC, DAG); |
Bob Wilson | f84f710 | 2009-11-04 21:31:18 +0000 | [diff] [blame] | 1709 | |
Chris Lattner | dd6df84 | 2010-11-15 03:13:19 +0000 | [diff] [blame] | 1710 | // If the global reference is actually to a non-lazy-pointer, we have to do an |
| 1711 | // extra load to get the address of the global. |
| 1712 | if (MOHiFlag & PPCII::MO_NLP_FLAG) |
| 1713 | Ptr = DAG.getLoad(PtrVT, DL, DAG.getEntryNode(), Ptr, MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 1714 | false, false, false, 0); |
Chris Lattner | dd6df84 | 2010-11-15 03:13:19 +0000 | [diff] [blame] | 1715 | return Ptr; |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1716 | } |
| 1717 | |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1718 | SDValue PPCTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const { |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1719 | ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 1720 | SDLoc dl(Op); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1721 | |
Hal Finkel | 777c9dd | 2014-03-29 16:04:40 +0000 | [diff] [blame] | 1722 | if (Op.getValueType() == MVT::v2i64) { |
| 1723 | // When the operands themselves are v2i64 values, we need to do something |
| 1724 | // special because VSX has no underlying comparison operations for these. |
| 1725 | if (Op.getOperand(0).getValueType() == MVT::v2i64) { |
| 1726 | // Equality can be handled by casting to the legal type for Altivec |
| 1727 | // comparisons, everything else needs to be expanded. |
| 1728 | if (CC == ISD::SETEQ || CC == ISD::SETNE) { |
| 1729 | return DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, |
| 1730 | DAG.getSetCC(dl, MVT::v4i32, |
| 1731 | DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Op.getOperand(0)), |
| 1732 | DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Op.getOperand(1)), |
| 1733 | CC)); |
| 1734 | } |
| 1735 | |
| 1736 | return SDValue(); |
| 1737 | } |
| 1738 | |
| 1739 | // We handle most of these in the usual way. |
| 1740 | return Op; |
| 1741 | } |
| 1742 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1743 | // If we're comparing for equality to zero, expose the fact that this is |
| 1744 | // implented as a ctlz/srl pair on ppc, so that the dag combiner can |
| 1745 | // fold the new nodes. |
| 1746 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { |
| 1747 | if (C->isNullValue() && CC == ISD::SETEQ) { |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 1748 | EVT VT = Op.getOperand(0).getValueType(); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1749 | SDValue Zext = Op.getOperand(0); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1750 | if (VT.bitsLT(MVT::i32)) { |
| 1751 | VT = MVT::i32; |
Dale Johannesen | f2bb6f0 | 2009-02-04 01:48:28 +0000 | [diff] [blame] | 1752 | Zext = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Op.getOperand(0)); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1753 | } |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1754 | unsigned Log2b = Log2_32(VT.getSizeInBits()); |
Dale Johannesen | f2bb6f0 | 2009-02-04 01:48:28 +0000 | [diff] [blame] | 1755 | SDValue Clz = DAG.getNode(ISD::CTLZ, dl, VT, Zext); |
| 1756 | SDValue Scc = DAG.getNode(ISD::SRL, dl, VT, Clz, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1757 | DAG.getConstant(Log2b, MVT::i32)); |
| 1758 | return DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Scc); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1759 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1760 | // Leave comparisons against 0 and -1 alone for now, since they're usually |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1761 | // optimized. FIXME: revisit this when we can custom lower all setcc |
| 1762 | // optimizations. |
| 1763 | if (C->isAllOnesValue() || C->isNullValue()) |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1764 | return SDValue(); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1765 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1766 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1767 | // If we have an integer seteq/setne, turn it into a compare against zero |
Chris Lattner | 97ff46b | 2006-11-14 05:28:08 +0000 | [diff] [blame] | 1768 | // by xor'ing the rhs with the lhs, which is faster than setting a |
| 1769 | // condition register, reading it back out, and masking the correct bit. The |
| 1770 | // normal approach here uses sub to do this instead of xor. Using xor exposes |
| 1771 | // the result to other bit-twiddling opportunities. |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 1772 | EVT LHSVT = Op.getOperand(0).getValueType(); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1773 | if (LHSVT.isInteger() && (CC == ISD::SETEQ || CC == ISD::SETNE)) { |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 1774 | EVT VT = Op.getValueType(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1775 | SDValue Sub = DAG.getNode(ISD::XOR, dl, LHSVT, Op.getOperand(0), |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1776 | Op.getOperand(1)); |
Dale Johannesen | f2bb6f0 | 2009-02-04 01:48:28 +0000 | [diff] [blame] | 1777 | return DAG.getSetCC(dl, VT, Sub, DAG.getConstant(0, LHSVT), CC); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1778 | } |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1779 | return SDValue(); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 1780 | } |
| 1781 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1782 | SDValue PPCTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1783 | const PPCSubtarget &Subtarget) const { |
Roman Divacky | 4394e68 | 2011-06-28 15:30:42 +0000 | [diff] [blame] | 1784 | SDNode *Node = Op.getNode(); |
| 1785 | EVT VT = Node->getValueType(0); |
| 1786 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
| 1787 | SDValue InChain = Node->getOperand(0); |
| 1788 | SDValue VAListPtr = Node->getOperand(1); |
| 1789 | const Value *SV = cast<SrcValueSDNode>(Node->getOperand(2))->getValue(); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 1790 | SDLoc dl(Node); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1791 | |
Roman Divacky | 4394e68 | 2011-06-28 15:30:42 +0000 | [diff] [blame] | 1792 | assert(!Subtarget.isPPC64() && "LowerVAARG is PPC32 only"); |
| 1793 | |
| 1794 | // gpr_index |
| 1795 | SDValue GprIndex = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i32, InChain, |
| 1796 | VAListPtr, MachinePointerInfo(SV), MVT::i8, |
| 1797 | false, false, 0); |
| 1798 | InChain = GprIndex.getValue(1); |
| 1799 | |
| 1800 | if (VT == MVT::i64) { |
| 1801 | // Check if GprIndex is even |
| 1802 | SDValue GprAnd = DAG.getNode(ISD::AND, dl, MVT::i32, GprIndex, |
| 1803 | DAG.getConstant(1, MVT::i32)); |
| 1804 | SDValue CC64 = DAG.getSetCC(dl, MVT::i32, GprAnd, |
| 1805 | DAG.getConstant(0, MVT::i32), ISD::SETNE); |
| 1806 | SDValue GprIndexPlusOne = DAG.getNode(ISD::ADD, dl, MVT::i32, GprIndex, |
| 1807 | DAG.getConstant(1, MVT::i32)); |
| 1808 | // Align GprIndex to be even if it isn't |
| 1809 | GprIndex = DAG.getNode(ISD::SELECT, dl, MVT::i32, CC64, GprIndexPlusOne, |
| 1810 | GprIndex); |
| 1811 | } |
| 1812 | |
| 1813 | // fpr index is 1 byte after gpr |
| 1814 | SDValue FprPtr = DAG.getNode(ISD::ADD, dl, PtrVT, VAListPtr, |
| 1815 | DAG.getConstant(1, MVT::i32)); |
| 1816 | |
| 1817 | // fpr |
| 1818 | SDValue FprIndex = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i32, InChain, |
| 1819 | FprPtr, MachinePointerInfo(SV), MVT::i8, |
| 1820 | false, false, 0); |
| 1821 | InChain = FprIndex.getValue(1); |
| 1822 | |
| 1823 | SDValue RegSaveAreaPtr = DAG.getNode(ISD::ADD, dl, PtrVT, VAListPtr, |
| 1824 | DAG.getConstant(8, MVT::i32)); |
| 1825 | |
| 1826 | SDValue OverflowAreaPtr = DAG.getNode(ISD::ADD, dl, PtrVT, VAListPtr, |
| 1827 | DAG.getConstant(4, MVT::i32)); |
| 1828 | |
| 1829 | // areas |
| 1830 | SDValue OverflowArea = DAG.getLoad(MVT::i32, dl, InChain, OverflowAreaPtr, |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 1831 | MachinePointerInfo(), false, false, |
| 1832 | false, 0); |
Roman Divacky | 4394e68 | 2011-06-28 15:30:42 +0000 | [diff] [blame] | 1833 | InChain = OverflowArea.getValue(1); |
| 1834 | |
| 1835 | SDValue RegSaveArea = DAG.getLoad(MVT::i32, dl, InChain, RegSaveAreaPtr, |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 1836 | MachinePointerInfo(), false, false, |
| 1837 | false, 0); |
Roman Divacky | 4394e68 | 2011-06-28 15:30:42 +0000 | [diff] [blame] | 1838 | InChain = RegSaveArea.getValue(1); |
| 1839 | |
| 1840 | // select overflow_area if index > 8 |
| 1841 | SDValue CC = DAG.getSetCC(dl, MVT::i32, VT.isInteger() ? GprIndex : FprIndex, |
| 1842 | DAG.getConstant(8, MVT::i32), ISD::SETLT); |
| 1843 | |
Roman Divacky | 4394e68 | 2011-06-28 15:30:42 +0000 | [diff] [blame] | 1844 | // adjustment constant gpr_index * 4/8 |
| 1845 | SDValue RegConstant = DAG.getNode(ISD::MUL, dl, MVT::i32, |
| 1846 | VT.isInteger() ? GprIndex : FprIndex, |
| 1847 | DAG.getConstant(VT.isInteger() ? 4 : 8, |
| 1848 | MVT::i32)); |
| 1849 | |
| 1850 | // OurReg = RegSaveArea + RegConstant |
| 1851 | SDValue OurReg = DAG.getNode(ISD::ADD, dl, PtrVT, RegSaveArea, |
| 1852 | RegConstant); |
| 1853 | |
| 1854 | // Floating types are 32 bytes into RegSaveArea |
| 1855 | if (VT.isFloatingPoint()) |
| 1856 | OurReg = DAG.getNode(ISD::ADD, dl, PtrVT, OurReg, |
| 1857 | DAG.getConstant(32, MVT::i32)); |
| 1858 | |
| 1859 | // increase {f,g}pr_index by 1 (or 2 if VT is i64) |
| 1860 | SDValue IndexPlus1 = DAG.getNode(ISD::ADD, dl, MVT::i32, |
| 1861 | VT.isInteger() ? GprIndex : FprIndex, |
| 1862 | DAG.getConstant(VT == MVT::i64 ? 2 : 1, |
| 1863 | MVT::i32)); |
| 1864 | |
| 1865 | InChain = DAG.getTruncStore(InChain, dl, IndexPlus1, |
| 1866 | VT.isInteger() ? VAListPtr : FprPtr, |
| 1867 | MachinePointerInfo(SV), |
| 1868 | MVT::i8, false, false, 0); |
| 1869 | |
| 1870 | // determine if we should load from reg_save_area or overflow_area |
| 1871 | SDValue Result = DAG.getNode(ISD::SELECT, dl, PtrVT, CC, OurReg, OverflowArea); |
| 1872 | |
| 1873 | // increase overflow_area by 4/8 if gpr/fpr > 8 |
| 1874 | SDValue OverflowAreaPlusN = DAG.getNode(ISD::ADD, dl, PtrVT, OverflowArea, |
| 1875 | DAG.getConstant(VT.isInteger() ? 4 : 8, |
| 1876 | MVT::i32)); |
| 1877 | |
| 1878 | OverflowArea = DAG.getNode(ISD::SELECT, dl, MVT::i32, CC, OverflowArea, |
| 1879 | OverflowAreaPlusN); |
| 1880 | |
| 1881 | InChain = DAG.getTruncStore(InChain, dl, OverflowArea, |
| 1882 | OverflowAreaPtr, |
| 1883 | MachinePointerInfo(), |
| 1884 | MVT::i32, false, false, 0); |
| 1885 | |
NAKAMURA Takumi | 8ad54e0 | 2012-08-30 15:52:23 +0000 | [diff] [blame] | 1886 | return DAG.getLoad(VT, dl, InChain, Result, MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 1887 | false, false, false, 0); |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 1888 | } |
| 1889 | |
Roman Divacky | c3825df | 2013-07-25 21:36:47 +0000 | [diff] [blame] | 1890 | SDValue PPCTargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG, |
| 1891 | const PPCSubtarget &Subtarget) const { |
| 1892 | assert(!Subtarget.isPPC64() && "LowerVACOPY is PPC32 only"); |
| 1893 | |
| 1894 | // We have to copy the entire va_list struct: |
| 1895 | // 2*sizeof(char) + 2 Byte alignment + 2*sizeof(char*) = 12 Byte |
| 1896 | return DAG.getMemcpy(Op.getOperand(0), Op, |
| 1897 | Op.getOperand(1), Op.getOperand(2), |
| 1898 | DAG.getConstant(12, MVT::i32), 8, false, true, |
| 1899 | MachinePointerInfo(), MachinePointerInfo()); |
| 1900 | } |
| 1901 | |
Duncan Sands | a098436 | 2011-09-06 13:37:06 +0000 | [diff] [blame] | 1902 | SDValue PPCTargetLowering::LowerADJUST_TRAMPOLINE(SDValue Op, |
| 1903 | SelectionDAG &DAG) const { |
| 1904 | return Op.getOperand(0); |
| 1905 | } |
| 1906 | |
| 1907 | SDValue PPCTargetLowering::LowerINIT_TRAMPOLINE(SDValue Op, |
| 1908 | SelectionDAG &DAG) const { |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 1909 | SDValue Chain = Op.getOperand(0); |
| 1910 | SDValue Trmp = Op.getOperand(1); // trampoline |
| 1911 | SDValue FPtr = Op.getOperand(2); // nested function |
| 1912 | SDValue Nest = Op.getOperand(3); // 'nest' parameter value |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 1913 | SDLoc dl(Op); |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 1914 | |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 1915 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1916 | bool isPPC64 = (PtrVT == MVT::i64); |
Chris Lattner | 229907c | 2011-07-18 04:54:35 +0000 | [diff] [blame] | 1917 | Type *IntPtrTy = |
Micah Villmow | cdfe20b | 2012-10-08 16:38:25 +0000 | [diff] [blame] | 1918 | DAG.getTargetLoweringInfo().getDataLayout()->getIntPtrType( |
Chandler Carruth | 7ec5085 | 2012-11-01 08:07:29 +0000 | [diff] [blame] | 1919 | *DAG.getContext()); |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 1920 | |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1921 | TargetLowering::ArgListTy Args; |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 1922 | TargetLowering::ArgListEntry Entry; |
| 1923 | |
| 1924 | Entry.Ty = IntPtrTy; |
| 1925 | Entry.Node = Trmp; Args.push_back(Entry); |
| 1926 | |
| 1927 | // TrampSize == (isPPC64 ? 48 : 40); |
| 1928 | Entry.Node = DAG.getConstant(isPPC64 ? 48 : 40, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1929 | isPPC64 ? MVT::i64 : MVT::i32); |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 1930 | Args.push_back(Entry); |
| 1931 | |
| 1932 | Entry.Node = FPtr; Args.push_back(Entry); |
| 1933 | Entry.Node = Nest; Args.push_back(Entry); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1934 | |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 1935 | // Lower to a call to __trampoline_setup(Trmp, TrampSize, FPtr, ctx_reg) |
Saleem Abdulrasool | f3a5a5c | 2014-05-17 21:50:17 +0000 | [diff] [blame] | 1936 | TargetLowering::CallLoweringInfo CLI(DAG); |
| 1937 | CLI.setDebugLoc(dl).setChain(Chain) |
| 1938 | .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()), |
Juergen Ributzka | 3bd03c7 | 2014-07-01 22:01:54 +0000 | [diff] [blame] | 1939 | DAG.getExternalSymbol("__trampoline_setup", PtrVT), |
| 1940 | std::move(Args), 0); |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 1941 | |
Saleem Abdulrasool | f3a5a5c | 2014-05-17 21:50:17 +0000 | [diff] [blame] | 1942 | std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI); |
Duncan Sands | a098436 | 2011-09-06 13:37:06 +0000 | [diff] [blame] | 1943 | return CallResult.second; |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 1944 | } |
| 1945 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1946 | SDValue PPCTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1947 | const PPCSubtarget &Subtarget) const { |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 1948 | MachineFunction &MF = DAG.getMachineFunction(); |
| 1949 | PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); |
| 1950 | |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 1951 | SDLoc dl(Op); |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 1952 | |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 1953 | if (Subtarget.isDarwinABI() || Subtarget.isPPC64()) { |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 1954 | // vastart just stores the address of the VarArgsFrameIndex slot into the |
| 1955 | // memory location argument. |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 1956 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 1957 | SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT); |
Dan Gohman | 2d489b5 | 2008-02-06 22:27:42 +0000 | [diff] [blame] | 1958 | const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 1959 | return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1), |
| 1960 | MachinePointerInfo(SV), |
David Greene | 87a5abe | 2010-02-15 16:56:53 +0000 | [diff] [blame] | 1961 | false, false, 0); |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 1962 | } |
| 1963 | |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 1964 | // For the 32-bit SVR4 ABI we follow the layout of the va_list struct. |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 1965 | // We suppose the given va_list is already allocated. |
| 1966 | // |
| 1967 | // typedef struct { |
| 1968 | // char gpr; /* index into the array of 8 GPRs |
| 1969 | // * stored in the register save area |
| 1970 | // * gpr=0 corresponds to r3, |
| 1971 | // * gpr=1 to r4, etc. |
| 1972 | // */ |
| 1973 | // char fpr; /* index into the array of 8 FPRs |
| 1974 | // * stored in the register save area |
| 1975 | // * fpr=0 corresponds to f1, |
| 1976 | // * fpr=1 to f2, etc. |
| 1977 | // */ |
| 1978 | // char *overflow_arg_area; |
| 1979 | // /* location on stack that holds |
| 1980 | // * the next overflow argument |
| 1981 | // */ |
| 1982 | // char *reg_save_area; |
| 1983 | // /* where r3:r10 and f1:f8 (if saved) |
| 1984 | // * are stored |
| 1985 | // */ |
| 1986 | // } va_list[1]; |
| 1987 | |
| 1988 | |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 1989 | SDValue ArgGPR = DAG.getConstant(FuncInfo->getVarArgsNumGPR(), MVT::i32); |
| 1990 | SDValue ArgFPR = DAG.getConstant(FuncInfo->getVarArgsNumFPR(), MVT::i32); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1991 | |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 1992 | |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 1993 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1994 | |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 1995 | SDValue StackOffsetFI = DAG.getFrameIndex(FuncInfo->getVarArgsStackOffset(), |
| 1996 | PtrVT); |
| 1997 | SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), |
| 1998 | PtrVT); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 1999 | |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 2000 | uint64_t FrameOffset = PtrVT.getSizeInBits()/8; |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2001 | SDValue ConstFrameOffset = DAG.getConstant(FrameOffset, PtrVT); |
Dan Gohman | 2d489b5 | 2008-02-06 22:27:42 +0000 | [diff] [blame] | 2002 | |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 2003 | uint64_t StackOffset = PtrVT.getSizeInBits()/8 - 1; |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2004 | SDValue ConstStackOffset = DAG.getConstant(StackOffset, PtrVT); |
Dan Gohman | 2d489b5 | 2008-02-06 22:27:42 +0000 | [diff] [blame] | 2005 | |
| 2006 | uint64_t FPROffset = 1; |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2007 | SDValue ConstFPROffset = DAG.getConstant(FPROffset, PtrVT); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2008 | |
Dan Gohman | 2d489b5 | 2008-02-06 22:27:42 +0000 | [diff] [blame] | 2009 | const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2010 | |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 2011 | // Store first byte : number of int regs |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2012 | SDValue firstStore = DAG.getTruncStore(Op.getOperand(0), dl, ArgGPR, |
Chris Lattner | 6963c1f | 2010-09-21 17:42:31 +0000 | [diff] [blame] | 2013 | Op.getOperand(1), |
| 2014 | MachinePointerInfo(SV), |
| 2015 | MVT::i8, false, false, 0); |
Dan Gohman | 2d489b5 | 2008-02-06 22:27:42 +0000 | [diff] [blame] | 2016 | uint64_t nextOffset = FPROffset; |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 2017 | SDValue nextPtr = DAG.getNode(ISD::ADD, dl, PtrVT, Op.getOperand(1), |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 2018 | ConstFPROffset); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2019 | |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 2020 | // Store second byte : number of float regs |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2021 | SDValue secondStore = |
Chris Lattner | 6963c1f | 2010-09-21 17:42:31 +0000 | [diff] [blame] | 2022 | DAG.getTruncStore(firstStore, dl, ArgFPR, nextPtr, |
| 2023 | MachinePointerInfo(SV, nextOffset), MVT::i8, |
David Greene | 87a5abe | 2010-02-15 16:56:53 +0000 | [diff] [blame] | 2024 | false, false, 0); |
Dan Gohman | 2d489b5 | 2008-02-06 22:27:42 +0000 | [diff] [blame] | 2025 | nextOffset += StackOffset; |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 2026 | nextPtr = DAG.getNode(ISD::ADD, dl, PtrVT, nextPtr, ConstStackOffset); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2027 | |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 2028 | // Store second word : arguments given on stack |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2029 | SDValue thirdStore = |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 2030 | DAG.getStore(secondStore, dl, StackOffsetFI, nextPtr, |
| 2031 | MachinePointerInfo(SV, nextOffset), |
David Greene | 87a5abe | 2010-02-15 16:56:53 +0000 | [diff] [blame] | 2032 | false, false, 0); |
Dan Gohman | 2d489b5 | 2008-02-06 22:27:42 +0000 | [diff] [blame] | 2033 | nextOffset += FrameOffset; |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 2034 | nextPtr = DAG.getNode(ISD::ADD, dl, PtrVT, nextPtr, ConstFrameOffset); |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 2035 | |
| 2036 | // Store third word : arguments given in registers |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 2037 | return DAG.getStore(thirdStore, dl, FR, nextPtr, |
| 2038 | MachinePointerInfo(SV, nextOffset), |
David Greene | 87a5abe | 2010-02-15 16:56:53 +0000 | [diff] [blame] | 2039 | false, false, 0); |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 2040 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 2041 | } |
| 2042 | |
Chris Lattner | 4f2e4e0 | 2007-03-06 00:59:59 +0000 | [diff] [blame] | 2043 | #include "PPCGenCallingConv.inc" |
| 2044 | |
Bill Schmidt | 8c3976e | 2013-08-26 20:11:46 +0000 | [diff] [blame] | 2045 | // Function whose sole purpose is to kill compiler warnings |
| 2046 | // stemming from unused functions included from PPCGenCallingConv.inc. |
| 2047 | CCAssignFn *PPCTargetLowering::useFastISelCCs(unsigned Flag) const { |
Bill Schmidt | 8470b0f | 2013-08-30 22:18:55 +0000 | [diff] [blame] | 2048 | return Flag ? CC_PPC64_ELF_FIS : RetCC_PPC64_ELF_FIS; |
Bill Schmidt | 8c3976e | 2013-08-26 20:11:46 +0000 | [diff] [blame] | 2049 | } |
| 2050 | |
Bill Schmidt | 230b451 | 2013-06-12 16:39:22 +0000 | [diff] [blame] | 2051 | bool llvm::CC_PPC32_SVR4_Custom_Dummy(unsigned &ValNo, MVT &ValVT, MVT &LocVT, |
| 2052 | CCValAssign::LocInfo &LocInfo, |
| 2053 | ISD::ArgFlagsTy &ArgFlags, |
| 2054 | CCState &State) { |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2055 | return true; |
| 2056 | } |
| 2057 | |
Bill Schmidt | 230b451 | 2013-06-12 16:39:22 +0000 | [diff] [blame] | 2058 | bool llvm::CC_PPC32_SVR4_Custom_AlignArgRegs(unsigned &ValNo, MVT &ValVT, |
| 2059 | MVT &LocVT, |
| 2060 | CCValAssign::LocInfo &LocInfo, |
| 2061 | ISD::ArgFlagsTy &ArgFlags, |
| 2062 | CCState &State) { |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2063 | static const MCPhysReg ArgRegs[] = { |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2064 | PPC::R3, PPC::R4, PPC::R5, PPC::R6, |
| 2065 | PPC::R7, PPC::R8, PPC::R9, PPC::R10, |
| 2066 | }; |
| 2067 | const unsigned NumArgRegs = array_lengthof(ArgRegs); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2068 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2069 | unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); |
| 2070 | |
| 2071 | // Skip one register if the first unallocated register has an even register |
| 2072 | // number and there are still argument registers available which have not been |
| 2073 | // allocated yet. RegNum is actually an index into ArgRegs, which means we |
| 2074 | // need to skip a register if RegNum is odd. |
| 2075 | if (RegNum != NumArgRegs && RegNum % 2 == 1) { |
| 2076 | State.AllocateReg(ArgRegs[RegNum]); |
| 2077 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2078 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2079 | // Always return false here, as this function only makes sure that the first |
| 2080 | // unallocated register has an odd register number and does not actually |
| 2081 | // allocate a register for the current argument. |
| 2082 | return false; |
| 2083 | } |
| 2084 | |
Bill Schmidt | 230b451 | 2013-06-12 16:39:22 +0000 | [diff] [blame] | 2085 | bool llvm::CC_PPC32_SVR4_Custom_AlignFPArgRegs(unsigned &ValNo, MVT &ValVT, |
| 2086 | MVT &LocVT, |
| 2087 | CCValAssign::LocInfo &LocInfo, |
| 2088 | ISD::ArgFlagsTy &ArgFlags, |
| 2089 | CCState &State) { |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2090 | static const MCPhysReg ArgRegs[] = { |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2091 | PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, |
| 2092 | PPC::F8 |
| 2093 | }; |
| 2094 | |
| 2095 | const unsigned NumArgRegs = array_lengthof(ArgRegs); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2096 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2097 | unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); |
| 2098 | |
| 2099 | // If there is only one Floating-point register left we need to put both f64 |
| 2100 | // values of a split ppc_fp128 value on the stack. |
| 2101 | if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { |
| 2102 | State.AllocateReg(ArgRegs[RegNum]); |
| 2103 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2104 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2105 | // Always return false here, as this function only makes sure that the two f64 |
| 2106 | // values a ppc_fp128 value is split into are both passed in registers or both |
| 2107 | // passed on the stack and does not actually allocate a register for the |
| 2108 | // current argument. |
| 2109 | return false; |
| 2110 | } |
| 2111 | |
Chris Lattner | 43df5b3 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 2112 | /// GetFPR - Get the set of FP registers that should be allocated for arguments, |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 2113 | /// on Darwin. |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2114 | static const MCPhysReg *GetFPR() { |
| 2115 | static const MCPhysReg FPR[] = { |
Chris Lattner | 43df5b3 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 2116 | PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 2117 | PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13 |
Chris Lattner | 43df5b3 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 2118 | }; |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 2119 | |
Chris Lattner | 43df5b3 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 2120 | return FPR; |
| 2121 | } |
| 2122 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 2123 | /// CalculateStackSlotSize - Calculates the size reserved for this argument on |
| 2124 | /// the stack. |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 2125 | static unsigned CalculateStackSlotSize(EVT ArgVT, ISD::ArgFlagsTy Flags, |
Tilmann Scheller | 98bdaaa | 2009-07-03 06:43:35 +0000 | [diff] [blame] | 2126 | unsigned PtrByteSize) { |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 2127 | unsigned ArgSize = ArgVT.getStoreSize(); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 2128 | if (Flags.isByVal()) |
| 2129 | ArgSize = Flags.getByValSize(); |
| 2130 | ArgSize = ((ArgSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; |
| 2131 | |
| 2132 | return ArgSize; |
| 2133 | } |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 2134 | /// EnsureStackAlignment - Round stack frame size up from NumBytes to |
| 2135 | /// ensure minimum alignment required for target. |
| 2136 | static unsigned EnsureStackAlignment(const TargetMachine &Target, |
| 2137 | unsigned NumBytes) { |
| 2138 | unsigned TargetAlign = Target.getFrameLowering()->getStackAlignment(); |
| 2139 | unsigned AlignMask = TargetAlign - 1; |
| 2140 | NumBytes = (NumBytes + AlignMask) & ~AlignMask; |
| 2141 | return NumBytes; |
| 2142 | } |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 2143 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2144 | SDValue |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2145 | PPCTargetLowering::LowerFormalArguments(SDValue Chain, |
Sandeep Patel | 68c5f47 | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 2146 | CallingConv::ID CallConv, bool isVarArg, |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2147 | const SmallVectorImpl<ISD::InputArg> |
| 2148 | &Ins, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 2149 | SDLoc dl, SelectionDAG &DAG, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 2150 | SmallVectorImpl<SDValue> &InVals) |
| 2151 | const { |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 2152 | if (Subtarget.isSVR4ABI()) { |
| 2153 | if (Subtarget.isPPC64()) |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2154 | return LowerFormalArguments_64SVR4(Chain, CallConv, isVarArg, Ins, |
| 2155 | dl, DAG, InVals); |
| 2156 | else |
| 2157 | return LowerFormalArguments_32SVR4(Chain, CallConv, isVarArg, Ins, |
| 2158 | dl, DAG, InVals); |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 2159 | } else { |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2160 | return LowerFormalArguments_Darwin(Chain, CallConv, isVarArg, Ins, |
| 2161 | dl, DAG, InVals); |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2162 | } |
| 2163 | } |
| 2164 | |
| 2165 | SDValue |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 2166 | PPCTargetLowering::LowerFormalArguments_32SVR4( |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2167 | SDValue Chain, |
Sandeep Patel | 68c5f47 | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 2168 | CallingConv::ID CallConv, bool isVarArg, |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2169 | const SmallVectorImpl<ISD::InputArg> |
| 2170 | &Ins, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 2171 | SDLoc dl, SelectionDAG &DAG, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 2172 | SmallVectorImpl<SDValue> &InVals) const { |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2173 | |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 2174 | // 32-bit SVR4 ABI Stack Frame Layout: |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2175 | // +-----------------------------------+ |
| 2176 | // +--> | Back chain | |
| 2177 | // | +-----------------------------------+ |
| 2178 | // | | Floating-point register save area | |
| 2179 | // | +-----------------------------------+ |
| 2180 | // | | General register save area | |
| 2181 | // | +-----------------------------------+ |
| 2182 | // | | CR save word | |
| 2183 | // | +-----------------------------------+ |
| 2184 | // | | VRSAVE save word | |
| 2185 | // | +-----------------------------------+ |
| 2186 | // | | Alignment padding | |
| 2187 | // | +-----------------------------------+ |
| 2188 | // | | Vector register save area | |
| 2189 | // | +-----------------------------------+ |
| 2190 | // | | Local variable space | |
| 2191 | // | +-----------------------------------+ |
| 2192 | // | | Parameter list area | |
| 2193 | // | +-----------------------------------+ |
| 2194 | // | | LR save word | |
| 2195 | // | +-----------------------------------+ |
| 2196 | // SP--> +--- | Back chain | |
| 2197 | // +-----------------------------------+ |
| 2198 | // |
| 2199 | // Specifications: |
| 2200 | // System V Application Binary Interface PowerPC Processor Supplement |
| 2201 | // AltiVec Technology Programming Interface Manual |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2202 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2203 | MachineFunction &MF = DAG.getMachineFunction(); |
| 2204 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 2205 | PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2206 | |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 2207 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2208 | // Potential tail calls could cause overwriting of argument stack slots. |
Nick Lewycky | 50f02cb | 2011-12-02 22:16:29 +0000 | [diff] [blame] | 2209 | bool isImmutable = !(getTargetMachine().Options.GuaranteedTailCallOpt && |
| 2210 | (CallConv == CallingConv::Fast)); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2211 | unsigned PtrByteSize = 4; |
| 2212 | |
| 2213 | // Assign locations to all of the incoming arguments. |
| 2214 | SmallVector<CCValAssign, 16> ArgLocs; |
Eric Christopher | 0713a9d | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 2215 | CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), |
Gabor Greif | 180c444 | 2012-04-19 15:16:31 +0000 | [diff] [blame] | 2216 | getTargetMachine(), ArgLocs, *DAG.getContext()); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2217 | |
| 2218 | // Reserve space for the linkage area on the stack. |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 2219 | unsigned LinkageSize = PPCFrameLowering::getLinkageSize(false, false); |
| 2220 | CCInfo.AllocateStack(LinkageSize, PtrByteSize); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2221 | |
Bill Schmidt | ef17c14 | 2013-02-06 17:33:58 +0000 | [diff] [blame] | 2222 | CCInfo.AnalyzeFormalArguments(Ins, CC_PPC32_SVR4); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2223 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2224 | for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { |
| 2225 | CCValAssign &VA = ArgLocs[i]; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2226 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2227 | // Arguments stored in registers. |
| 2228 | if (VA.isRegLoc()) { |
Craig Topper | 760b134 | 2012-02-22 05:59:10 +0000 | [diff] [blame] | 2229 | const TargetRegisterClass *RC; |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 2230 | EVT ValVT = VA.getValVT(); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2231 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2232 | switch (ValVT.getSimpleVT().SimpleTy) { |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2233 | default: |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2234 | llvm_unreachable("ValVT not supported by formal arguments Lowering"); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 2235 | case MVT::i1: |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2236 | case MVT::i32: |
Craig Topper | abadc66 | 2012-04-20 06:31:50 +0000 | [diff] [blame] | 2237 | RC = &PPC::GPRCRegClass; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2238 | break; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2239 | case MVT::f32: |
Craig Topper | abadc66 | 2012-04-20 06:31:50 +0000 | [diff] [blame] | 2240 | RC = &PPC::F4RCRegClass; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2241 | break; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2242 | case MVT::f64: |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 2243 | if (Subtarget.hasVSX()) |
Hal Finkel | 19be506 | 2014-03-29 05:29:01 +0000 | [diff] [blame] | 2244 | RC = &PPC::VSFRCRegClass; |
| 2245 | else |
| 2246 | RC = &PPC::F8RCRegClass; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2247 | break; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2248 | case MVT::v16i8: |
| 2249 | case MVT::v8i16: |
| 2250 | case MVT::v4i32: |
| 2251 | case MVT::v4f32: |
Hal Finkel | 7811c61 | 2014-03-28 19:58:11 +0000 | [diff] [blame] | 2252 | RC = &PPC::VRRCRegClass; |
| 2253 | break; |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 2254 | case MVT::v2f64: |
Hal Finkel | a6c8b51 | 2014-03-26 16:12:58 +0000 | [diff] [blame] | 2255 | case MVT::v2i64: |
Hal Finkel | 7811c61 | 2014-03-28 19:58:11 +0000 | [diff] [blame] | 2256 | RC = &PPC::VSHRCRegClass; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2257 | break; |
| 2258 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2259 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2260 | // Transform the arguments stored in physical registers into virtual ones. |
Devang Patel | f3292b2 | 2011-02-21 23:21:26 +0000 | [diff] [blame] | 2261 | unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 2262 | SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, |
| 2263 | ValVT == MVT::i1 ? MVT::i32 : ValVT); |
| 2264 | |
| 2265 | if (ValVT == MVT::i1) |
| 2266 | ArgValue = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, ArgValue); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2267 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2268 | InVals.push_back(ArgValue); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2269 | } else { |
| 2270 | // Argument stored in memory. |
| 2271 | assert(VA.isMemLoc()); |
| 2272 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 2273 | unsigned ArgSize = VA.getLocVT().getStoreSize(); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2274 | int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset(), |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 2275 | isImmutable); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2276 | |
| 2277 | // Create load nodes to retrieve arguments from the stack. |
| 2278 | SDValue FIN = DAG.getFrameIndex(FI, PtrVT); |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 2279 | InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, |
| 2280 | MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 2281 | false, false, false, 0)); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2282 | } |
| 2283 | } |
| 2284 | |
| 2285 | // Assign locations to all of the incoming aggregate by value arguments. |
| 2286 | // Aggregates passed by value are stored in the local variable space of the |
| 2287 | // caller's stack frame, right above the parameter list area. |
| 2288 | SmallVector<CCValAssign, 16> ByValArgLocs; |
Eric Christopher | 0713a9d | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 2289 | CCState CCByValInfo(CallConv, isVarArg, DAG.getMachineFunction(), |
Gabor Greif | 180c444 | 2012-04-19 15:16:31 +0000 | [diff] [blame] | 2290 | getTargetMachine(), ByValArgLocs, *DAG.getContext()); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2291 | |
| 2292 | // Reserve stack space for the allocations in CCInfo. |
| 2293 | CCByValInfo.AllocateStack(CCInfo.getNextStackOffset(), PtrByteSize); |
| 2294 | |
Bill Schmidt | ef17c14 | 2013-02-06 17:33:58 +0000 | [diff] [blame] | 2295 | CCByValInfo.AnalyzeFormalArguments(Ins, CC_PPC32_SVR4_ByVal); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2296 | |
| 2297 | // Area that is at least reserved in the caller of this function. |
| 2298 | unsigned MinReservedArea = CCByValInfo.getNextStackOffset(); |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 2299 | MinReservedArea = std::max(MinReservedArea, LinkageSize); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2300 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2301 | // Set the size that is at least reserved in caller of this function. Tail |
| 2302 | // call optimized function's reserved stack space needs to be aligned so that |
| 2303 | // taking the difference between two stack areas will result in an aligned |
| 2304 | // stack. |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 2305 | MinReservedArea = EnsureStackAlignment(MF.getTarget(), MinReservedArea); |
| 2306 | FuncInfo->setMinReservedArea(MinReservedArea); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2307 | |
| 2308 | SmallVector<SDValue, 8> MemOps; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2309 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2310 | // If the function takes variable number of arguments, make a frame index for |
| 2311 | // the start of the first vararg value... for expansion of llvm.va_start. |
| 2312 | if (isVarArg) { |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2313 | static const MCPhysReg GPArgRegs[] = { |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2314 | PPC::R3, PPC::R4, PPC::R5, PPC::R6, |
| 2315 | PPC::R7, PPC::R8, PPC::R9, PPC::R10, |
| 2316 | }; |
| 2317 | const unsigned NumGPArgRegs = array_lengthof(GPArgRegs); |
| 2318 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2319 | static const MCPhysReg FPArgRegs[] = { |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2320 | PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, |
| 2321 | PPC::F8 |
| 2322 | }; |
| 2323 | const unsigned NumFPArgRegs = array_lengthof(FPArgRegs); |
| 2324 | |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 2325 | FuncInfo->setVarArgsNumGPR(CCInfo.getFirstUnallocated(GPArgRegs, |
| 2326 | NumGPArgRegs)); |
| 2327 | FuncInfo->setVarArgsNumFPR(CCInfo.getFirstUnallocated(FPArgRegs, |
| 2328 | NumFPArgRegs)); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2329 | |
| 2330 | // Make room for NumGPArgRegs and NumFPArgRegs. |
| 2331 | int Depth = NumGPArgRegs * PtrVT.getSizeInBits()/8 + |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2332 | NumFPArgRegs * EVT(MVT::f64).getSizeInBits()/8; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2333 | |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 2334 | FuncInfo->setVarArgsStackOffset( |
| 2335 | MFI->CreateFixedObject(PtrVT.getSizeInBits()/8, |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 2336 | CCInfo.getNextStackOffset(), true)); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2337 | |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 2338 | FuncInfo->setVarArgsFrameIndex(MFI->CreateStackObject(Depth, 8, false)); |
| 2339 | SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2340 | |
Jakob Stoklund Olesen | 6c4353e | 2010-10-11 20:43:09 +0000 | [diff] [blame] | 2341 | // The fixed integer arguments of a variadic function are stored to the |
| 2342 | // VarArgsFrameIndex on the stack so that they may be loaded by deferencing |
| 2343 | // the result of va_next. |
| 2344 | for (unsigned GPRIndex = 0; GPRIndex != NumGPArgRegs; ++GPRIndex) { |
| 2345 | // Get an existing live-in vreg, or add a new one. |
| 2346 | unsigned VReg = MF.getRegInfo().getLiveInVirtReg(GPArgRegs[GPRIndex]); |
| 2347 | if (!VReg) |
Devang Patel | f3292b2 | 2011-02-21 23:21:26 +0000 | [diff] [blame] | 2348 | VReg = MF.addLiveIn(GPArgRegs[GPRIndex], &PPC::GPRCRegClass); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2349 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2350 | SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 2351 | SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, |
| 2352 | MachinePointerInfo(), false, false, 0); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2353 | MemOps.push_back(Store); |
| 2354 | // Increment the address by four for the next argument to store |
| 2355 | SDValue PtrOff = DAG.getConstant(PtrVT.getSizeInBits()/8, PtrVT); |
| 2356 | FIN = DAG.getNode(ISD::ADD, dl, PtrOff.getValueType(), FIN, PtrOff); |
| 2357 | } |
| 2358 | |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 2359 | // FIXME 32-bit SVR4: We only need to save FP argument registers if CR bit 6 |
| 2360 | // is set. |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2361 | // The double arguments are stored to the VarArgsFrameIndex |
| 2362 | // on the stack. |
Jakob Stoklund Olesen | 6c4353e | 2010-10-11 20:43:09 +0000 | [diff] [blame] | 2363 | for (unsigned FPRIndex = 0; FPRIndex != NumFPArgRegs; ++FPRIndex) { |
| 2364 | // Get an existing live-in vreg, or add a new one. |
| 2365 | unsigned VReg = MF.getRegInfo().getLiveInVirtReg(FPArgRegs[FPRIndex]); |
| 2366 | if (!VReg) |
Devang Patel | f3292b2 | 2011-02-21 23:21:26 +0000 | [diff] [blame] | 2367 | VReg = MF.addLiveIn(FPArgRegs[FPRIndex], &PPC::F8RCRegClass); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2368 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2369 | SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::f64); |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 2370 | SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, |
| 2371 | MachinePointerInfo(), false, false, 0); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2372 | MemOps.push_back(Store); |
| 2373 | // Increment the address by eight for the next argument to store |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2374 | SDValue PtrOff = DAG.getConstant(EVT(MVT::f64).getSizeInBits()/8, |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2375 | PtrVT); |
| 2376 | FIN = DAG.getNode(ISD::ADD, dl, PtrOff.getValueType(), FIN, PtrOff); |
| 2377 | } |
| 2378 | } |
| 2379 | |
| 2380 | if (!MemOps.empty()) |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 2381 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2382 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2383 | return Chain; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2384 | } |
| 2385 | |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 2386 | // PPC64 passes i8, i16, and i32 values in i64 registers. Promote |
| 2387 | // value to MVT::i64 and then truncate to the correct register size. |
| 2388 | SDValue |
| 2389 | PPCTargetLowering::extendArgForPPC64(ISD::ArgFlagsTy Flags, EVT ObjectVT, |
| 2390 | SelectionDAG &DAG, SDValue ArgVal, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 2391 | SDLoc dl) const { |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 2392 | if (Flags.isSExt()) |
| 2393 | ArgVal = DAG.getNode(ISD::AssertSext, dl, MVT::i64, ArgVal, |
| 2394 | DAG.getValueType(ObjectVT)); |
| 2395 | else if (Flags.isZExt()) |
| 2396 | ArgVal = DAG.getNode(ISD::AssertZext, dl, MVT::i64, ArgVal, |
| 2397 | DAG.getValueType(ObjectVT)); |
Matt Arsenault | 75865923 | 2013-05-18 00:21:46 +0000 | [diff] [blame] | 2398 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 2399 | return DAG.getNode(ISD::TRUNCATE, dl, ObjectVT, ArgVal); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 2400 | } |
| 2401 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 2402 | SDValue |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2403 | PPCTargetLowering::LowerFormalArguments_64SVR4( |
| 2404 | SDValue Chain, |
| 2405 | CallingConv::ID CallConv, bool isVarArg, |
| 2406 | const SmallVectorImpl<ISD::InputArg> |
| 2407 | &Ins, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 2408 | SDLoc dl, SelectionDAG &DAG, |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2409 | SmallVectorImpl<SDValue> &InVals) const { |
| 2410 | // TODO: add description of PPC stack frame format, or at least some docs. |
| 2411 | // |
Ulrich Weigand | 59c6ab2 | 2014-06-20 16:34:05 +0000 | [diff] [blame] | 2412 | bool isLittleEndian = Subtarget.isLittleEndian(); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2413 | MachineFunction &MF = DAG.getMachineFunction(); |
| 2414 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 2415 | PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); |
| 2416 | |
| 2417 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
| 2418 | // Potential tail calls could cause overwriting of argument stack slots. |
| 2419 | bool isImmutable = !(getTargetMachine().Options.GuaranteedTailCallOpt && |
| 2420 | (CallConv == CallingConv::Fast)); |
| 2421 | unsigned PtrByteSize = 8; |
| 2422 | |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 2423 | unsigned LinkageSize = PPCFrameLowering::getLinkageSize(true, false); |
| 2424 | unsigned ArgOffset = LinkageSize; |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2425 | // Area that is at least reserved in caller of this function. |
| 2426 | unsigned MinReservedArea = ArgOffset; |
| 2427 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2428 | static const MCPhysReg GPR[] = { |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2429 | PPC::X3, PPC::X4, PPC::X5, PPC::X6, |
| 2430 | PPC::X7, PPC::X8, PPC::X9, PPC::X10, |
| 2431 | }; |
| 2432 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2433 | static const MCPhysReg *FPR = GetFPR(); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2434 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2435 | static const MCPhysReg VR[] = { |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2436 | PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, |
| 2437 | PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 |
| 2438 | }; |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2439 | static const MCPhysReg VSRH[] = { |
Hal Finkel | 7811c61 | 2014-03-28 19:58:11 +0000 | [diff] [blame] | 2440 | PPC::VSH2, PPC::VSH3, PPC::VSH4, PPC::VSH5, PPC::VSH6, PPC::VSH7, PPC::VSH8, |
| 2441 | PPC::VSH9, PPC::VSH10, PPC::VSH11, PPC::VSH12, PPC::VSH13 |
| 2442 | }; |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2443 | |
| 2444 | const unsigned Num_GPR_Regs = array_lengthof(GPR); |
| 2445 | const unsigned Num_FPR_Regs = 13; |
| 2446 | const unsigned Num_VR_Regs = array_lengthof(VR); |
| 2447 | |
| 2448 | unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0; |
| 2449 | |
| 2450 | // Add DAG nodes to load the arguments or copy them out of registers. On |
| 2451 | // entry to a function on PPC, the arguments start after the linkage area, |
| 2452 | // although the first ones are often in registers. |
| 2453 | |
| 2454 | SmallVector<SDValue, 8> MemOps; |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2455 | Function::const_arg_iterator FuncArg = MF.getFunction()->arg_begin(); |
Bill Schmidt | 6631e94 | 2013-02-20 17:31:41 +0000 | [diff] [blame] | 2456 | unsigned CurArgIdx = 0; |
| 2457 | for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo) { |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2458 | SDValue ArgVal; |
| 2459 | bool needsLoad = false; |
| 2460 | EVT ObjectVT = Ins[ArgNo].VT; |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 2461 | unsigned ObjSize = ObjectVT.getStoreSize(); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2462 | unsigned ArgSize = ObjSize; |
| 2463 | ISD::ArgFlagsTy Flags = Ins[ArgNo].Flags; |
Bill Schmidt | 6631e94 | 2013-02-20 17:31:41 +0000 | [diff] [blame] | 2464 | std::advance(FuncArg, Ins[ArgNo].OrigArgIndex - CurArgIdx); |
| 2465 | CurArgIdx = Ins[ArgNo].OrigArgIndex; |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2466 | |
| 2467 | unsigned CurArgOffset = ArgOffset; |
| 2468 | |
Ulrich Weigand | 9ba552d | 2014-06-23 12:36:34 +0000 | [diff] [blame] | 2469 | // Altivec parameters are padded to a 16 byte boundary. |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2470 | if (ObjectVT==MVT::v4f32 || ObjectVT==MVT::v4i32 || |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 2471 | ObjectVT==MVT::v8i16 || ObjectVT==MVT::v16i8 || |
Ulrich Weigand | 9ba552d | 2014-06-23 12:36:34 +0000 | [diff] [blame] | 2472 | ObjectVT==MVT::v2f64 || ObjectVT==MVT::v2i64) |
| 2473 | MinReservedArea = ((MinReservedArea+15)/16)*16; |
| 2474 | |
| 2475 | // Calculate min reserved area. |
| 2476 | MinReservedArea += CalculateStackSlotSize(ObjectVT, Flags, PtrByteSize); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2477 | |
| 2478 | // FIXME the codegen can be much improved in some cases. |
| 2479 | // We do not have to keep everything in memory. |
| 2480 | if (Flags.isByVal()) { |
| 2481 | // ObjSize is the true size, ArgSize rounded up to multiple of registers. |
| 2482 | ObjSize = Flags.getByValSize(); |
| 2483 | ArgSize = ((ObjSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; |
Bill Schmidt | 9953cf2 | 2012-10-31 01:15:05 +0000 | [diff] [blame] | 2484 | // Empty aggregate parameters do not take up registers. Examples: |
| 2485 | // struct { } a; |
| 2486 | // union { } b; |
| 2487 | // int c[0]; |
| 2488 | // etc. However, we have to provide a place-holder in InVals, so |
| 2489 | // pretend we have an 8-byte item at the current address for that |
| 2490 | // purpose. |
| 2491 | if (!ObjSize) { |
| 2492 | int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset, true); |
| 2493 | SDValue FIN = DAG.getFrameIndex(FI, PtrVT); |
| 2494 | InVals.push_back(FIN); |
| 2495 | continue; |
| 2496 | } |
Hal Finkel | 262a224 | 2013-09-12 23:20:06 +0000 | [diff] [blame] | 2497 | |
| 2498 | unsigned BVAlign = Flags.getByValAlign(); |
| 2499 | if (BVAlign > 8) { |
| 2500 | ArgOffset = ((ArgOffset+BVAlign-1)/BVAlign)*BVAlign; |
| 2501 | CurArgOffset = ArgOffset; |
| 2502 | } |
| 2503 | |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2504 | // All aggregates smaller than 8 bytes must be passed right-justified. |
Ulrich Weigand | 59c6ab2 | 2014-06-20 16:34:05 +0000 | [diff] [blame] | 2505 | if (ObjSize < PtrByteSize && !isLittleEndian) |
Bill Schmidt | 48081ca | 2012-10-16 13:30:53 +0000 | [diff] [blame] | 2506 | CurArgOffset = CurArgOffset + (PtrByteSize - ObjSize); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2507 | // The value of the object is its address. |
| 2508 | int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset, true); |
| 2509 | SDValue FIN = DAG.getFrameIndex(FI, PtrVT); |
| 2510 | InVals.push_back(FIN); |
Bill Schmidt | 6ed3b99 | 2012-10-25 13:38:09 +0000 | [diff] [blame] | 2511 | |
| 2512 | if (ObjSize < 8) { |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2513 | if (GPR_idx != Num_GPR_Regs) { |
Bill Schmidt | 6ed3b99 | 2012-10-25 13:38:09 +0000 | [diff] [blame] | 2514 | unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2515 | SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); |
Bill Schmidt | 6ed3b99 | 2012-10-25 13:38:09 +0000 | [diff] [blame] | 2516 | SDValue Store; |
| 2517 | |
| 2518 | if (ObjSize==1 || ObjSize==2 || ObjSize==4) { |
| 2519 | EVT ObjType = (ObjSize == 1 ? MVT::i8 : |
| 2520 | (ObjSize == 2 ? MVT::i16 : MVT::i32)); |
| 2521 | Store = DAG.getTruncStore(Val.getValue(1), dl, Val, FIN, |
Hal Finkel | 3e4a34c | 2014-01-21 20:15:58 +0000 | [diff] [blame] | 2522 | MachinePointerInfo(FuncArg), |
Bill Schmidt | 6ed3b99 | 2012-10-25 13:38:09 +0000 | [diff] [blame] | 2523 | ObjType, false, false, 0); |
| 2524 | } else { |
| 2525 | // For sizes that don't fit a truncating store (3, 5, 6, 7), |
| 2526 | // store the whole register as-is to the parameter save area |
| 2527 | // slot. The address of the parameter was already calculated |
| 2528 | // above (InVals.push_back(FIN)) to be the right-justified |
| 2529 | // offset within the slot. For this store, we need a new |
| 2530 | // frame index that points at the beginning of the slot. |
| 2531 | int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset, true); |
| 2532 | SDValue FIN = DAG.getFrameIndex(FI, PtrVT); |
| 2533 | Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, |
Hal Finkel | 3e4a34c | 2014-01-21 20:15:58 +0000 | [diff] [blame] | 2534 | MachinePointerInfo(FuncArg), |
Bill Schmidt | 6ed3b99 | 2012-10-25 13:38:09 +0000 | [diff] [blame] | 2535 | false, false, 0); |
| 2536 | } |
| 2537 | |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2538 | MemOps.push_back(Store); |
| 2539 | ++GPR_idx; |
| 2540 | } |
Bill Schmidt | 6ed3b99 | 2012-10-25 13:38:09 +0000 | [diff] [blame] | 2541 | // Whether we copied from a register or not, advance the offset |
| 2542 | // into the parameter save area by a full doubleword. |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2543 | ArgOffset += PtrByteSize; |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2544 | continue; |
| 2545 | } |
Bill Schmidt | 6ed3b99 | 2012-10-25 13:38:09 +0000 | [diff] [blame] | 2546 | |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2547 | for (unsigned j = 0; j < ArgSize; j += PtrByteSize) { |
| 2548 | // Store whatever pieces of the object are in registers |
| 2549 | // to memory. ArgOffset will be the address of the beginning |
| 2550 | // of the object. |
| 2551 | if (GPR_idx != Num_GPR_Regs) { |
| 2552 | unsigned VReg; |
| 2553 | VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); |
| 2554 | int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset, true); |
| 2555 | SDValue FIN = DAG.getFrameIndex(FI, PtrVT); |
| 2556 | SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); |
Bill Schmidt | 6ed3b99 | 2012-10-25 13:38:09 +0000 | [diff] [blame] | 2557 | SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, |
Hal Finkel | 3e4a34c | 2014-01-21 20:15:58 +0000 | [diff] [blame] | 2558 | MachinePointerInfo(FuncArg, j), |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2559 | false, false, 0); |
| 2560 | MemOps.push_back(Store); |
| 2561 | ++GPR_idx; |
| 2562 | ArgOffset += PtrByteSize; |
| 2563 | } else { |
Bill Schmidt | 48081ca | 2012-10-16 13:30:53 +0000 | [diff] [blame] | 2564 | ArgOffset += ArgSize - j; |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2565 | break; |
| 2566 | } |
| 2567 | } |
| 2568 | continue; |
| 2569 | } |
| 2570 | |
| 2571 | switch (ObjectVT.getSimpleVT().SimpleTy) { |
| 2572 | default: llvm_unreachable("Unhandled argument type!"); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 2573 | case MVT::i1: |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2574 | case MVT::i32: |
| 2575 | case MVT::i64: |
| 2576 | if (GPR_idx != Num_GPR_Regs) { |
| 2577 | unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); |
| 2578 | ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i64); |
| 2579 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 2580 | if (ObjectVT == MVT::i32 || ObjectVT == MVT::i1) |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2581 | // PPC64 passes i8, i16, and i32 values in i64 registers. Promote |
| 2582 | // value to MVT::i64 and then truncate to the correct register size. |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 2583 | ArgVal = extendArgForPPC64(Flags, ObjectVT, DAG, ArgVal, dl); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2584 | |
| 2585 | ++GPR_idx; |
| 2586 | } else { |
| 2587 | needsLoad = true; |
| 2588 | ArgSize = PtrByteSize; |
| 2589 | } |
| 2590 | ArgOffset += 8; |
| 2591 | break; |
| 2592 | |
| 2593 | case MVT::f32: |
| 2594 | case MVT::f64: |
| 2595 | // Every 8 bytes of argument space consumes one of the GPRs available for |
| 2596 | // argument passing. |
| 2597 | if (GPR_idx != Num_GPR_Regs) { |
| 2598 | ++GPR_idx; |
| 2599 | } |
| 2600 | if (FPR_idx != Num_FPR_Regs) { |
| 2601 | unsigned VReg; |
| 2602 | |
| 2603 | if (ObjectVT == MVT::f32) |
| 2604 | VReg = MF.addLiveIn(FPR[FPR_idx], &PPC::F4RCRegClass); |
| 2605 | else |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 2606 | VReg = MF.addLiveIn(FPR[FPR_idx], Subtarget.hasVSX() ? |
Hal Finkel | 19be506 | 2014-03-29 05:29:01 +0000 | [diff] [blame] | 2607 | &PPC::VSFRCRegClass : |
| 2608 | &PPC::F8RCRegClass); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2609 | |
| 2610 | ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT); |
| 2611 | ++FPR_idx; |
| 2612 | } else { |
| 2613 | needsLoad = true; |
Bill Schmidt | 2216247 | 2012-10-11 15:38:20 +0000 | [diff] [blame] | 2614 | ArgSize = PtrByteSize; |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2615 | } |
| 2616 | |
| 2617 | ArgOffset += 8; |
| 2618 | break; |
| 2619 | case MVT::v4f32: |
| 2620 | case MVT::v4i32: |
| 2621 | case MVT::v8i16: |
| 2622 | case MVT::v16i8: |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 2623 | case MVT::v2f64: |
Hal Finkel | a6c8b51 | 2014-03-26 16:12:58 +0000 | [diff] [blame] | 2624 | case MVT::v2i64: |
Ulrich Weigand | 9ba552d | 2014-06-23 12:36:34 +0000 | [diff] [blame] | 2625 | // Vectors are aligned to a 16-byte boundary in the argument save area. |
| 2626 | while ((ArgOffset % 16) != 0) { |
| 2627 | ArgOffset += PtrByteSize; |
| 2628 | if (GPR_idx != Num_GPR_Regs) |
| 2629 | GPR_idx++; |
| 2630 | } |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2631 | if (VR_idx != Num_VR_Regs) { |
Hal Finkel | 7811c61 | 2014-03-28 19:58:11 +0000 | [diff] [blame] | 2632 | unsigned VReg = (ObjectVT == MVT::v2f64 || ObjectVT == MVT::v2i64) ? |
| 2633 | MF.addLiveIn(VSRH[VR_idx], &PPC::VSHRCRegClass) : |
| 2634 | MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2635 | ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2636 | ++VR_idx; |
| 2637 | } else { |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2638 | CurArgOffset = ArgOffset; |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2639 | needsLoad = true; |
| 2640 | } |
Ulrich Weigand | 9ba552d | 2014-06-23 12:36:34 +0000 | [diff] [blame] | 2641 | ArgOffset += 16; |
| 2642 | GPR_idx = std::min(GPR_idx + 2, Num_GPR_Regs); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2643 | break; |
| 2644 | } |
| 2645 | |
| 2646 | // We need to load the argument to a virtual register if we determined |
| 2647 | // above that we ran out of physical registers of the appropriate type. |
| 2648 | if (needsLoad) { |
Ulrich Weigand | 59c6ab2 | 2014-06-20 16:34:05 +0000 | [diff] [blame] | 2649 | if (ObjSize < ArgSize && !isLittleEndian) |
| 2650 | CurArgOffset += ArgSize - ObjSize; |
| 2651 | int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset, isImmutable); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2652 | SDValue FIN = DAG.getFrameIndex(FI, PtrVT); |
| 2653 | ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, MachinePointerInfo(), |
| 2654 | false, false, false, 0); |
| 2655 | } |
| 2656 | |
| 2657 | InVals.push_back(ArgVal); |
| 2658 | } |
| 2659 | |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 2660 | // Area that is at least reserved in the caller of this function. |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 2661 | MinReservedArea = std::max(MinReservedArea, LinkageSize + 8 * PtrByteSize); |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 2662 | |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2663 | // Set the size that is at least reserved in caller of this function. Tail |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 2664 | // call optimized functions' reserved stack space needs to be aligned so that |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2665 | // taking the difference between two stack areas will result in an aligned |
| 2666 | // stack. |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 2667 | MinReservedArea = EnsureStackAlignment(MF.getTarget(), MinReservedArea); |
| 2668 | FuncInfo->setMinReservedArea(MinReservedArea); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2669 | |
| 2670 | // If the function takes variable number of arguments, make a frame index for |
| 2671 | // the start of the first vararg value... for expansion of llvm.va_start. |
| 2672 | if (isVarArg) { |
| 2673 | int Depth = ArgOffset; |
| 2674 | |
| 2675 | FuncInfo->setVarArgsFrameIndex( |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 2676 | MFI->CreateFixedObject(PtrByteSize, Depth, true)); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2677 | SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT); |
| 2678 | |
| 2679 | // If this function is vararg, store any remaining integer argument regs |
| 2680 | // to their spots on the stack so that they may be loaded by deferencing the |
| 2681 | // result of va_next. |
| 2682 | for (; GPR_idx != Num_GPR_Regs; ++GPR_idx) { |
| 2683 | unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); |
| 2684 | SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); |
| 2685 | SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, |
| 2686 | MachinePointerInfo(), false, false, 0); |
| 2687 | MemOps.push_back(Store); |
| 2688 | // Increment the address by four for the next argument to store |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 2689 | SDValue PtrOff = DAG.getConstant(PtrByteSize, PtrVT); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2690 | FIN = DAG.getNode(ISD::ADD, dl, PtrOff.getValueType(), FIN, PtrOff); |
| 2691 | } |
| 2692 | } |
| 2693 | |
| 2694 | if (!MemOps.empty()) |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 2695 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2696 | |
| 2697 | return Chain; |
| 2698 | } |
| 2699 | |
| 2700 | SDValue |
| 2701 | PPCTargetLowering::LowerFormalArguments_Darwin( |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2702 | SDValue Chain, |
Sandeep Patel | 68c5f47 | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 2703 | CallingConv::ID CallConv, bool isVarArg, |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2704 | const SmallVectorImpl<ISD::InputArg> |
| 2705 | &Ins, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 2706 | SDLoc dl, SelectionDAG &DAG, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 2707 | SmallVectorImpl<SDValue> &InVals) const { |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2708 | // TODO: add description of PPC stack frame format, or at least some docs. |
| 2709 | // |
| 2710 | MachineFunction &MF = DAG.getMachineFunction(); |
| 2711 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 2712 | PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2713 | |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 2714 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2715 | bool isPPC64 = PtrVT == MVT::i64; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 2716 | // Potential tail calls could cause overwriting of argument stack slots. |
Nick Lewycky | 50f02cb | 2011-12-02 22:16:29 +0000 | [diff] [blame] | 2717 | bool isImmutable = !(getTargetMachine().Options.GuaranteedTailCallOpt && |
| 2718 | (CallConv == CallingConv::Fast)); |
Jim Laskey | f4e2e00 | 2006-11-28 14:53:52 +0000 | [diff] [blame] | 2719 | unsigned PtrByteSize = isPPC64 ? 8 : 4; |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 2720 | |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 2721 | unsigned LinkageSize = PPCFrameLowering::getLinkageSize(isPPC64, true); |
| 2722 | unsigned ArgOffset = LinkageSize; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 2723 | // Area that is at least reserved in caller of this function. |
| 2724 | unsigned MinReservedArea = ArgOffset; |
| 2725 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2726 | static const MCPhysReg GPR_32[] = { // 32-bit registers. |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2727 | PPC::R3, PPC::R4, PPC::R5, PPC::R6, |
| 2728 | PPC::R7, PPC::R8, PPC::R9, PPC::R10, |
| 2729 | }; |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2730 | static const MCPhysReg GPR_64[] = { // 64-bit registers. |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 2731 | PPC::X3, PPC::X4, PPC::X5, PPC::X6, |
| 2732 | PPC::X7, PPC::X8, PPC::X9, PPC::X10, |
| 2733 | }; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2734 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2735 | static const MCPhysReg *FPR = GetFPR(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2736 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2737 | static const MCPhysReg VR[] = { |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2738 | PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, |
| 2739 | PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 |
| 2740 | }; |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 2741 | |
Owen Anderson | e2f23a3 | 2007-09-07 04:06:50 +0000 | [diff] [blame] | 2742 | const unsigned Num_GPR_Regs = array_lengthof(GPR_32); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 2743 | const unsigned Num_FPR_Regs = 13; |
Owen Anderson | e2f23a3 | 2007-09-07 04:06:50 +0000 | [diff] [blame] | 2744 | const unsigned Num_VR_Regs = array_lengthof( VR); |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 2745 | |
| 2746 | unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2747 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 2748 | const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2749 | |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2750 | // In 32-bit non-varargs functions, the stack space for vectors is after the |
| 2751 | // stack space for non-vectors. We do not use this space unless we have |
| 2752 | // too many vectors to fit in registers, something that only occurs in |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2753 | // constructed examples:), but we have to walk the arglist to figure |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2754 | // that out...for the pathological case, compute VecArgOffset as the |
| 2755 | // start of the vector parameter area. Computing VecArgOffset is the |
| 2756 | // entire point of the following loop. |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2757 | unsigned VecArgOffset = ArgOffset; |
| 2758 | if (!isVarArg && !isPPC64) { |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2759 | for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2760 | ++ArgNo) { |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 2761 | EVT ObjectVT = Ins[ArgNo].VT; |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2762 | ISD::ArgFlagsTy Flags = Ins[ArgNo].Flags; |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2763 | |
Duncan Sands | d97eea3 | 2008-03-21 09:14:45 +0000 | [diff] [blame] | 2764 | if (Flags.isByVal()) { |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2765 | // ObjSize is the true size, ArgSize rounded up to multiple of regs. |
Benjamin Kramer | 084b9f4 | 2012-01-20 14:42:32 +0000 | [diff] [blame] | 2766 | unsigned ObjSize = Flags.getByValSize(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2767 | unsigned ArgSize = |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2768 | ((ObjSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; |
| 2769 | VecArgOffset += ArgSize; |
| 2770 | continue; |
| 2771 | } |
| 2772 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2773 | switch(ObjectVT.getSimpleVT().SimpleTy) { |
Torok Edwin | fbcc663 | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 2774 | default: llvm_unreachable("Unhandled argument type!"); |
Hal Finkel | 5cae216 | 2014-02-28 01:17:25 +0000 | [diff] [blame] | 2775 | case MVT::i1: |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2776 | case MVT::i32: |
| 2777 | case MVT::f32: |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 2778 | VecArgOffset += 4; |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2779 | break; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2780 | case MVT::i64: // PPC64 |
| 2781 | case MVT::f64: |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 2782 | // FIXME: We are guaranteed to be !isPPC64 at this point. |
| 2783 | // Does MVT::i64 apply? |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2784 | VecArgOffset += 8; |
| 2785 | break; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2786 | case MVT::v4f32: |
| 2787 | case MVT::v4i32: |
| 2788 | case MVT::v8i16: |
| 2789 | case MVT::v16i8: |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2790 | // Nothing to do, we're only looking at Nonvector args here. |
| 2791 | break; |
| 2792 | } |
| 2793 | } |
| 2794 | } |
| 2795 | // We've found where the vector parameter area in memory is. Skip the |
| 2796 | // first 12 parameters; these don't use that memory. |
| 2797 | VecArgOffset = ((VecArgOffset+15)/16)*16; |
| 2798 | VecArgOffset += 12*16; |
| 2799 | |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2800 | // Add DAG nodes to load the arguments or copy them out of registers. On |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 2801 | // entry to a function on PPC, the arguments start after the linkage area, |
| 2802 | // although the first ones are often in registers. |
Nicolas Geoffray | 7aad928 | 2007-03-13 15:02:46 +0000 | [diff] [blame] | 2803 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2804 | SmallVector<SDValue, 8> MemOps; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 2805 | unsigned nAltivecParamsAtEnd = 0; |
Roman Divacky | ca10389 | 2012-09-24 20:47:19 +0000 | [diff] [blame] | 2806 | Function::const_arg_iterator FuncArg = MF.getFunction()->arg_begin(); |
Bill Schmidt | 38b6cb5 | 2013-05-08 17:22:33 +0000 | [diff] [blame] | 2807 | unsigned CurArgIdx = 0; |
| 2808 | for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2809 | SDValue ArgVal; |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2810 | bool needsLoad = false; |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 2811 | EVT ObjectVT = Ins[ArgNo].VT; |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 2812 | unsigned ObjSize = ObjectVT.getSizeInBits()/8; |
Jim Laskey | 152671f | 2006-11-29 13:37:09 +0000 | [diff] [blame] | 2813 | unsigned ArgSize = ObjSize; |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2814 | ISD::ArgFlagsTy Flags = Ins[ArgNo].Flags; |
Bill Schmidt | 38b6cb5 | 2013-05-08 17:22:33 +0000 | [diff] [blame] | 2815 | std::advance(FuncArg, Ins[ArgNo].OrigArgIndex - CurArgIdx); |
| 2816 | CurArgIdx = Ins[ArgNo].OrigArgIndex; |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2817 | |
Chris Lattner | 318f0d2 | 2006-05-16 18:51:52 +0000 | [diff] [blame] | 2818 | unsigned CurArgOffset = ArgOffset; |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 2819 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 2820 | // Varargs or 64 bit Altivec parameters are padded to a 16 byte boundary. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2821 | if (ObjectVT==MVT::v4f32 || ObjectVT==MVT::v4i32 || |
| 2822 | ObjectVT==MVT::v8i16 || ObjectVT==MVT::v16i8) { |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 2823 | if (isVarArg || isPPC64) { |
| 2824 | MinReservedArea = ((MinReservedArea+15)/16)*16; |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2825 | MinReservedArea += CalculateStackSlotSize(ObjectVT, |
Dan Gohman | d3fe174 | 2008-09-13 01:54:27 +0000 | [diff] [blame] | 2826 | Flags, |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 2827 | PtrByteSize); |
| 2828 | } else nAltivecParamsAtEnd++; |
| 2829 | } else |
| 2830 | // Calculate min reserved area. |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2831 | MinReservedArea += CalculateStackSlotSize(Ins[ArgNo].VT, |
Dan Gohman | d3fe174 | 2008-09-13 01:54:27 +0000 | [diff] [blame] | 2832 | Flags, |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 2833 | PtrByteSize); |
| 2834 | |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 2835 | // FIXME the codegen can be much improved in some cases. |
| 2836 | // We do not have to keep everything in memory. |
Duncan Sands | d97eea3 | 2008-03-21 09:14:45 +0000 | [diff] [blame] | 2837 | if (Flags.isByVal()) { |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 2838 | // ObjSize is the true size, ArgSize rounded up to multiple of registers. |
Duncan Sands | d97eea3 | 2008-03-21 09:14:45 +0000 | [diff] [blame] | 2839 | ObjSize = Flags.getByValSize(); |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 2840 | ArgSize = ((ObjSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2841 | // Objects of size 1 and 2 are right justified, everything else is |
| 2842 | // left justified. This means the memory address is adjusted forwards. |
Dale Johannesen | 21a8f14 | 2008-03-08 01:41:42 +0000 | [diff] [blame] | 2843 | if (ObjSize==1 || ObjSize==2) { |
| 2844 | CurArgOffset = CurArgOffset + (4 - ObjSize); |
| 2845 | } |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 2846 | // The value of the object is its address. |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 2847 | int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset, true); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2848 | SDValue FIN = DAG.getFrameIndex(FI, PtrVT); |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2849 | InVals.push_back(FIN); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2850 | if (ObjSize==1 || ObjSize==2) { |
Dale Johannesen | 21a8f14 | 2008-03-08 01:41:42 +0000 | [diff] [blame] | 2851 | if (GPR_idx != Num_GPR_Regs) { |
Roman Divacky | d041962 | 2011-06-17 15:21:10 +0000 | [diff] [blame] | 2852 | unsigned VReg; |
| 2853 | if (isPPC64) |
| 2854 | VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); |
| 2855 | else |
| 2856 | VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2857 | SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 2858 | EVT ObjType = ObjSize == 1 ? MVT::i8 : MVT::i16; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2859 | SDValue Store = DAG.getTruncStore(Val.getValue(1), dl, Val, FIN, |
Hal Finkel | 3e4a34c | 2014-01-21 20:15:58 +0000 | [diff] [blame] | 2860 | MachinePointerInfo(FuncArg), |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 2861 | ObjType, false, false, 0); |
Dale Johannesen | 21a8f14 | 2008-03-08 01:41:42 +0000 | [diff] [blame] | 2862 | MemOps.push_back(Store); |
| 2863 | ++GPR_idx; |
Dale Johannesen | 21a8f14 | 2008-03-08 01:41:42 +0000 | [diff] [blame] | 2864 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2865 | |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 2866 | ArgOffset += PtrByteSize; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2867 | |
Dale Johannesen | 21a8f14 | 2008-03-08 01:41:42 +0000 | [diff] [blame] | 2868 | continue; |
| 2869 | } |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 2870 | for (unsigned j = 0; j < ArgSize; j += PtrByteSize) { |
| 2871 | // Store whatever pieces of the object are in registers |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 2872 | // to memory. ArgOffset will be the address of the beginning |
| 2873 | // of the object. |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 2874 | if (GPR_idx != Num_GPR_Regs) { |
Roman Divacky | d041962 | 2011-06-17 15:21:10 +0000 | [diff] [blame] | 2875 | unsigned VReg; |
| 2876 | if (isPPC64) |
| 2877 | VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); |
| 2878 | else |
| 2879 | VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 2880 | int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset, true); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2881 | SDValue FIN = DAG.getFrameIndex(FI, PtrVT); |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2882 | SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); |
Bill Schmidt | d1fa36f | 2012-10-05 21:27:08 +0000 | [diff] [blame] | 2883 | SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, |
Hal Finkel | 3e4a34c | 2014-01-21 20:15:58 +0000 | [diff] [blame] | 2884 | MachinePointerInfo(FuncArg, j), |
David Greene | 87a5abe | 2010-02-15 16:56:53 +0000 | [diff] [blame] | 2885 | false, false, 0); |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 2886 | MemOps.push_back(Store); |
| 2887 | ++GPR_idx; |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 2888 | ArgOffset += PtrByteSize; |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 2889 | } else { |
| 2890 | ArgOffset += ArgSize - (ArgOffset-CurArgOffset); |
| 2891 | break; |
| 2892 | } |
| 2893 | } |
| 2894 | continue; |
| 2895 | } |
| 2896 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2897 | switch (ObjectVT.getSimpleVT().SimpleTy) { |
Torok Edwin | fbcc663 | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 2898 | default: llvm_unreachable("Unhandled argument type!"); |
Hal Finkel | 5cae216 | 2014-02-28 01:17:25 +0000 | [diff] [blame] | 2899 | case MVT::i1: |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2900 | case MVT::i32: |
Bill Wendling | 968f32c | 2008-03-07 20:49:02 +0000 | [diff] [blame] | 2901 | if (!isPPC64) { |
Bill Wendling | 968f32c | 2008-03-07 20:49:02 +0000 | [diff] [blame] | 2902 | if (GPR_idx != Num_GPR_Regs) { |
Devang Patel | f3292b2 | 2011-02-21 23:21:26 +0000 | [diff] [blame] | 2903 | unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2904 | ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); |
Hal Finkel | 7f908e8 | 2014-03-06 00:45:19 +0000 | [diff] [blame] | 2905 | |
| 2906 | if (ObjectVT == MVT::i1) |
| 2907 | ArgVal = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, ArgVal); |
| 2908 | |
Bill Wendling | 968f32c | 2008-03-07 20:49:02 +0000 | [diff] [blame] | 2909 | ++GPR_idx; |
| 2910 | } else { |
| 2911 | needsLoad = true; |
| 2912 | ArgSize = PtrByteSize; |
| 2913 | } |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 2914 | // All int arguments reserve stack space in the Darwin ABI. |
| 2915 | ArgOffset += PtrByteSize; |
Bill Wendling | 968f32c | 2008-03-07 20:49:02 +0000 | [diff] [blame] | 2916 | break; |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2917 | } |
Bill Wendling | 968f32c | 2008-03-07 20:49:02 +0000 | [diff] [blame] | 2918 | // FALLTHROUGH |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2919 | case MVT::i64: // PPC64 |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 2920 | if (GPR_idx != Num_GPR_Regs) { |
Devang Patel | f3292b2 | 2011-02-21 23:21:26 +0000 | [diff] [blame] | 2921 | unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2922 | ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i64); |
Bill Wendling | 968f32c | 2008-03-07 20:49:02 +0000 | [diff] [blame] | 2923 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 2924 | if (ObjectVT == MVT::i32 || ObjectVT == MVT::i1) |
Bill Wendling | 968f32c | 2008-03-07 20:49:02 +0000 | [diff] [blame] | 2925 | // PPC64 passes i8, i16, and i32 values in i64 registers. Promote |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2926 | // value to MVT::i64 and then truncate to the correct register size. |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 2927 | ArgVal = extendArgForPPC64(Flags, ObjectVT, DAG, ArgVal, dl); |
Bill Wendling | 968f32c | 2008-03-07 20:49:02 +0000 | [diff] [blame] | 2928 | |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 2929 | ++GPR_idx; |
| 2930 | } else { |
| 2931 | needsLoad = true; |
Evan Cheng | 0f0aee2 | 2008-07-24 08:17:07 +0000 | [diff] [blame] | 2932 | ArgSize = PtrByteSize; |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 2933 | } |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 2934 | // All int arguments reserve stack space in the Darwin ABI. |
| 2935 | ArgOffset += 8; |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 2936 | break; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2937 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2938 | case MVT::f32: |
| 2939 | case MVT::f64: |
Chris Lattner | 318f0d2 | 2006-05-16 18:51:52 +0000 | [diff] [blame] | 2940 | // Every 4 bytes of argument space consumes one of the GPRs available for |
| 2941 | // argument passing. |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 2942 | if (GPR_idx != Num_GPR_Regs) { |
Chris Lattner | 26e2fcd | 2006-05-16 18:58:15 +0000 | [diff] [blame] | 2943 | ++GPR_idx; |
Chris Lattner | 2cca385 | 2006-11-18 01:57:19 +0000 | [diff] [blame] | 2944 | if (ObjSize == 8 && GPR_idx != Num_GPR_Regs && !isPPC64) |
Chris Lattner | 26e2fcd | 2006-05-16 18:58:15 +0000 | [diff] [blame] | 2945 | ++GPR_idx; |
Chris Lattner | 318f0d2 | 2006-05-16 18:51:52 +0000 | [diff] [blame] | 2946 | } |
Chris Lattner | 26e2fcd | 2006-05-16 18:58:15 +0000 | [diff] [blame] | 2947 | if (FPR_idx != Num_FPR_Regs) { |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2948 | unsigned VReg; |
Tilmann Scheller | 98bdaaa | 2009-07-03 06:43:35 +0000 | [diff] [blame] | 2949 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2950 | if (ObjectVT == MVT::f32) |
Devang Patel | f3292b2 | 2011-02-21 23:21:26 +0000 | [diff] [blame] | 2951 | VReg = MF.addLiveIn(FPR[FPR_idx], &PPC::F4RCRegClass); |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2952 | else |
Devang Patel | f3292b2 | 2011-02-21 23:21:26 +0000 | [diff] [blame] | 2953 | VReg = MF.addLiveIn(FPR[FPR_idx], &PPC::F8RCRegClass); |
Tilmann Scheller | 98bdaaa | 2009-07-03 06:43:35 +0000 | [diff] [blame] | 2954 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2955 | ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT); |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2956 | ++FPR_idx; |
| 2957 | } else { |
| 2958 | needsLoad = true; |
| 2959 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2960 | |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 2961 | // All FP arguments reserve stack space in the Darwin ABI. |
| 2962 | ArgOffset += isPPC64 ? 8 : ObjSize; |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2963 | break; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 2964 | case MVT::v4f32: |
| 2965 | case MVT::v4i32: |
| 2966 | case MVT::v8i16: |
| 2967 | case MVT::v16i8: |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 2968 | // Note that vector arguments in registers don't reserve stack space, |
| 2969 | // except in varargs functions. |
Chris Lattner | 26e2fcd | 2006-05-16 18:58:15 +0000 | [diff] [blame] | 2970 | if (VR_idx != Num_VR_Regs) { |
Devang Patel | f3292b2 | 2011-02-21 23:21:26 +0000 | [diff] [blame] | 2971 | unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass); |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2972 | ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT); |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 2973 | if (isVarArg) { |
| 2974 | while ((ArgOffset % 16) != 0) { |
| 2975 | ArgOffset += PtrByteSize; |
| 2976 | if (GPR_idx != Num_GPR_Regs) |
| 2977 | GPR_idx++; |
| 2978 | } |
| 2979 | ArgOffset += 16; |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 2980 | GPR_idx = std::min(GPR_idx+4, Num_GPR_Regs); // FIXME correct for ppc64? |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 2981 | } |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2982 | ++VR_idx; |
| 2983 | } else { |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 2984 | if (!isVarArg && !isPPC64) { |
| 2985 | // Vectors go after all the nonvectors. |
| 2986 | CurArgOffset = VecArgOffset; |
| 2987 | VecArgOffset += 16; |
| 2988 | } else { |
| 2989 | // Vectors are aligned. |
| 2990 | ArgOffset = ((ArgOffset+15)/16)*16; |
| 2991 | CurArgOffset = ArgOffset; |
| 2992 | ArgOffset += 16; |
Dale Johannesen | 0d98256 | 2008-03-12 00:49:20 +0000 | [diff] [blame] | 2993 | } |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2994 | needsLoad = true; |
| 2995 | } |
| 2996 | break; |
| 2997 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 2998 | |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 2999 | // We need to load the argument to a virtual register if we determined above |
Chris Lattner | f6518cf | 2008-02-13 07:35:30 +0000 | [diff] [blame] | 3000 | // that we ran out of physical registers of the appropriate type. |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 3001 | if (needsLoad) { |
Chris Lattner | f6518cf | 2008-02-13 07:35:30 +0000 | [diff] [blame] | 3002 | int FI = MFI->CreateFixedObject(ObjSize, |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3003 | CurArgOffset + (ArgSize - ObjSize), |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 3004 | isImmutable); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3005 | SDValue FIN = DAG.getFrameIndex(FI, PtrVT); |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 3006 | ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 3007 | false, false, false, 0); |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 3008 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 3009 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3010 | InVals.push_back(ArgVal); |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 3011 | } |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 3012 | |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 3013 | // Allow for Altivec parameters at the end, if needed. |
| 3014 | if (nAltivecParamsAtEnd) { |
| 3015 | MinReservedArea = ((MinReservedArea+15)/16)*16; |
| 3016 | MinReservedArea += 16*nAltivecParamsAtEnd; |
| 3017 | } |
| 3018 | |
| 3019 | // Area that is at least reserved in the caller of this function. |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 3020 | MinReservedArea = std::max(MinReservedArea, LinkageSize + 8 * PtrByteSize); |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 3021 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3022 | // Set the size that is at least reserved in caller of this function. Tail |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3023 | // call optimized functions' reserved stack space needs to be aligned so that |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3024 | // taking the difference between two stack areas will result in an aligned |
| 3025 | // stack. |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 3026 | MinReservedArea = EnsureStackAlignment(MF.getTarget(), MinReservedArea); |
| 3027 | FuncInfo->setMinReservedArea(MinReservedArea); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3028 | |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 3029 | // If the function takes variable number of arguments, make a frame index for |
| 3030 | // the start of the first vararg value... for expansion of llvm.va_start. |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 3031 | if (isVarArg) { |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3032 | int Depth = ArgOffset; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 3033 | |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 3034 | FuncInfo->setVarArgsFrameIndex( |
| 3035 | MFI->CreateFixedObject(PtrVT.getSizeInBits()/8, |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 3036 | Depth, true)); |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 3037 | SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 3038 | |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 3039 | // If this function is vararg, store any remaining integer argument regs |
| 3040 | // to their spots on the stack so that they may be loaded by deferencing the |
| 3041 | // result of va_next. |
Chris Lattner | 26e2fcd | 2006-05-16 18:58:15 +0000 | [diff] [blame] | 3042 | for (; GPR_idx != Num_GPR_Regs; ++GPR_idx) { |
Chris Lattner | 2cca385 | 2006-11-18 01:57:19 +0000 | [diff] [blame] | 3043 | unsigned VReg; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3044 | |
Chris Lattner | 2cca385 | 2006-11-18 01:57:19 +0000 | [diff] [blame] | 3045 | if (isPPC64) |
Devang Patel | f3292b2 | 2011-02-21 23:21:26 +0000 | [diff] [blame] | 3046 | VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); |
Chris Lattner | 2cca385 | 2006-11-18 01:57:19 +0000 | [diff] [blame] | 3047 | else |
Devang Patel | f3292b2 | 2011-02-21 23:21:26 +0000 | [diff] [blame] | 3048 | VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); |
Chris Lattner | 2cca385 | 2006-11-18 01:57:19 +0000 | [diff] [blame] | 3049 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3050 | SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 3051 | SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, |
| 3052 | MachinePointerInfo(), false, false, 0); |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 3053 | MemOps.push_back(Store); |
| 3054 | // Increment the address by four for the next argument to store |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3055 | SDValue PtrOff = DAG.getConstant(PtrVT.getSizeInBits()/8, PtrVT); |
Dale Johannesen | 679073b | 2009-02-04 02:34:38 +0000 | [diff] [blame] | 3056 | FIN = DAG.getNode(ISD::ADD, dl, PtrOff.getValueType(), FIN, PtrOff); |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 3057 | } |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 3058 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 3059 | |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 3060 | if (!MemOps.empty()) |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 3061 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 3062 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3063 | return Chain; |
Chris Lattner | 4302e8f | 2006-05-16 18:18:50 +0000 | [diff] [blame] | 3064 | } |
| 3065 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3066 | /// CalculateTailCallSPDiff - Get the amount the stack pointer has to be |
Chris Lattner | 0ab5e2c | 2011-04-15 05:18:47 +0000 | [diff] [blame] | 3067 | /// adjusted to accommodate the arguments for the tailcall. |
Dale Johannesen | 86dcae1 | 2009-11-24 01:09:07 +0000 | [diff] [blame] | 3068 | static int CalculateTailCallSPDiff(SelectionDAG& DAG, bool isTailCall, |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3069 | unsigned ParamSize) { |
| 3070 | |
Dale Johannesen | 86dcae1 | 2009-11-24 01:09:07 +0000 | [diff] [blame] | 3071 | if (!isTailCall) return 0; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3072 | |
| 3073 | PPCFunctionInfo *FI = DAG.getMachineFunction().getInfo<PPCFunctionInfo>(); |
| 3074 | unsigned CallerMinReservedArea = FI->getMinReservedArea(); |
| 3075 | int SPDiff = (int)CallerMinReservedArea - (int)ParamSize; |
| 3076 | // Remember only if the new adjustement is bigger. |
| 3077 | if (SPDiff < FI->getTailCallSPDelta()) |
| 3078 | FI->setTailCallSPDelta(SPDiff); |
| 3079 | |
| 3080 | return SPDiff; |
| 3081 | } |
| 3082 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3083 | /// IsEligibleForTailCallOptimization - Check whether the call is eligible |
| 3084 | /// for tail call optimization. Targets which want to do tail call |
| 3085 | /// optimization should implement this function. |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3086 | bool |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3087 | PPCTargetLowering::IsEligibleForTailCallOptimization(SDValue Callee, |
Sandeep Patel | 68c5f47 | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 3088 | CallingConv::ID CalleeCC, |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3089 | bool isVarArg, |
| 3090 | const SmallVectorImpl<ISD::InputArg> &Ins, |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3091 | SelectionDAG& DAG) const { |
Nick Lewycky | 50f02cb | 2011-12-02 22:16:29 +0000 | [diff] [blame] | 3092 | if (!getTargetMachine().Options.GuaranteedTailCallOpt) |
Evan Cheng | 25217ff | 2010-01-29 23:05:56 +0000 | [diff] [blame] | 3093 | return false; |
| 3094 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3095 | // Variable argument functions are not supported. |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3096 | if (isVarArg) |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 3097 | return false; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3098 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3099 | MachineFunction &MF = DAG.getMachineFunction(); |
Sandeep Patel | 68c5f47 | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 3100 | CallingConv::ID CallerCC = MF.getFunction()->getCallingConv(); |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3101 | if (CalleeCC == CallingConv::Fast && CallerCC == CalleeCC) { |
| 3102 | // Functions containing by val parameters are not supported. |
| 3103 | for (unsigned i = 0; i != Ins.size(); i++) { |
| 3104 | ISD::ArgFlagsTy Flags = Ins[i].Flags; |
| 3105 | if (Flags.isByVal()) return false; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3106 | } |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3107 | |
Alp Toker | f907b89 | 2013-12-05 05:44:44 +0000 | [diff] [blame] | 3108 | // Non-PIC/GOT tail calls are supported. |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3109 | if (getTargetMachine().getRelocationModel() != Reloc::PIC_) |
| 3110 | return true; |
| 3111 | |
| 3112 | // At the moment we can only do local tail calls (in same module, hidden |
| 3113 | // or protected) if we are generating PIC. |
| 3114 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) |
| 3115 | return G->getGlobal()->hasHiddenVisibility() |
| 3116 | || G->getGlobal()->hasProtectedVisibility(); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3117 | } |
| 3118 | |
| 3119 | return false; |
| 3120 | } |
| 3121 | |
Chris Lattner | eb755fc | 2006-05-17 19:00:46 +0000 | [diff] [blame] | 3122 | /// isCallCompatibleAddress - Return the immediate to use if the specified |
| 3123 | /// 32-bit value is representable in the immediate field of a BxA instruction. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3124 | static SDNode *isBLACompatibleAddress(SDValue Op, SelectionDAG &DAG) { |
Chris Lattner | eb755fc | 2006-05-17 19:00:46 +0000 | [diff] [blame] | 3125 | ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op); |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 3126 | if (!C) return nullptr; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 3127 | |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 3128 | int Addr = C->getZExtValue(); |
Chris Lattner | eb755fc | 2006-05-17 19:00:46 +0000 | [diff] [blame] | 3129 | if ((Addr & 3) != 0 || // Low 2 bits are implicitly zero. |
Richard Smith | 228e6d4 | 2012-08-24 23:29:28 +0000 | [diff] [blame] | 3130 | SignExtend32<26>(Addr) != Addr) |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 3131 | return nullptr; // Top 6 bits have to be sext of immediate. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 3132 | |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 3133 | return DAG.getConstant((int)C->getZExtValue() >> 2, |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 3134 | DAG.getTargetLoweringInfo().getPointerTy()).getNode(); |
Chris Lattner | eb755fc | 2006-05-17 19:00:46 +0000 | [diff] [blame] | 3135 | } |
| 3136 | |
Dan Gohman | d78c400 | 2008-05-13 00:00:25 +0000 | [diff] [blame] | 3137 | namespace { |
| 3138 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3139 | struct TailCallArgumentInfo { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3140 | SDValue Arg; |
| 3141 | SDValue FrameIdxOp; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3142 | int FrameIdx; |
| 3143 | |
| 3144 | TailCallArgumentInfo() : FrameIdx(0) {} |
| 3145 | }; |
| 3146 | |
Dan Gohman | d78c400 | 2008-05-13 00:00:25 +0000 | [diff] [blame] | 3147 | } |
| 3148 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3149 | /// StoreTailCallArgumentsToStackSlot - Stores arguments to their stack slot. |
| 3150 | static void |
| 3151 | StoreTailCallArgumentsToStackSlot(SelectionDAG &DAG, |
Evan Cheng | 0e9d9ca | 2009-10-18 18:16:27 +0000 | [diff] [blame] | 3152 | SDValue Chain, |
Craig Topper | b94011f | 2013-07-14 04:42:23 +0000 | [diff] [blame] | 3153 | const SmallVectorImpl<TailCallArgumentInfo> &TailCallArgs, |
| 3154 | SmallVectorImpl<SDValue> &MemOpChains, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3155 | SDLoc dl) { |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3156 | for (unsigned i = 0, e = TailCallArgs.size(); i != e; ++i) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3157 | SDValue Arg = TailCallArgs[i].Arg; |
| 3158 | SDValue FIN = TailCallArgs[i].FrameIdxOp; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3159 | int FI = TailCallArgs[i].FrameIdx; |
| 3160 | // Store relative to framepointer. |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 3161 | MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, FIN, |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 3162 | MachinePointerInfo::getFixedStack(FI), |
| 3163 | false, false, 0)); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3164 | } |
| 3165 | } |
| 3166 | |
| 3167 | /// EmitTailCallStoreFPAndRetAddr - Move the frame pointer and return address to |
| 3168 | /// the appropriate stack slot for the tail call optimized function call. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3169 | static SDValue EmitTailCallStoreFPAndRetAddr(SelectionDAG &DAG, |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3170 | MachineFunction &MF, |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3171 | SDValue Chain, |
| 3172 | SDValue OldRetAddr, |
| 3173 | SDValue OldFP, |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3174 | int SPDiff, |
| 3175 | bool isPPC64, |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3176 | bool isDarwinABI, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3177 | SDLoc dl) { |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3178 | if (SPDiff) { |
| 3179 | // Calculate the new stack slot for the return address. |
| 3180 | int SlotSize = isPPC64 ? 8 : 4; |
Anton Korobeynikov | 2f93128 | 2011-01-10 12:39:04 +0000 | [diff] [blame] | 3181 | int NewRetAddrLoc = SPDiff + PPCFrameLowering::getReturnSaveOffset(isPPC64, |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3182 | isDarwinABI); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3183 | int NewRetAddr = MF.getFrameInfo()->CreateFixedObject(SlotSize, |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 3184 | NewRetAddrLoc, true); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3185 | EVT VT = isPPC64 ? MVT::i64 : MVT::i32; |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3186 | SDValue NewRetAddrFrIdx = DAG.getFrameIndex(NewRetAddr, VT); |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 3187 | Chain = DAG.getStore(Chain, dl, OldRetAddr, NewRetAddrFrIdx, |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 3188 | MachinePointerInfo::getFixedStack(NewRetAddr), |
David Greene | 87a5abe | 2010-02-15 16:56:53 +0000 | [diff] [blame] | 3189 | false, false, 0); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3190 | |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 3191 | // When using the 32/64-bit SVR4 ABI there is no need to move the FP stack |
| 3192 | // slot as the FP is never overwritten. |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3193 | if (isDarwinABI) { |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3194 | int NewFPLoc = |
Anton Korobeynikov | 2f93128 | 2011-01-10 12:39:04 +0000 | [diff] [blame] | 3195 | SPDiff + PPCFrameLowering::getFramePointerSaveOffset(isPPC64, isDarwinABI); |
David Greene | 1fbe054 | 2009-11-12 20:49:22 +0000 | [diff] [blame] | 3196 | int NewFPIdx = MF.getFrameInfo()->CreateFixedObject(SlotSize, NewFPLoc, |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 3197 | true); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3198 | SDValue NewFramePtrIdx = DAG.getFrameIndex(NewFPIdx, VT); |
| 3199 | Chain = DAG.getStore(Chain, dl, OldFP, NewFramePtrIdx, |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 3200 | MachinePointerInfo::getFixedStack(NewFPIdx), |
David Greene | 87a5abe | 2010-02-15 16:56:53 +0000 | [diff] [blame] | 3201 | false, false, 0); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3202 | } |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3203 | } |
| 3204 | return Chain; |
| 3205 | } |
| 3206 | |
| 3207 | /// CalculateTailCallArgDest - Remember Argument for later processing. Calculate |
| 3208 | /// the position of the argument. |
| 3209 | static void |
| 3210 | CalculateTailCallArgDest(SelectionDAG &DAG, MachineFunction &MF, bool isPPC64, |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3211 | SDValue Arg, int SPDiff, unsigned ArgOffset, |
Craig Topper | b94011f | 2013-07-14 04:42:23 +0000 | [diff] [blame] | 3212 | SmallVectorImpl<TailCallArgumentInfo>& TailCallArguments) { |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3213 | int Offset = ArgOffset + SPDiff; |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 3214 | uint32_t OpSize = (Arg.getValueType().getSizeInBits()+7)/8; |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 3215 | int FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset, true); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3216 | EVT VT = isPPC64 ? MVT::i64 : MVT::i32; |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3217 | SDValue FIN = DAG.getFrameIndex(FI, VT); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3218 | TailCallArgumentInfo Info; |
| 3219 | Info.Arg = Arg; |
| 3220 | Info.FrameIdxOp = FIN; |
| 3221 | Info.FrameIdx = FI; |
| 3222 | TailCallArguments.push_back(Info); |
| 3223 | } |
| 3224 | |
| 3225 | /// EmitTCFPAndRetAddrLoad - Emit load from frame pointer and return address |
| 3226 | /// stack slot. Returns the chain as result and the loaded frame pointers in |
| 3227 | /// LROpOut/FPOpout. Used when tail calling. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3228 | SDValue PPCTargetLowering::EmitTailCallLoadFPAndRetAddr(SelectionDAG & DAG, |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 3229 | int SPDiff, |
| 3230 | SDValue Chain, |
| 3231 | SDValue &LROpOut, |
| 3232 | SDValue &FPOpOut, |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3233 | bool isDarwinABI, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3234 | SDLoc dl) const { |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3235 | if (SPDiff) { |
| 3236 | // Load the LR and FP stack slot for later adjusting. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 3237 | EVT VT = Subtarget.isPPC64() ? MVT::i64 : MVT::i32; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3238 | LROpOut = getReturnAddrFrameIndex(DAG); |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 3239 | LROpOut = DAG.getLoad(VT, dl, Chain, LROpOut, MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 3240 | false, false, false, 0); |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 3241 | Chain = SDValue(LROpOut.getNode(), 1); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3242 | |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 3243 | // When using the 32/64-bit SVR4 ABI there is no need to load the FP stack |
| 3244 | // slot as the FP is never overwritten. |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3245 | if (isDarwinABI) { |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3246 | FPOpOut = getFramePointerFrameIndex(DAG); |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 3247 | FPOpOut = DAG.getLoad(VT, dl, Chain, FPOpOut, MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 3248 | false, false, false, 0); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3249 | Chain = SDValue(FPOpOut.getNode(), 1); |
| 3250 | } |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3251 | } |
| 3252 | return Chain; |
| 3253 | } |
| 3254 | |
Dale Johannesen | 85d41a1 | 2008-03-04 23:17:14 +0000 | [diff] [blame] | 3255 | /// CreateCopyOfByValArgument - Make a copy of an aggregate at address specified |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 3256 | /// by "Src" to address "Dst" of size "Size". Alignment information is |
Dale Johannesen | 85d41a1 | 2008-03-04 23:17:14 +0000 | [diff] [blame] | 3257 | /// specified by the specific parameter attribute. The copy will be passed as |
| 3258 | /// a byval function parameter. |
| 3259 | /// Sometimes what we are copying is the end of a larger object, the part that |
| 3260 | /// does not fit in registers. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 3261 | static SDValue |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3262 | CreateCopyOfByValArgument(SDValue Src, SDValue Dst, SDValue Chain, |
Duncan Sands | d97eea3 | 2008-03-21 09:14:45 +0000 | [diff] [blame] | 3263 | ISD::ArgFlagsTy Flags, SelectionDAG &DAG, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3264 | SDLoc dl) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3265 | SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), MVT::i32); |
Dale Johannesen | 8526388 | 2009-02-04 01:17:06 +0000 | [diff] [blame] | 3266 | return DAG.getMemcpy(Chain, dl, Dst, Src, SizeNode, Flags.getByValAlign(), |
Nick Lewycky | aad475b | 2014-04-15 07:22:52 +0000 | [diff] [blame] | 3267 | false, false, MachinePointerInfo(), |
| 3268 | MachinePointerInfo()); |
Dale Johannesen | 85d41a1 | 2008-03-04 23:17:14 +0000 | [diff] [blame] | 3269 | } |
Chris Lattner | 43df5b3 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 3270 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3271 | /// LowerMemOpCallTo - Store the argument to the stack or remember it in case of |
| 3272 | /// tail calls. |
| 3273 | static void |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3274 | LowerMemOpCallTo(SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, |
| 3275 | SDValue Arg, SDValue PtrOff, int SPDiff, |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3276 | unsigned ArgOffset, bool isPPC64, bool isTailCall, |
Craig Topper | b94011f | 2013-07-14 04:42:23 +0000 | [diff] [blame] | 3277 | bool isVector, SmallVectorImpl<SDValue> &MemOpChains, |
| 3278 | SmallVectorImpl<TailCallArgumentInfo> &TailCallArguments, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3279 | SDLoc dl) { |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 3280 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3281 | if (!isTailCall) { |
| 3282 | if (isVector) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3283 | SDValue StackPtr; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3284 | if (isPPC64) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3285 | StackPtr = DAG.getRegister(PPC::X1, MVT::i64); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3286 | else |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3287 | StackPtr = DAG.getRegister(PPC::R1, MVT::i32); |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 3288 | PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3289 | DAG.getConstant(ArgOffset, PtrVT)); |
| 3290 | } |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 3291 | MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, |
| 3292 | MachinePointerInfo(), false, false, 0)); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 3293 | // Calculate and remember argument location. |
| 3294 | } else CalculateTailCallArgDest(DAG, MF, isPPC64, Arg, SPDiff, ArgOffset, |
| 3295 | TailCallArguments); |
| 3296 | } |
| 3297 | |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3298 | static |
| 3299 | void PrepareTailCall(SelectionDAG &DAG, SDValue &InFlag, SDValue &Chain, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3300 | SDLoc dl, bool isPPC64, int SPDiff, unsigned NumBytes, |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3301 | SDValue LROp, SDValue FPOp, bool isDarwinABI, |
Craig Topper | b94011f | 2013-07-14 04:42:23 +0000 | [diff] [blame] | 3302 | SmallVectorImpl<TailCallArgumentInfo> &TailCallArguments) { |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3303 | MachineFunction &MF = DAG.getMachineFunction(); |
| 3304 | |
| 3305 | // Emit a sequence of copyto/copyfrom virtual registers for arguments that |
| 3306 | // might overwrite each other in case of tail call optimization. |
| 3307 | SmallVector<SDValue, 8> MemOpChains2; |
Chris Lattner | 0ab5e2c | 2011-04-15 05:18:47 +0000 | [diff] [blame] | 3308 | // Do not flag preceding copytoreg stuff together with the following stuff. |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3309 | InFlag = SDValue(); |
| 3310 | StoreTailCallArgumentsToStackSlot(DAG, Chain, TailCallArguments, |
| 3311 | MemOpChains2, dl); |
| 3312 | if (!MemOpChains2.empty()) |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 3313 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains2); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3314 | |
| 3315 | // Store the return address to the appropriate stack slot. |
| 3316 | Chain = EmitTailCallStoreFPAndRetAddr(DAG, MF, Chain, LROp, FPOp, SPDiff, |
| 3317 | isPPC64, isDarwinABI, dl); |
| 3318 | |
| 3319 | // Emit callseq_end just before tailcall node. |
| 3320 | Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true), |
Andrew Trick | ad6d08a | 2013-05-29 22:03:55 +0000 | [diff] [blame] | 3321 | DAG.getIntPtrConstant(0, true), InFlag, dl); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3322 | InFlag = Chain.getValue(1); |
| 3323 | } |
| 3324 | |
| 3325 | static |
| 3326 | unsigned PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3327 | SDValue &Chain, SDLoc dl, int SPDiff, bool isTailCall, |
Craig Topper | b94011f | 2013-07-14 04:42:23 +0000 | [diff] [blame] | 3328 | SmallVectorImpl<std::pair<unsigned, SDValue> > &RegsToPass, |
| 3329 | SmallVectorImpl<SDValue> &Ops, std::vector<EVT> &NodeTys, |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 3330 | const PPCSubtarget &Subtarget) { |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3331 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 3332 | bool isPPC64 = Subtarget.isPPC64(); |
| 3333 | bool isSVR4ABI = Subtarget.isSVR4ABI(); |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3334 | |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 3335 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3336 | NodeTys.push_back(MVT::Other); // Returns a chain |
Chris Lattner | 3e5fbd7 | 2010-12-21 02:38:05 +0000 | [diff] [blame] | 3337 | NodeTys.push_back(MVT::Glue); // Returns a flag for retval copy to use. |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3338 | |
Ulrich Weigand | f62e83f | 2013-03-22 15:24:13 +0000 | [diff] [blame] | 3339 | unsigned CallOpc = PPCISD::CALL; |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3340 | |
Torok Edwin | 31e90d2 | 2010-08-04 20:47:44 +0000 | [diff] [blame] | 3341 | bool needIndirectCall = true; |
Ulrich Weigand | 9aa09ef | 2014-06-18 16:14:04 +0000 | [diff] [blame] | 3342 | if (!isSVR4ABI || !isPPC64) |
| 3343 | if (SDNode *Dest = isBLACompatibleAddress(Callee, DAG)) { |
| 3344 | // If this is an absolute destination address, use the munged value. |
| 3345 | Callee = SDValue(Dest, 0); |
| 3346 | needIndirectCall = false; |
| 3347 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3348 | |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3349 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { |
| 3350 | // XXX Work around for http://llvm.org/bugs/show_bug.cgi?id=5201 |
| 3351 | // Use indirect calls for ALL functions calls in JIT mode, since the |
| 3352 | // far-call stubs may be outside relocation limits for a BL instruction. |
| 3353 | if (!DAG.getTarget().getSubtarget<PPCSubtarget>().isJITCodeModel()) { |
| 3354 | unsigned OpFlags = 0; |
| 3355 | if (DAG.getTarget().getRelocationModel() != Reloc::Static && |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 3356 | (Subtarget.getTargetTriple().isMacOSX() && |
| 3357 | Subtarget.getTargetTriple().isMacOSXVersionLT(10, 5)) && |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3358 | (G->getGlobal()->isDeclaration() || |
| 3359 | G->getGlobal()->isWeakForLinker())) { |
| 3360 | // PC-relative references to external symbols should go through $stub, |
| 3361 | // unless we're building with the leopard linker or later, which |
| 3362 | // automatically synthesizes these stubs. |
| 3363 | OpFlags = PPCII::MO_DARWIN_STUB; |
| 3364 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3365 | |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3366 | // If the callee is a GlobalAddress/ExternalSymbol node (quite common, |
| 3367 | // every direct call is) turn it into a TargetGlobalAddress / |
| 3368 | // TargetExternalSymbol node so that legalize doesn't hack it. |
Torok Edwin | 31e90d2 | 2010-08-04 20:47:44 +0000 | [diff] [blame] | 3369 | Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl, |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3370 | Callee.getValueType(), |
| 3371 | 0, OpFlags); |
Torok Edwin | 31e90d2 | 2010-08-04 20:47:44 +0000 | [diff] [blame] | 3372 | needIndirectCall = false; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3373 | } |
Torok Edwin | 31e90d2 | 2010-08-04 20:47:44 +0000 | [diff] [blame] | 3374 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3375 | |
Torok Edwin | 31e90d2 | 2010-08-04 20:47:44 +0000 | [diff] [blame] | 3376 | if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) { |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3377 | unsigned char OpFlags = 0; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3378 | |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3379 | if (DAG.getTarget().getRelocationModel() != Reloc::Static && |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 3380 | (Subtarget.getTargetTriple().isMacOSX() && |
| 3381 | Subtarget.getTargetTriple().isMacOSXVersionLT(10, 5))) { |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3382 | // PC-relative references to external symbols should go through $stub, |
| 3383 | // unless we're building with the leopard linker or later, which |
| 3384 | // automatically synthesizes these stubs. |
| 3385 | OpFlags = PPCII::MO_DARWIN_STUB; |
| 3386 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3387 | |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3388 | Callee = DAG.getTargetExternalSymbol(S->getSymbol(), Callee.getValueType(), |
| 3389 | OpFlags); |
| 3390 | needIndirectCall = false; |
Torok Edwin | 31e90d2 | 2010-08-04 20:47:44 +0000 | [diff] [blame] | 3391 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3392 | |
Torok Edwin | 31e90d2 | 2010-08-04 20:47:44 +0000 | [diff] [blame] | 3393 | if (needIndirectCall) { |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3394 | // Otherwise, this is an indirect call. We have to use a MTCTR/BCTRL pair |
| 3395 | // to do the call, we can't use PPCISD::CALL. |
| 3396 | SDValue MTCTROps[] = {Chain, Callee, InFlag}; |
Tilmann Scheller | 79fef93 | 2009-12-18 13:00:15 +0000 | [diff] [blame] | 3397 | |
| 3398 | if (isSVR4ABI && isPPC64) { |
| 3399 | // Function pointers in the 64-bit SVR4 ABI do not point to the function |
| 3400 | // entry point, but to the function descriptor (the function entry point |
| 3401 | // address is part of the function descriptor though). |
| 3402 | // The function descriptor is a three doubleword structure with the |
| 3403 | // following fields: function entry point, TOC base address and |
| 3404 | // environment pointer. |
| 3405 | // Thus for a call through a function pointer, the following actions need |
| 3406 | // to be performed: |
| 3407 | // 1. Save the TOC of the caller in the TOC save area of its stack |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3408 | // frame (this is done in LowerCall_Darwin() or LowerCall_64SVR4()). |
Tilmann Scheller | 79fef93 | 2009-12-18 13:00:15 +0000 | [diff] [blame] | 3409 | // 2. Load the address of the function entry point from the function |
| 3410 | // descriptor. |
| 3411 | // 3. Load the TOC of the callee from the function descriptor into r2. |
| 3412 | // 4. Load the environment pointer from the function descriptor into |
| 3413 | // r11. |
| 3414 | // 5. Branch to the function entry point address. |
| 3415 | // 6. On return of the callee, the TOC of the caller needs to be |
| 3416 | // restored (this is done in FinishCall()). |
| 3417 | // |
| 3418 | // All those operations are flagged together to ensure that no other |
| 3419 | // operations can be scheduled in between. E.g. without flagging the |
| 3420 | // operations together, a TOC access in the caller could be scheduled |
| 3421 | // between the load of the callee TOC and the branch to the callee, which |
| 3422 | // results in the TOC access going through the TOC of the callee instead |
| 3423 | // of going through the TOC of the caller, which leads to incorrect code. |
| 3424 | |
| 3425 | // Load the address of the function entry point from the function |
| 3426 | // descriptor. |
Chris Lattner | 3e5fbd7 | 2010-12-21 02:38:05 +0000 | [diff] [blame] | 3427 | SDVTList VTs = DAG.getVTList(MVT::i64, MVT::Other, MVT::Glue); |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 3428 | SDValue LoadFuncPtr = DAG.getNode(PPCISD::LOAD, dl, VTs, |
Craig Topper | 2d2aa0c | 2014-04-30 07:17:30 +0000 | [diff] [blame] | 3429 | makeArrayRef(MTCTROps, InFlag.getNode() ? 3 : 2)); |
Tilmann Scheller | 79fef93 | 2009-12-18 13:00:15 +0000 | [diff] [blame] | 3430 | Chain = LoadFuncPtr.getValue(1); |
| 3431 | InFlag = LoadFuncPtr.getValue(2); |
| 3432 | |
| 3433 | // Load environment pointer into r11. |
| 3434 | // Offset of the environment pointer within the function descriptor. |
| 3435 | SDValue PtrOff = DAG.getIntPtrConstant(16); |
| 3436 | |
| 3437 | SDValue AddPtr = DAG.getNode(ISD::ADD, dl, MVT::i64, Callee, PtrOff); |
| 3438 | SDValue LoadEnvPtr = DAG.getNode(PPCISD::LOAD, dl, VTs, Chain, AddPtr, |
| 3439 | InFlag); |
| 3440 | Chain = LoadEnvPtr.getValue(1); |
| 3441 | InFlag = LoadEnvPtr.getValue(2); |
| 3442 | |
| 3443 | SDValue EnvVal = DAG.getCopyToReg(Chain, dl, PPC::X11, LoadEnvPtr, |
| 3444 | InFlag); |
| 3445 | Chain = EnvVal.getValue(0); |
| 3446 | InFlag = EnvVal.getValue(1); |
| 3447 | |
| 3448 | // Load TOC of the callee into r2. We are using a target-specific load |
| 3449 | // with r2 hard coded, because the result of a target-independent load |
| 3450 | // would never go directly into r2, since r2 is a reserved register (which |
| 3451 | // prevents the register allocator from allocating it), resulting in an |
| 3452 | // additional register being allocated and an unnecessary move instruction |
| 3453 | // being generated. |
Chris Lattner | 3e5fbd7 | 2010-12-21 02:38:05 +0000 | [diff] [blame] | 3454 | VTs = DAG.getVTList(MVT::Other, MVT::Glue); |
Ulrich Weigand | ad0cb91 | 2014-06-18 17:52:49 +0000 | [diff] [blame] | 3455 | SDValue TOCOff = DAG.getIntPtrConstant(8); |
| 3456 | SDValue AddTOC = DAG.getNode(ISD::ADD, dl, MVT::i64, Callee, TOCOff); |
Tilmann Scheller | 79fef93 | 2009-12-18 13:00:15 +0000 | [diff] [blame] | 3457 | SDValue LoadTOCPtr = DAG.getNode(PPCISD::LOAD_TOC, dl, VTs, Chain, |
Ulrich Weigand | ad0cb91 | 2014-06-18 17:52:49 +0000 | [diff] [blame] | 3458 | AddTOC, InFlag); |
Tilmann Scheller | 79fef93 | 2009-12-18 13:00:15 +0000 | [diff] [blame] | 3459 | Chain = LoadTOCPtr.getValue(0); |
| 3460 | InFlag = LoadTOCPtr.getValue(1); |
| 3461 | |
| 3462 | MTCTROps[0] = Chain; |
| 3463 | MTCTROps[1] = LoadFuncPtr; |
| 3464 | MTCTROps[2] = InFlag; |
| 3465 | } |
| 3466 | |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 3467 | Chain = DAG.getNode(PPCISD::MTCTR, dl, NodeTys, |
Craig Topper | 2d2aa0c | 2014-04-30 07:17:30 +0000 | [diff] [blame] | 3468 | makeArrayRef(MTCTROps, InFlag.getNode() ? 3 : 2)); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3469 | InFlag = Chain.getValue(1); |
| 3470 | |
| 3471 | NodeTys.clear(); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3472 | NodeTys.push_back(MVT::Other); |
Chris Lattner | 3e5fbd7 | 2010-12-21 02:38:05 +0000 | [diff] [blame] | 3473 | NodeTys.push_back(MVT::Glue); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3474 | Ops.push_back(Chain); |
Ulrich Weigand | f62e83f | 2013-03-22 15:24:13 +0000 | [diff] [blame] | 3475 | CallOpc = PPCISD::BCTRL; |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 3476 | Callee.setNode(nullptr); |
Ulrich Weigand | f62e83f | 2013-03-22 15:24:13 +0000 | [diff] [blame] | 3477 | // Add use of X11 (holding environment pointer) |
| 3478 | if (isSVR4ABI && isPPC64) |
| 3479 | Ops.push_back(DAG.getRegister(PPC::X11, PtrVT)); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3480 | // Add CTR register as callee so a bctr can be emitted later. |
| 3481 | if (isTailCall) |
Roman Divacky | a4a59ae | 2011-06-03 15:47:49 +0000 | [diff] [blame] | 3482 | Ops.push_back(DAG.getRegister(isPPC64 ? PPC::CTR8 : PPC::CTR, PtrVT)); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3483 | } |
| 3484 | |
| 3485 | // If this is a direct call, pass the chain and the callee. |
| 3486 | if (Callee.getNode()) { |
| 3487 | Ops.push_back(Chain); |
| 3488 | Ops.push_back(Callee); |
| 3489 | } |
| 3490 | // If this is a tail call add stack pointer delta. |
| 3491 | if (isTailCall) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3492 | Ops.push_back(DAG.getConstant(SPDiff, MVT::i32)); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3493 | |
| 3494 | // Add argument registers to the end of the list so that they are known live |
| 3495 | // into the call. |
| 3496 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) |
| 3497 | Ops.push_back(DAG.getRegister(RegsToPass[i].first, |
| 3498 | RegsToPass[i].second.getValueType())); |
| 3499 | |
| 3500 | return CallOpc; |
| 3501 | } |
| 3502 | |
Roman Divacky | 7629306 | 2012-09-18 16:47:58 +0000 | [diff] [blame] | 3503 | static |
| 3504 | bool isLocalCall(const SDValue &Callee) |
| 3505 | { |
| 3506 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) |
Roman Divacky | 09adf3d | 2012-09-18 18:27:49 +0000 | [diff] [blame] | 3507 | return !G->getGlobal()->isDeclaration() && |
| 3508 | !G->getGlobal()->isWeakForLinker(); |
Roman Divacky | 7629306 | 2012-09-18 16:47:58 +0000 | [diff] [blame] | 3509 | return false; |
| 3510 | } |
| 3511 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3512 | SDValue |
| 3513 | PPCTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, |
Sandeep Patel | 68c5f47 | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 3514 | CallingConv::ID CallConv, bool isVarArg, |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3515 | const SmallVectorImpl<ISD::InputArg> &Ins, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3516 | SDLoc dl, SelectionDAG &DAG, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 3517 | SmallVectorImpl<SDValue> &InVals) const { |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3518 | |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3519 | SmallVector<CCValAssign, 16> RVLocs; |
Eric Christopher | 0713a9d | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 3520 | CCState CCRetInfo(CallConv, isVarArg, DAG.getMachineFunction(), |
Gabor Greif | 180c444 | 2012-04-19 15:16:31 +0000 | [diff] [blame] | 3521 | getTargetMachine(), RVLocs, *DAG.getContext()); |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3522 | CCRetInfo.AnalyzeCallResult(Ins, RetCC_PPC); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3523 | |
| 3524 | // Copy all of the result registers out of their specified physreg. |
| 3525 | for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { |
| 3526 | CCValAssign &VA = RVLocs[i]; |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3527 | assert(VA.isRegLoc() && "Can only return in registers!"); |
Ulrich Weigand | 339d059 | 2012-11-05 19:39:45 +0000 | [diff] [blame] | 3528 | |
| 3529 | SDValue Val = DAG.getCopyFromReg(Chain, dl, |
| 3530 | VA.getLocReg(), VA.getLocVT(), InFlag); |
| 3531 | Chain = Val.getValue(1); |
| 3532 | InFlag = Val.getValue(2); |
| 3533 | |
| 3534 | switch (VA.getLocInfo()) { |
| 3535 | default: llvm_unreachable("Unknown loc info!"); |
| 3536 | case CCValAssign::Full: break; |
| 3537 | case CCValAssign::AExt: |
| 3538 | Val = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Val); |
| 3539 | break; |
| 3540 | case CCValAssign::ZExt: |
| 3541 | Val = DAG.getNode(ISD::AssertZext, dl, VA.getLocVT(), Val, |
| 3542 | DAG.getValueType(VA.getValVT())); |
| 3543 | Val = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Val); |
| 3544 | break; |
| 3545 | case CCValAssign::SExt: |
| 3546 | Val = DAG.getNode(ISD::AssertSext, dl, VA.getLocVT(), Val, |
| 3547 | DAG.getValueType(VA.getValVT())); |
| 3548 | Val = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Val); |
| 3549 | break; |
| 3550 | } |
| 3551 | |
| 3552 | InVals.push_back(Val); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3553 | } |
| 3554 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3555 | return Chain; |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3556 | } |
| 3557 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3558 | SDValue |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3559 | PPCTargetLowering::FinishCall(CallingConv::ID CallConv, SDLoc dl, |
Sandeep Patel | 68c5f47 | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 3560 | bool isTailCall, bool isVarArg, |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3561 | SelectionDAG &DAG, |
| 3562 | SmallVector<std::pair<unsigned, SDValue>, 8> |
| 3563 | &RegsToPass, |
| 3564 | SDValue InFlag, SDValue Chain, |
| 3565 | SDValue &Callee, |
| 3566 | int SPDiff, unsigned NumBytes, |
| 3567 | const SmallVectorImpl<ISD::InputArg> &Ins, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 3568 | SmallVectorImpl<SDValue> &InVals) const { |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 3569 | std::vector<EVT> NodeTys; |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3570 | SmallVector<SDValue, 8> Ops; |
| 3571 | unsigned CallOpc = PrepareCall(DAG, Callee, InFlag, Chain, dl, SPDiff, |
| 3572 | isTailCall, RegsToPass, Ops, NodeTys, |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 3573 | Subtarget); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3574 | |
Hal Finkel | 5ab3780 | 2012-08-28 02:10:27 +0000 | [diff] [blame] | 3575 | // Add implicit use of CR bit 6 for 32-bit SVR4 vararg calls |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 3576 | if (isVarArg && Subtarget.isSVR4ABI() && !Subtarget.isPPC64()) |
Hal Finkel | 5ab3780 | 2012-08-28 02:10:27 +0000 | [diff] [blame] | 3577 | Ops.push_back(DAG.getRegister(PPC::CR1EQ, MVT::i32)); |
| 3578 | |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3579 | // When performing tail call optimization the callee pops its arguments off |
| 3580 | // the stack. Account for this here so these bytes can be pushed back on in |
Eli Bendersky | 8da8716 | 2013-02-21 20:05:00 +0000 | [diff] [blame] | 3581 | // PPCFrameLowering::eliminateCallFramePseudoInstr. |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3582 | int BytesCalleePops = |
Nick Lewycky | 50f02cb | 2011-12-02 22:16:29 +0000 | [diff] [blame] | 3583 | (CallConv == CallingConv::Fast && |
| 3584 | getTargetMachine().Options.GuaranteedTailCallOpt) ? NumBytes : 0; |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3585 | |
Roman Divacky | ef21be2 | 2012-03-06 16:41:49 +0000 | [diff] [blame] | 3586 | // Add a register mask operand representing the call-preserved registers. |
| 3587 | const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); |
| 3588 | const uint32_t *Mask = TRI->getCallPreservedMask(CallConv); |
| 3589 | assert(Mask && "Missing call preserved mask for calling convention"); |
| 3590 | Ops.push_back(DAG.getRegisterMask(Mask)); |
| 3591 | |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3592 | if (InFlag.getNode()) |
| 3593 | Ops.push_back(InFlag); |
| 3594 | |
| 3595 | // Emit tail call. |
| 3596 | if (isTailCall) { |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3597 | assert(((Callee.getOpcode() == ISD::Register && |
| 3598 | cast<RegisterSDNode>(Callee)->getReg() == PPC::CTR) || |
| 3599 | Callee.getOpcode() == ISD::TargetExternalSymbol || |
| 3600 | Callee.getOpcode() == ISD::TargetGlobalAddress || |
| 3601 | isa<ConstantSDNode>(Callee)) && |
| 3602 | "Expecting an global address, external symbol, absolute value or register"); |
| 3603 | |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 3604 | return DAG.getNode(PPCISD::TC_RETURN, dl, MVT::Other, Ops); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3605 | } |
| 3606 | |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 3607 | // Add a NOP immediately after the branch instruction when using the 64-bit |
| 3608 | // SVR4 ABI. At link time, if caller and callee are in a different module and |
| 3609 | // thus have a different TOC, the call will be replaced with a call to a stub |
| 3610 | // function which saves the current TOC, loads the TOC of the callee and |
| 3611 | // branches to the callee. The NOP will be replaced with a load instruction |
| 3612 | // which restores the TOC of the caller from the TOC save slot of the current |
| 3613 | // stack frame. If caller and callee belong to the same module (and have the |
| 3614 | // same TOC), the NOP will remain unchanged. |
Hal Finkel | 51861b4 | 2012-03-31 14:45:15 +0000 | [diff] [blame] | 3615 | |
| 3616 | bool needsTOCRestore = false; |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 3617 | if (!isTailCall && Subtarget.isSVR4ABI()&& Subtarget.isPPC64()) { |
Ulrich Weigand | f62e83f | 2013-03-22 15:24:13 +0000 | [diff] [blame] | 3618 | if (CallOpc == PPCISD::BCTRL) { |
Tilmann Scheller | 79fef93 | 2009-12-18 13:00:15 +0000 | [diff] [blame] | 3619 | // This is a call through a function pointer. |
| 3620 | // Restore the caller TOC from the save area into R2. |
| 3621 | // See PrepareCall() for more information about calls through function |
| 3622 | // pointers in the 64-bit SVR4 ABI. |
| 3623 | // We are using a target-specific load with r2 hard coded, because the |
| 3624 | // result of a target-independent load would never go directly into r2, |
| 3625 | // since r2 is a reserved register (which prevents the register allocator |
| 3626 | // from allocating it), resulting in an additional register being |
| 3627 | // allocated and an unnecessary move instruction being generated. |
Hal Finkel | 51861b4 | 2012-03-31 14:45:15 +0000 | [diff] [blame] | 3628 | needsTOCRestore = true; |
Bill Schmidt | cea1596 | 2013-09-26 17:09:28 +0000 | [diff] [blame] | 3629 | } else if ((CallOpc == PPCISD::CALL) && |
| 3630 | (!isLocalCall(Callee) || |
| 3631 | DAG.getTarget().getRelocationModel() == Reloc::PIC_)) { |
Roman Divacky | 7629306 | 2012-09-18 16:47:58 +0000 | [diff] [blame] | 3632 | // Otherwise insert NOP for non-local calls. |
Ulrich Weigand | f62e83f | 2013-03-22 15:24:13 +0000 | [diff] [blame] | 3633 | CallOpc = PPCISD::CALL_NOP; |
Tilmann Scheller | 79fef93 | 2009-12-18 13:00:15 +0000 | [diff] [blame] | 3634 | } |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 3635 | } |
| 3636 | |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 3637 | Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops); |
Hal Finkel | 51861b4 | 2012-03-31 14:45:15 +0000 | [diff] [blame] | 3638 | InFlag = Chain.getValue(1); |
| 3639 | |
| 3640 | if (needsTOCRestore) { |
| 3641 | SDVTList VTs = DAG.getVTList(MVT::Other, MVT::Glue); |
Ulrich Weigand | ad0cb91 | 2014-06-18 17:52:49 +0000 | [diff] [blame] | 3642 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
| 3643 | SDValue StackPtr = DAG.getRegister(PPC::X1, PtrVT); |
| 3644 | unsigned TOCSaveOffset = PPCFrameLowering::getTOCSaveOffset(); |
| 3645 | SDValue TOCOff = DAG.getIntPtrConstant(TOCSaveOffset); |
| 3646 | SDValue AddTOC = DAG.getNode(ISD::ADD, dl, MVT::i64, StackPtr, TOCOff); |
| 3647 | Chain = DAG.getNode(PPCISD::LOAD_TOC, dl, VTs, Chain, AddTOC, InFlag); |
Hal Finkel | 51861b4 | 2012-03-31 14:45:15 +0000 | [diff] [blame] | 3648 | InFlag = Chain.getValue(1); |
| 3649 | } |
| 3650 | |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3651 | Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true), |
| 3652 | DAG.getIntPtrConstant(BytesCalleePops, true), |
Andrew Trick | ad6d08a | 2013-05-29 22:03:55 +0000 | [diff] [blame] | 3653 | InFlag, dl); |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3654 | if (!Ins.empty()) |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3655 | InFlag = Chain.getValue(1); |
| 3656 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3657 | return LowerCallResult(Chain, InFlag, CallConv, isVarArg, |
| 3658 | Ins, dl, DAG, InVals); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3659 | } |
| 3660 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3661 | SDValue |
Justin Holewinski | aa58397 | 2012-05-25 16:35:28 +0000 | [diff] [blame] | 3662 | PPCTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 3663 | SmallVectorImpl<SDValue> &InVals) const { |
Justin Holewinski | aa58397 | 2012-05-25 16:35:28 +0000 | [diff] [blame] | 3664 | SelectionDAG &DAG = CLI.DAG; |
Craig Topper | b94011f | 2013-07-14 04:42:23 +0000 | [diff] [blame] | 3665 | SDLoc &dl = CLI.DL; |
| 3666 | SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; |
| 3667 | SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; |
| 3668 | SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; |
Justin Holewinski | aa58397 | 2012-05-25 16:35:28 +0000 | [diff] [blame] | 3669 | SDValue Chain = CLI.Chain; |
| 3670 | SDValue Callee = CLI.Callee; |
| 3671 | bool &isTailCall = CLI.IsTailCall; |
| 3672 | CallingConv::ID CallConv = CLI.CallConv; |
| 3673 | bool isVarArg = CLI.IsVarArg; |
| 3674 | |
Evan Cheng | 67a69dd | 2010-01-27 00:07:07 +0000 | [diff] [blame] | 3675 | if (isTailCall) |
| 3676 | isTailCall = IsEligibleForTailCallOptimization(Callee, CallConv, isVarArg, |
| 3677 | Ins, DAG); |
| 3678 | |
Reid Kleckner | 5772b77 | 2014-04-24 20:14:34 +0000 | [diff] [blame] | 3679 | if (!isTailCall && CLI.CS && CLI.CS->isMustTailCall()) |
| 3680 | report_fatal_error("failed to perform tail call elimination on a call " |
| 3681 | "site marked musttail"); |
| 3682 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 3683 | if (Subtarget.isSVR4ABI()) { |
| 3684 | if (Subtarget.isPPC64()) |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3685 | return LowerCall_64SVR4(Chain, Callee, CallConv, isVarArg, |
| 3686 | isTailCall, Outs, OutVals, Ins, |
| 3687 | dl, DAG, InVals); |
| 3688 | else |
| 3689 | return LowerCall_32SVR4(Chain, Callee, CallConv, isVarArg, |
| 3690 | isTailCall, Outs, OutVals, Ins, |
| 3691 | dl, DAG, InVals); |
| 3692 | } |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3693 | |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3694 | return LowerCall_Darwin(Chain, Callee, CallConv, isVarArg, |
| 3695 | isTailCall, Outs, OutVals, Ins, |
| 3696 | dl, DAG, InVals); |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3697 | } |
| 3698 | |
| 3699 | SDValue |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 3700 | PPCTargetLowering::LowerCall_32SVR4(SDValue Chain, SDValue Callee, |
| 3701 | CallingConv::ID CallConv, bool isVarArg, |
| 3702 | bool isTailCall, |
| 3703 | const SmallVectorImpl<ISD::OutputArg> &Outs, |
| 3704 | const SmallVectorImpl<SDValue> &OutVals, |
| 3705 | const SmallVectorImpl<ISD::InputArg> &Ins, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3706 | SDLoc dl, SelectionDAG &DAG, |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 3707 | SmallVectorImpl<SDValue> &InVals) const { |
| 3708 | // See PPCTargetLowering::LowerFormalArguments_32SVR4() for a description |
Tilmann Scheller | d1aaa32 | 2009-08-15 11:54:46 +0000 | [diff] [blame] | 3709 | // of the 32-bit SVR4 ABI stack frame layout. |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3710 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3711 | assert((CallConv == CallingConv::C || |
| 3712 | CallConv == CallingConv::Fast) && "Unknown calling convention!"); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3713 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3714 | unsigned PtrByteSize = 4; |
| 3715 | |
| 3716 | MachineFunction &MF = DAG.getMachineFunction(); |
| 3717 | |
| 3718 | // Mark this function as potentially containing a function that contains a |
| 3719 | // tail call. As a consequence the frame pointer will be used for dynamicalloc |
| 3720 | // and restoring the callers stack pointer in this functions epilog. This is |
| 3721 | // done because by tail calling the called function might overwrite the value |
| 3722 | // in this function's (MF) stack pointer stack slot 0(SP). |
Nick Lewycky | 50f02cb | 2011-12-02 22:16:29 +0000 | [diff] [blame] | 3723 | if (getTargetMachine().Options.GuaranteedTailCallOpt && |
| 3724 | CallConv == CallingConv::Fast) |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3725 | MF.getInfo<PPCFunctionInfo>()->setHasFastCall(); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3726 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3727 | // Count how many bytes are to be pushed on the stack, including the linkage |
| 3728 | // area, parameter list area and the part of the local variable space which |
| 3729 | // contains copies of aggregates which are passed by value. |
| 3730 | |
| 3731 | // Assign locations to all of the outgoing arguments. |
| 3732 | SmallVector<CCValAssign, 16> ArgLocs; |
Eric Christopher | 0713a9d | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 3733 | CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), |
Gabor Greif | 180c444 | 2012-04-19 15:16:31 +0000 | [diff] [blame] | 3734 | getTargetMachine(), ArgLocs, *DAG.getContext()); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3735 | |
| 3736 | // Reserve space for the linkage area on the stack. |
Anton Korobeynikov | 2f93128 | 2011-01-10 12:39:04 +0000 | [diff] [blame] | 3737 | CCInfo.AllocateStack(PPCFrameLowering::getLinkageSize(false, false), PtrByteSize); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3738 | |
| 3739 | if (isVarArg) { |
| 3740 | // Handle fixed and variable vector arguments differently. |
| 3741 | // Fixed vector arguments go into registers as long as registers are |
| 3742 | // available. Variable vector arguments always go into memory. |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3743 | unsigned NumArgs = Outs.size(); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3744 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3745 | for (unsigned i = 0; i != NumArgs; ++i) { |
Duncan Sands | f5dda01 | 2010-11-03 11:35:31 +0000 | [diff] [blame] | 3746 | MVT ArgVT = Outs[i].VT; |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3747 | ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3748 | bool Result; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3749 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3750 | if (Outs[i].IsFixed) { |
Bill Schmidt | ef17c14 | 2013-02-06 17:33:58 +0000 | [diff] [blame] | 3751 | Result = CC_PPC32_SVR4(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, |
| 3752 | CCInfo); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3753 | } else { |
Bill Schmidt | ef17c14 | 2013-02-06 17:33:58 +0000 | [diff] [blame] | 3754 | Result = CC_PPC32_SVR4_VarArg(i, ArgVT, ArgVT, CCValAssign::Full, |
| 3755 | ArgFlags, CCInfo); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3756 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3757 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3758 | if (Result) { |
Torok Edwin | fb8d6d5 | 2009-07-08 20:53:28 +0000 | [diff] [blame] | 3759 | #ifndef NDEBUG |
Chris Lattner | 1362602 | 2009-08-23 06:03:38 +0000 | [diff] [blame] | 3760 | errs() << "Call operand #" << i << " has unhandled type " |
Duncan Sands | f5dda01 | 2010-11-03 11:35:31 +0000 | [diff] [blame] | 3761 | << EVT(ArgVT).getEVTString() << "\n"; |
Torok Edwin | fb8d6d5 | 2009-07-08 20:53:28 +0000 | [diff] [blame] | 3762 | #endif |
Craig Topper | e73658d | 2014-04-28 04:05:08 +0000 | [diff] [blame] | 3763 | llvm_unreachable(nullptr); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3764 | } |
| 3765 | } |
| 3766 | } else { |
| 3767 | // All arguments are treated the same. |
Bill Schmidt | ef17c14 | 2013-02-06 17:33:58 +0000 | [diff] [blame] | 3768 | CCInfo.AnalyzeCallOperands(Outs, CC_PPC32_SVR4); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3769 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3770 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3771 | // Assign locations to all of the outgoing aggregate by value arguments. |
| 3772 | SmallVector<CCValAssign, 16> ByValArgLocs; |
Eric Christopher | 0713a9d | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 3773 | CCState CCByValInfo(CallConv, isVarArg, DAG.getMachineFunction(), |
Gabor Greif | 180c444 | 2012-04-19 15:16:31 +0000 | [diff] [blame] | 3774 | getTargetMachine(), ByValArgLocs, *DAG.getContext()); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3775 | |
| 3776 | // Reserve stack space for the allocations in CCInfo. |
| 3777 | CCByValInfo.AllocateStack(CCInfo.getNextStackOffset(), PtrByteSize); |
| 3778 | |
Bill Schmidt | ef17c14 | 2013-02-06 17:33:58 +0000 | [diff] [blame] | 3779 | CCByValInfo.AnalyzeCallOperands(Outs, CC_PPC32_SVR4_ByVal); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3780 | |
| 3781 | // Size of the linkage area, parameter list area and the part of the local |
| 3782 | // space variable where copies of aggregates which are passed by value are |
| 3783 | // stored. |
| 3784 | unsigned NumBytes = CCByValInfo.getNextStackOffset(); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3785 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3786 | // Calculate by how many bytes the stack has to be adjusted in case of tail |
| 3787 | // call optimization. |
| 3788 | int SPDiff = CalculateTailCallSPDiff(DAG, isTailCall, NumBytes); |
| 3789 | |
| 3790 | // Adjust the stack pointer for the new arguments... |
| 3791 | // These operations are automatically eliminated by the prolog/epilog pass |
Andrew Trick | ad6d08a | 2013-05-29 22:03:55 +0000 | [diff] [blame] | 3792 | Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true), |
| 3793 | dl); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3794 | SDValue CallSeqStart = Chain; |
| 3795 | |
| 3796 | // Load the return address and frame pointer so it can be moved somewhere else |
| 3797 | // later. |
| 3798 | SDValue LROp, FPOp; |
| 3799 | Chain = EmitTailCallLoadFPAndRetAddr(DAG, SPDiff, Chain, LROp, FPOp, false, |
| 3800 | dl); |
| 3801 | |
| 3802 | // Set up a copy of the stack pointer for use loading and storing any |
| 3803 | // arguments that may not fit in the registers available for argument |
| 3804 | // passing. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3805 | SDValue StackPtr = DAG.getRegister(PPC::R1, MVT::i32); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3806 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3807 | SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; |
| 3808 | SmallVector<TailCallArgumentInfo, 8> TailCallArguments; |
| 3809 | SmallVector<SDValue, 8> MemOpChains; |
| 3810 | |
Roman Divacky | 71038e7 | 2011-08-30 17:04:16 +0000 | [diff] [blame] | 3811 | bool seenFloatArg = false; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3812 | // Walk the register/memloc assignments, inserting copies/loads. |
| 3813 | for (unsigned i = 0, j = 0, e = ArgLocs.size(); |
| 3814 | i != e; |
| 3815 | ++i) { |
| 3816 | CCValAssign &VA = ArgLocs[i]; |
Dan Gohman | fe7532a | 2010-07-07 15:54:55 +0000 | [diff] [blame] | 3817 | SDValue Arg = OutVals[i]; |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3818 | ISD::ArgFlagsTy Flags = Outs[i].Flags; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3819 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3820 | if (Flags.isByVal()) { |
| 3821 | // Argument is an aggregate which is passed by value, thus we need to |
| 3822 | // create a copy of it in the local variable space of the current stack |
| 3823 | // frame (which is the stack frame of the caller) and pass the address of |
| 3824 | // this copy to the callee. |
| 3825 | assert((j < ByValArgLocs.size()) && "Index out of bounds!"); |
| 3826 | CCValAssign &ByValVA = ByValArgLocs[j++]; |
| 3827 | assert((VA.getValNo() == ByValVA.getValNo()) && "ValNo mismatch!"); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3828 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3829 | // Memory reserved in the local variable space of the callers stack frame. |
| 3830 | unsigned LocMemOffset = ByValVA.getLocMemOffset(); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3831 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3832 | SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset); |
| 3833 | PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3834 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3835 | // Create a copy of the argument in the local area of the current |
| 3836 | // stack frame. |
| 3837 | SDValue MemcpyCall = |
| 3838 | CreateCopyOfByValArgument(Arg, PtrOff, |
| 3839 | CallSeqStart.getNode()->getOperand(0), |
| 3840 | Flags, DAG, dl); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3841 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3842 | // This must go outside the CALLSEQ_START..END. |
| 3843 | SDValue NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall, |
Andrew Trick | ad6d08a | 2013-05-29 22:03:55 +0000 | [diff] [blame] | 3844 | CallSeqStart.getNode()->getOperand(1), |
| 3845 | SDLoc(MemcpyCall)); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3846 | DAG.ReplaceAllUsesWith(CallSeqStart.getNode(), |
| 3847 | NewCallSeqStart.getNode()); |
| 3848 | Chain = CallSeqStart = NewCallSeqStart; |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3849 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3850 | // Pass the address of the aggregate copy on the stack either in a |
| 3851 | // physical register or in the parameter list area of the current stack |
| 3852 | // frame to the callee. |
| 3853 | Arg = PtrOff; |
| 3854 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3855 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3856 | if (VA.isRegLoc()) { |
Hal Finkel | 2a9d318 | 2014-03-06 00:23:33 +0000 | [diff] [blame] | 3857 | if (Arg.getValueType() == MVT::i1) |
| 3858 | Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Arg); |
| 3859 | |
Roman Divacky | 71038e7 | 2011-08-30 17:04:16 +0000 | [diff] [blame] | 3860 | seenFloatArg |= VA.getLocVT().isFloatingPoint(); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3861 | // Put argument in a physical register. |
| 3862 | RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); |
| 3863 | } else { |
| 3864 | // Put argument in the parameter list area of the current stack frame. |
| 3865 | assert(VA.isMemLoc()); |
| 3866 | unsigned LocMemOffset = VA.getLocMemOffset(); |
| 3867 | |
| 3868 | if (!isTailCall) { |
| 3869 | SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset); |
| 3870 | PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); |
| 3871 | |
| 3872 | MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 3873 | MachinePointerInfo(), |
David Greene | 87a5abe | 2010-02-15 16:56:53 +0000 | [diff] [blame] | 3874 | false, false, 0)); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3875 | } else { |
| 3876 | // Calculate and remember argument location. |
| 3877 | CalculateTailCallArgDest(DAG, MF, false, Arg, SPDiff, LocMemOffset, |
| 3878 | TailCallArguments); |
| 3879 | } |
| 3880 | } |
| 3881 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3882 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3883 | if (!MemOpChains.empty()) |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 3884 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3885 | |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3886 | // Build a sequence of copy-to-reg nodes chained together with token chain |
| 3887 | // and flag operands which copy the outgoing args into the appropriate regs. |
| 3888 | SDValue InFlag; |
| 3889 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
| 3890 | Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, |
| 3891 | RegsToPass[i].second, InFlag); |
| 3892 | InFlag = Chain.getValue(1); |
| 3893 | } |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3894 | |
Hal Finkel | 5ab3780 | 2012-08-28 02:10:27 +0000 | [diff] [blame] | 3895 | // Set CR bit 6 to true if this is a vararg call with floating args passed in |
| 3896 | // registers. |
| 3897 | if (isVarArg) { |
NAKAMURA Takumi | ac49029 | 2012-08-30 15:52:29 +0000 | [diff] [blame] | 3898 | SDVTList VTs = DAG.getVTList(MVT::Other, MVT::Glue); |
| 3899 | SDValue Ops[] = { Chain, InFlag }; |
| 3900 | |
Hal Finkel | 5ab3780 | 2012-08-28 02:10:27 +0000 | [diff] [blame] | 3901 | Chain = DAG.getNode(seenFloatArg ? PPCISD::CR6SET : PPCISD::CR6UNSET, |
Craig Topper | 2d2aa0c | 2014-04-30 07:17:30 +0000 | [diff] [blame] | 3902 | dl, VTs, makeArrayRef(Ops, InFlag.getNode() ? 2 : 1)); |
NAKAMURA Takumi | ac49029 | 2012-08-30 15:52:29 +0000 | [diff] [blame] | 3903 | |
Hal Finkel | 5ab3780 | 2012-08-28 02:10:27 +0000 | [diff] [blame] | 3904 | InFlag = Chain.getValue(1); |
| 3905 | } |
| 3906 | |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 3907 | if (isTailCall) |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 3908 | PrepareTailCall(DAG, InFlag, Chain, dl, false, SPDiff, NumBytes, LROp, FPOp, |
| 3909 | false, TailCallArguments); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3910 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3911 | return FinishCall(CallConv, dl, isTailCall, isVarArg, DAG, |
| 3912 | RegsToPass, InFlag, Chain, Callee, SPDiff, NumBytes, |
| 3913 | Ins, InVals); |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 3914 | } |
| 3915 | |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3916 | // Copy an argument into memory, being careful to do this outside the |
| 3917 | // call sequence for the call to which the argument belongs. |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3918 | SDValue |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3919 | PPCTargetLowering::createMemcpyOutsideCallSeq(SDValue Arg, SDValue PtrOff, |
| 3920 | SDValue CallSeqStart, |
| 3921 | ISD::ArgFlagsTy Flags, |
| 3922 | SelectionDAG &DAG, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3923 | SDLoc dl) const { |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3924 | SDValue MemcpyCall = CreateCopyOfByValArgument(Arg, PtrOff, |
| 3925 | CallSeqStart.getNode()->getOperand(0), |
| 3926 | Flags, DAG, dl); |
| 3927 | // The MEMCPY must go outside the CALLSEQ_START..END. |
| 3928 | SDValue NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall, |
Andrew Trick | ad6d08a | 2013-05-29 22:03:55 +0000 | [diff] [blame] | 3929 | CallSeqStart.getNode()->getOperand(1), |
| 3930 | SDLoc(MemcpyCall)); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3931 | DAG.ReplaceAllUsesWith(CallSeqStart.getNode(), |
| 3932 | NewCallSeqStart.getNode()); |
| 3933 | return NewCallSeqStart; |
| 3934 | } |
| 3935 | |
| 3936 | SDValue |
| 3937 | PPCTargetLowering::LowerCall_64SVR4(SDValue Chain, SDValue Callee, |
Sandeep Patel | 68c5f47 | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 3938 | CallingConv::ID CallConv, bool isVarArg, |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3939 | bool isTailCall, |
| 3940 | const SmallVectorImpl<ISD::OutputArg> &Outs, |
Dan Gohman | fe7532a | 2010-07-07 15:54:55 +0000 | [diff] [blame] | 3941 | const SmallVectorImpl<SDValue> &OutVals, |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3942 | const SmallVectorImpl<ISD::InputArg> &Ins, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 3943 | SDLoc dl, SelectionDAG &DAG, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 3944 | SmallVectorImpl<SDValue> &InVals) const { |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3945 | |
Ulrich Weigand | 59c6ab2 | 2014-06-20 16:34:05 +0000 | [diff] [blame] | 3946 | bool isLittleEndian = Subtarget.isLittleEndian(); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3947 | unsigned NumOps = Outs.size(); |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 3948 | |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3949 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
| 3950 | unsigned PtrByteSize = 8; |
| 3951 | |
| 3952 | MachineFunction &MF = DAG.getMachineFunction(); |
| 3953 | |
| 3954 | // Mark this function as potentially containing a function that contains a |
| 3955 | // tail call. As a consequence the frame pointer will be used for dynamicalloc |
| 3956 | // and restoring the callers stack pointer in this functions epilog. This is |
| 3957 | // done because by tail calling the called function might overwrite the value |
| 3958 | // in this function's (MF) stack pointer stack slot 0(SP). |
| 3959 | if (getTargetMachine().Options.GuaranteedTailCallOpt && |
| 3960 | CallConv == CallingConv::Fast) |
| 3961 | MF.getInfo<PPCFunctionInfo>()->setHasFastCall(); |
| 3962 | |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3963 | // Count how many bytes are to be pushed on the stack, including the linkage |
| 3964 | // area, and parameter passing area. We start with at least 48 bytes, which |
| 3965 | // is reserved space for [SP][CR][LR][3 x unused]. |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 3966 | unsigned LinkageSize = PPCFrameLowering::getLinkageSize(true, false); |
| 3967 | unsigned NumBytes = LinkageSize; |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 3968 | |
| 3969 | // Add up all the space actually used. |
| 3970 | for (unsigned i = 0; i != NumOps; ++i) { |
| 3971 | ISD::ArgFlagsTy Flags = Outs[i].Flags; |
| 3972 | EVT ArgVT = Outs[i].VT; |
| 3973 | |
| 3974 | // Altivec parameters are padded to a 16 byte boundary. |
| 3975 | if (ArgVT == MVT::v4f32 || ArgVT == MVT::v4i32 || |
| 3976 | ArgVT == MVT::v8i16 || ArgVT == MVT::v16i8 || |
| 3977 | ArgVT == MVT::v2f64 || ArgVT == MVT::v2i64) |
| 3978 | NumBytes = ((NumBytes+15)/16)*16; |
| 3979 | |
| 3980 | NumBytes += CalculateStackSlotSize(ArgVT, Flags, PtrByteSize); |
| 3981 | } |
| 3982 | |
| 3983 | // The prolog code of the callee may store up to 8 GPR argument registers to |
| 3984 | // the stack, allowing va_start to index over them in memory if its varargs. |
| 3985 | // Because we cannot tell if this is needed on the caller side, we have to |
| 3986 | // conservatively assume that it is needed. As such, make sure we have at |
| 3987 | // least enough stack space for the caller to store the 8 GPRs. |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 3988 | NumBytes = std::max(NumBytes, LinkageSize + 8 * PtrByteSize); |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 3989 | |
| 3990 | // Tail call needs the stack to be aligned. |
| 3991 | if (getTargetMachine().Options.GuaranteedTailCallOpt && |
| 3992 | CallConv == CallingConv::Fast) |
| 3993 | NumBytes = EnsureStackAlignment(MF.getTarget(), NumBytes); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 3994 | |
| 3995 | // Calculate by how many bytes the stack has to be adjusted in case of tail |
| 3996 | // call optimization. |
| 3997 | int SPDiff = CalculateTailCallSPDiff(DAG, isTailCall, NumBytes); |
| 3998 | |
| 3999 | // To protect arguments on the stack from being clobbered in a tail call, |
| 4000 | // force all the loads to happen before doing any other lowering. |
| 4001 | if (isTailCall) |
| 4002 | Chain = DAG.getStackArgumentTokenFactor(Chain); |
| 4003 | |
| 4004 | // Adjust the stack pointer for the new arguments... |
| 4005 | // These operations are automatically eliminated by the prolog/epilog pass |
Andrew Trick | ad6d08a | 2013-05-29 22:03:55 +0000 | [diff] [blame] | 4006 | Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true), |
| 4007 | dl); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4008 | SDValue CallSeqStart = Chain; |
| 4009 | |
| 4010 | // Load the return address and frame pointer so it can be move somewhere else |
| 4011 | // later. |
| 4012 | SDValue LROp, FPOp; |
| 4013 | Chain = EmitTailCallLoadFPAndRetAddr(DAG, SPDiff, Chain, LROp, FPOp, true, |
| 4014 | dl); |
| 4015 | |
| 4016 | // Set up a copy of the stack pointer for use loading and storing any |
| 4017 | // arguments that may not fit in the registers available for argument |
| 4018 | // passing. |
| 4019 | SDValue StackPtr = DAG.getRegister(PPC::X1, MVT::i64); |
| 4020 | |
| 4021 | // Figure out which arguments are going to go in registers, and which in |
| 4022 | // memory. Also, if this is a vararg function, floating point operations |
| 4023 | // must be stored to our stack, and loaded into integer regs as well, if |
| 4024 | // any integer regs are available for argument passing. |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 4025 | unsigned ArgOffset = LinkageSize; |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4026 | unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0; |
| 4027 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 4028 | static const MCPhysReg GPR[] = { |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4029 | PPC::X3, PPC::X4, PPC::X5, PPC::X6, |
| 4030 | PPC::X7, PPC::X8, PPC::X9, PPC::X10, |
| 4031 | }; |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 4032 | static const MCPhysReg *FPR = GetFPR(); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4033 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 4034 | static const MCPhysReg VR[] = { |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4035 | PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, |
| 4036 | PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 |
| 4037 | }; |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 4038 | static const MCPhysReg VSRH[] = { |
Hal Finkel | 7811c61 | 2014-03-28 19:58:11 +0000 | [diff] [blame] | 4039 | PPC::VSH2, PPC::VSH3, PPC::VSH4, PPC::VSH5, PPC::VSH6, PPC::VSH7, PPC::VSH8, |
| 4040 | PPC::VSH9, PPC::VSH10, PPC::VSH11, PPC::VSH12, PPC::VSH13 |
| 4041 | }; |
| 4042 | |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4043 | const unsigned NumGPRs = array_lengthof(GPR); |
| 4044 | const unsigned NumFPRs = 13; |
| 4045 | const unsigned NumVRs = array_lengthof(VR); |
| 4046 | |
| 4047 | SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; |
| 4048 | SmallVector<TailCallArgumentInfo, 8> TailCallArguments; |
| 4049 | |
| 4050 | SmallVector<SDValue, 8> MemOpChains; |
| 4051 | for (unsigned i = 0; i != NumOps; ++i) { |
| 4052 | SDValue Arg = OutVals[i]; |
| 4053 | ISD::ArgFlagsTy Flags = Outs[i].Flags; |
| 4054 | |
| 4055 | // PtrOff will be used to store the current argument to the stack if a |
| 4056 | // register cannot be found for it. |
| 4057 | SDValue PtrOff; |
| 4058 | |
| 4059 | PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType()); |
| 4060 | |
| 4061 | PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff); |
| 4062 | |
| 4063 | // Promote integers to 64-bit values. |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 4064 | if (Arg.getValueType() == MVT::i32 || Arg.getValueType() == MVT::i1) { |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4065 | // FIXME: Should this use ANY_EXTEND if neither sext nor zext? |
| 4066 | unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; |
| 4067 | Arg = DAG.getNode(ExtOp, dl, MVT::i64, Arg); |
| 4068 | } |
| 4069 | |
| 4070 | // FIXME memcpy is used way more than necessary. Correctness first. |
| 4071 | // Note: "by value" is code for passing a structure by value, not |
| 4072 | // basic types. |
| 4073 | if (Flags.isByVal()) { |
| 4074 | // Note: Size includes alignment padding, so |
| 4075 | // struct x { short a; char b; } |
| 4076 | // will have Size = 4. With #pragma pack(1), it will have Size = 3. |
| 4077 | // These are the proper values we need for right-justifying the |
| 4078 | // aggregate in a parameter register. |
| 4079 | unsigned Size = Flags.getByValSize(); |
Bill Schmidt | 9953cf2 | 2012-10-31 01:15:05 +0000 | [diff] [blame] | 4080 | |
| 4081 | // An empty aggregate parameter takes up no storage and no |
| 4082 | // registers. |
| 4083 | if (Size == 0) |
| 4084 | continue; |
| 4085 | |
Hal Finkel | 262a224 | 2013-09-12 23:20:06 +0000 | [diff] [blame] | 4086 | unsigned BVAlign = Flags.getByValAlign(); |
| 4087 | if (BVAlign > 8) { |
| 4088 | if (BVAlign % PtrByteSize != 0) |
| 4089 | llvm_unreachable( |
| 4090 | "ByVal alignment is not a multiple of the pointer size"); |
| 4091 | |
| 4092 | ArgOffset = ((ArgOffset+BVAlign-1)/BVAlign)*BVAlign; |
| 4093 | } |
| 4094 | |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4095 | // All aggregates smaller than 8 bytes must be passed right-justified. |
| 4096 | if (Size==1 || Size==2 || Size==4) { |
| 4097 | EVT VT = (Size==1) ? MVT::i8 : ((Size==2) ? MVT::i16 : MVT::i32); |
| 4098 | if (GPR_idx != NumGPRs) { |
| 4099 | SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, Arg, |
| 4100 | MachinePointerInfo(), VT, |
| 4101 | false, false, 0); |
| 4102 | MemOpChains.push_back(Load.getValue(1)); |
| 4103 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); |
| 4104 | |
| 4105 | ArgOffset += PtrByteSize; |
| 4106 | continue; |
| 4107 | } |
| 4108 | } |
| 4109 | |
| 4110 | if (GPR_idx == NumGPRs && Size < 8) { |
Ulrich Weigand | 59c6ab2 | 2014-06-20 16:34:05 +0000 | [diff] [blame] | 4111 | SDValue AddPtr = PtrOff; |
| 4112 | if (!isLittleEndian) { |
| 4113 | SDValue Const = DAG.getConstant(PtrByteSize - Size, |
| 4114 | PtrOff.getValueType()); |
| 4115 | AddPtr = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff, Const); |
| 4116 | } |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4117 | Chain = CallSeqStart = createMemcpyOutsideCallSeq(Arg, AddPtr, |
| 4118 | CallSeqStart, |
| 4119 | Flags, DAG, dl); |
| 4120 | ArgOffset += PtrByteSize; |
| 4121 | continue; |
| 4122 | } |
| 4123 | // Copy entire object into memory. There are cases where gcc-generated |
| 4124 | // code assumes it is there, even if it could be put entirely into |
| 4125 | // registers. (This is not what the doc says.) |
| 4126 | |
| 4127 | // FIXME: The above statement is likely due to a misunderstanding of the |
| 4128 | // documents. All arguments must be copied into the parameter area BY |
| 4129 | // THE CALLEE in the event that the callee takes the address of any |
| 4130 | // formal argument. That has not yet been implemented. However, it is |
| 4131 | // reasonable to use the stack area as a staging area for the register |
| 4132 | // load. |
| 4133 | |
| 4134 | // Skip this for small aggregates, as we will use the same slot for a |
| 4135 | // right-justified copy, below. |
| 4136 | if (Size >= 8) |
| 4137 | Chain = CallSeqStart = createMemcpyOutsideCallSeq(Arg, PtrOff, |
| 4138 | CallSeqStart, |
| 4139 | Flags, DAG, dl); |
| 4140 | |
| 4141 | // When a register is available, pass a small aggregate right-justified. |
| 4142 | if (Size < 8 && GPR_idx != NumGPRs) { |
| 4143 | // The easiest way to get this right-justified in a register |
| 4144 | // is to copy the structure into the rightmost portion of a |
| 4145 | // local variable slot, then load the whole slot into the |
| 4146 | // register. |
| 4147 | // FIXME: The memcpy seems to produce pretty awful code for |
| 4148 | // small aggregates, particularly for packed ones. |
Matt Arsenault | 75865923 | 2013-05-18 00:21:46 +0000 | [diff] [blame] | 4149 | // FIXME: It would be preferable to use the slot in the |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4150 | // parameter save area instead of a new local variable. |
Ulrich Weigand | 59c6ab2 | 2014-06-20 16:34:05 +0000 | [diff] [blame] | 4151 | SDValue AddPtr = PtrOff; |
| 4152 | if (!isLittleEndian) { |
| 4153 | SDValue Const = DAG.getConstant(8 - Size, PtrOff.getValueType()); |
| 4154 | AddPtr = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff, Const); |
| 4155 | } |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4156 | Chain = CallSeqStart = createMemcpyOutsideCallSeq(Arg, AddPtr, |
| 4157 | CallSeqStart, |
| 4158 | Flags, DAG, dl); |
| 4159 | |
| 4160 | // Load the slot into the register. |
| 4161 | SDValue Load = DAG.getLoad(PtrVT, dl, Chain, PtrOff, |
| 4162 | MachinePointerInfo(), |
| 4163 | false, false, false, 0); |
| 4164 | MemOpChains.push_back(Load.getValue(1)); |
| 4165 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); |
| 4166 | |
| 4167 | // Done with this argument. |
| 4168 | ArgOffset += PtrByteSize; |
| 4169 | continue; |
| 4170 | } |
| 4171 | |
| 4172 | // For aggregates larger than PtrByteSize, copy the pieces of the |
| 4173 | // object that fit into registers from the parameter save area. |
| 4174 | for (unsigned j=0; j<Size; j+=PtrByteSize) { |
| 4175 | SDValue Const = DAG.getConstant(j, PtrOff.getValueType()); |
| 4176 | SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const); |
| 4177 | if (GPR_idx != NumGPRs) { |
| 4178 | SDValue Load = DAG.getLoad(PtrVT, dl, Chain, AddArg, |
| 4179 | MachinePointerInfo(), |
| 4180 | false, false, false, 0); |
| 4181 | MemOpChains.push_back(Load.getValue(1)); |
| 4182 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); |
| 4183 | ArgOffset += PtrByteSize; |
| 4184 | } else { |
| 4185 | ArgOffset += ((Size - j + PtrByteSize-1)/PtrByteSize)*PtrByteSize; |
| 4186 | break; |
| 4187 | } |
| 4188 | } |
| 4189 | continue; |
| 4190 | } |
| 4191 | |
Craig Topper | 5671010 | 2013-08-15 02:33:50 +0000 | [diff] [blame] | 4192 | switch (Arg.getSimpleValueType().SimpleTy) { |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4193 | default: llvm_unreachable("Unexpected ValueType for argument!"); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 4194 | case MVT::i1: |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4195 | case MVT::i32: |
| 4196 | case MVT::i64: |
| 4197 | if (GPR_idx != NumGPRs) { |
| 4198 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg)); |
| 4199 | } else { |
| 4200 | LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset, |
| 4201 | true, isTailCall, false, MemOpChains, |
| 4202 | TailCallArguments, dl); |
| 4203 | } |
| 4204 | ArgOffset += PtrByteSize; |
| 4205 | break; |
| 4206 | case MVT::f32: |
| 4207 | case MVT::f64: |
| 4208 | if (FPR_idx != NumFPRs) { |
| 4209 | RegsToPass.push_back(std::make_pair(FPR[FPR_idx++], Arg)); |
| 4210 | |
| 4211 | if (isVarArg) { |
Bill Schmidt | bd4ac26 | 2012-10-29 21:18:16 +0000 | [diff] [blame] | 4212 | // A single float or an aggregate containing only a single float |
| 4213 | // must be passed right-justified in the stack doubleword, and |
| 4214 | // in the GPR, if one is available. |
| 4215 | SDValue StoreOff; |
Ulrich Weigand | 59c6ab2 | 2014-06-20 16:34:05 +0000 | [diff] [blame] | 4216 | if (Arg.getSimpleValueType().SimpleTy == MVT::f32 && |
| 4217 | !isLittleEndian) { |
Bill Schmidt | bd4ac26 | 2012-10-29 21:18:16 +0000 | [diff] [blame] | 4218 | SDValue ConstFour = DAG.getConstant(4, PtrOff.getValueType()); |
| 4219 | StoreOff = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff, ConstFour); |
| 4220 | } else |
| 4221 | StoreOff = PtrOff; |
| 4222 | |
| 4223 | SDValue Store = DAG.getStore(Chain, dl, Arg, StoreOff, |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4224 | MachinePointerInfo(), false, false, 0); |
| 4225 | MemOpChains.push_back(Store); |
| 4226 | |
| 4227 | // Float varargs are always shadowed in available integer registers |
| 4228 | if (GPR_idx != NumGPRs) { |
| 4229 | SDValue Load = DAG.getLoad(PtrVT, dl, Store, PtrOff, |
| 4230 | MachinePointerInfo(), false, false, |
| 4231 | false, 0); |
| 4232 | MemOpChains.push_back(Load.getValue(1)); |
| 4233 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); |
| 4234 | } |
| 4235 | } else if (GPR_idx != NumGPRs) |
| 4236 | // If we have any FPRs remaining, we may also have GPRs remaining. |
| 4237 | ++GPR_idx; |
| 4238 | } else { |
| 4239 | // Single-precision floating-point values are mapped to the |
| 4240 | // second (rightmost) word of the stack doubleword. |
Ulrich Weigand | 59c6ab2 | 2014-06-20 16:34:05 +0000 | [diff] [blame] | 4241 | if (Arg.getValueType() == MVT::f32 && !isLittleEndian) { |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4242 | SDValue ConstFour = DAG.getConstant(4, PtrOff.getValueType()); |
| 4243 | PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff, ConstFour); |
| 4244 | } |
| 4245 | |
| 4246 | LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset, |
| 4247 | true, isTailCall, false, MemOpChains, |
| 4248 | TailCallArguments, dl); |
| 4249 | } |
| 4250 | ArgOffset += 8; |
| 4251 | break; |
| 4252 | case MVT::v4f32: |
| 4253 | case MVT::v4i32: |
| 4254 | case MVT::v8i16: |
| 4255 | case MVT::v16i8: |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 4256 | case MVT::v2f64: |
Hal Finkel | a6c8b51 | 2014-03-26 16:12:58 +0000 | [diff] [blame] | 4257 | case MVT::v2i64: |
Ulrich Weigand | 9ba552d | 2014-06-23 12:36:34 +0000 | [diff] [blame] | 4258 | // Vectors are aligned to a 16-byte boundary in the argument save area. |
| 4259 | while (ArgOffset % 16 !=0) { |
| 4260 | ArgOffset += PtrByteSize; |
| 4261 | if (GPR_idx != NumGPRs) |
| 4262 | GPR_idx++; |
| 4263 | } |
| 4264 | |
| 4265 | // For a varargs call, named arguments go into VRs or on the stack as |
| 4266 | // usual; unnamed arguments always go to the stack or the corresponding |
| 4267 | // GPRs when within range. For now, we always put the value in both |
| 4268 | // locations (or even all three). |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4269 | if (isVarArg) { |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4270 | // We could elide this store in the case where the object fits |
| 4271 | // entirely in R registers. Maybe later. |
| 4272 | PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, |
| 4273 | DAG.getConstant(ArgOffset, PtrVT)); |
| 4274 | SDValue Store = DAG.getStore(Chain, dl, Arg, PtrOff, |
| 4275 | MachinePointerInfo(), false, false, 0); |
| 4276 | MemOpChains.push_back(Store); |
| 4277 | if (VR_idx != NumVRs) { |
| 4278 | SDValue Load = DAG.getLoad(MVT::v4f32, dl, Store, PtrOff, |
| 4279 | MachinePointerInfo(), |
| 4280 | false, false, false, 0); |
| 4281 | MemOpChains.push_back(Load.getValue(1)); |
Hal Finkel | 7811c61 | 2014-03-28 19:58:11 +0000 | [diff] [blame] | 4282 | |
| 4283 | unsigned VReg = (Arg.getSimpleValueType() == MVT::v2f64 || |
| 4284 | Arg.getSimpleValueType() == MVT::v2i64) ? |
| 4285 | VSRH[VR_idx] : VR[VR_idx]; |
| 4286 | ++VR_idx; |
| 4287 | |
| 4288 | RegsToPass.push_back(std::make_pair(VReg, Load)); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4289 | } |
| 4290 | ArgOffset += 16; |
| 4291 | for (unsigned i=0; i<16; i+=PtrByteSize) { |
| 4292 | if (GPR_idx == NumGPRs) |
| 4293 | break; |
| 4294 | SDValue Ix = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff, |
| 4295 | DAG.getConstant(i, PtrVT)); |
| 4296 | SDValue Load = DAG.getLoad(PtrVT, dl, Store, Ix, MachinePointerInfo(), |
| 4297 | false, false, false, 0); |
| 4298 | MemOpChains.push_back(Load.getValue(1)); |
| 4299 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); |
| 4300 | } |
| 4301 | break; |
| 4302 | } |
| 4303 | |
Ulrich Weigand | 9ba552d | 2014-06-23 12:36:34 +0000 | [diff] [blame] | 4304 | // Non-varargs Altivec params go into VRs or on the stack. |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4305 | if (VR_idx != NumVRs) { |
Hal Finkel | 7811c61 | 2014-03-28 19:58:11 +0000 | [diff] [blame] | 4306 | unsigned VReg = (Arg.getSimpleValueType() == MVT::v2f64 || |
| 4307 | Arg.getSimpleValueType() == MVT::v2i64) ? |
| 4308 | VSRH[VR_idx] : VR[VR_idx]; |
| 4309 | ++VR_idx; |
| 4310 | |
| 4311 | RegsToPass.push_back(std::make_pair(VReg, Arg)); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4312 | } else { |
| 4313 | LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset, |
| 4314 | true, isTailCall, true, MemOpChains, |
| 4315 | TailCallArguments, dl); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4316 | } |
Ulrich Weigand | 9ba552d | 2014-06-23 12:36:34 +0000 | [diff] [blame] | 4317 | ArgOffset += 16; |
| 4318 | GPR_idx = std::min(GPR_idx + 2, NumGPRs); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4319 | break; |
| 4320 | } |
| 4321 | } |
| 4322 | |
| 4323 | if (!MemOpChains.empty()) |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 4324 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4325 | |
| 4326 | // Check if this is an indirect call (MTCTR/BCTRL). |
| 4327 | // See PrepareCall() for more information about calls through function |
| 4328 | // pointers in the 64-bit SVR4 ABI. |
| 4329 | if (!isTailCall && |
| 4330 | !dyn_cast<GlobalAddressSDNode>(Callee) && |
Ulrich Weigand | 9aa09ef | 2014-06-18 16:14:04 +0000 | [diff] [blame] | 4331 | !dyn_cast<ExternalSymbolSDNode>(Callee)) { |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4332 | // Load r2 into a virtual register and store it to the TOC save area. |
| 4333 | SDValue Val = DAG.getCopyFromReg(Chain, dl, PPC::X2, MVT::i64); |
| 4334 | // TOC save area offset. |
Ulrich Weigand | ad0cb91 | 2014-06-18 17:52:49 +0000 | [diff] [blame] | 4335 | unsigned TOCSaveOffset = PPCFrameLowering::getTOCSaveOffset(); |
| 4336 | SDValue PtrOff = DAG.getIntPtrConstant(TOCSaveOffset); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4337 | SDValue AddPtr = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff); |
| 4338 | Chain = DAG.getStore(Val.getValue(1), dl, Val, AddPtr, MachinePointerInfo(), |
| 4339 | false, false, 0); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4340 | } |
| 4341 | |
| 4342 | // Build a sequence of copy-to-reg nodes chained together with token chain |
| 4343 | // and flag operands which copy the outgoing args into the appropriate regs. |
| 4344 | SDValue InFlag; |
| 4345 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
| 4346 | Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, |
| 4347 | RegsToPass[i].second, InFlag); |
| 4348 | InFlag = Chain.getValue(1); |
| 4349 | } |
| 4350 | |
| 4351 | if (isTailCall) |
| 4352 | PrepareTailCall(DAG, InFlag, Chain, dl, true, SPDiff, NumBytes, LROp, |
| 4353 | FPOp, true, TailCallArguments); |
| 4354 | |
| 4355 | return FinishCall(CallConv, dl, isTailCall, isVarArg, DAG, |
| 4356 | RegsToPass, InFlag, Chain, Callee, SPDiff, NumBytes, |
| 4357 | Ins, InVals); |
| 4358 | } |
| 4359 | |
| 4360 | SDValue |
| 4361 | PPCTargetLowering::LowerCall_Darwin(SDValue Chain, SDValue Callee, |
| 4362 | CallingConv::ID CallConv, bool isVarArg, |
| 4363 | bool isTailCall, |
| 4364 | const SmallVectorImpl<ISD::OutputArg> &Outs, |
| 4365 | const SmallVectorImpl<SDValue> &OutVals, |
| 4366 | const SmallVectorImpl<ISD::InputArg> &Ins, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 4367 | SDLoc dl, SelectionDAG &DAG, |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4368 | SmallVectorImpl<SDValue> &InVals) const { |
| 4369 | |
| 4370 | unsigned NumOps = Outs.size(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4371 | |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 4372 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4373 | bool isPPC64 = PtrVT == MVT::i64; |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 4374 | unsigned PtrByteSize = isPPC64 ? 8 : 4; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4375 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4376 | MachineFunction &MF = DAG.getMachineFunction(); |
| 4377 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4378 | // Mark this function as potentially containing a function that contains a |
| 4379 | // tail call. As a consequence the frame pointer will be used for dynamicalloc |
| 4380 | // and restoring the callers stack pointer in this functions epilog. This is |
| 4381 | // done because by tail calling the called function might overwrite the value |
| 4382 | // in this function's (MF) stack pointer stack slot 0(SP). |
Nick Lewycky | 50f02cb | 2011-12-02 22:16:29 +0000 | [diff] [blame] | 4383 | if (getTargetMachine().Options.GuaranteedTailCallOpt && |
| 4384 | CallConv == CallingConv::Fast) |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4385 | MF.getInfo<PPCFunctionInfo>()->setHasFastCall(); |
| 4386 | |
Chris Lattner | aa40ec1 | 2006-05-16 22:56:08 +0000 | [diff] [blame] | 4387 | // Count how many bytes are to be pushed on the stack, including the linkage |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 4388 | // area, and parameter passing area. We start with 24/48 bytes, which is |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4389 | // prereserved space for [SP][CR][LR][3 x unused]. |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 4390 | unsigned LinkageSize = PPCFrameLowering::getLinkageSize(isPPC64, true); |
| 4391 | unsigned NumBytes = LinkageSize; |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 4392 | |
| 4393 | // Add up all the space actually used. |
| 4394 | // In 32-bit non-varargs calls, Altivec parameters all go at the end; usually |
| 4395 | // they all go in registers, but we must reserve stack space for them for |
| 4396 | // possible use by the caller. In varargs or 64-bit calls, parameters are |
| 4397 | // assigned stack space in order, with padding so Altivec parameters are |
| 4398 | // 16-byte aligned. |
| 4399 | unsigned nAltivecParamsAtEnd = 0; |
| 4400 | for (unsigned i = 0; i != NumOps; ++i) { |
| 4401 | ISD::ArgFlagsTy Flags = Outs[i].Flags; |
| 4402 | EVT ArgVT = Outs[i].VT; |
| 4403 | // Varargs Altivec parameters are padded to a 16 byte boundary. |
| 4404 | if (ArgVT == MVT::v4f32 || ArgVT == MVT::v4i32 || |
| 4405 | ArgVT == MVT::v8i16 || ArgVT == MVT::v16i8 || |
| 4406 | ArgVT == MVT::v2f64 || ArgVT == MVT::v2i64) { |
| 4407 | if (!isVarArg && !isPPC64) { |
| 4408 | // Non-varargs Altivec parameters go after all the non-Altivec |
| 4409 | // parameters; handle those later so we know how much padding we need. |
| 4410 | nAltivecParamsAtEnd++; |
| 4411 | continue; |
| 4412 | } |
| 4413 | // Varargs and 64-bit Altivec parameters are padded to 16 byte boundary. |
| 4414 | NumBytes = ((NumBytes+15)/16)*16; |
| 4415 | } |
| 4416 | NumBytes += CalculateStackSlotSize(ArgVT, Flags, PtrByteSize); |
| 4417 | } |
| 4418 | |
| 4419 | // Allow for Altivec parameters at the end, if needed. |
| 4420 | if (nAltivecParamsAtEnd) { |
| 4421 | NumBytes = ((NumBytes+15)/16)*16; |
| 4422 | NumBytes += 16*nAltivecParamsAtEnd; |
| 4423 | } |
| 4424 | |
| 4425 | // The prolog code of the callee may store up to 8 GPR argument registers to |
| 4426 | // the stack, allowing va_start to index over them in memory if its varargs. |
| 4427 | // Because we cannot tell if this is needed on the caller side, we have to |
| 4428 | // conservatively assume that it is needed. As such, make sure we have at |
| 4429 | // least enough stack space for the caller to store the 8 GPRs. |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 4430 | NumBytes = std::max(NumBytes, LinkageSize + 8 * PtrByteSize); |
Ulrich Weigand | 2bffb95 | 2014-06-23 13:08:27 +0000 | [diff] [blame] | 4431 | |
| 4432 | // Tail call needs the stack to be aligned. |
| 4433 | if (getTargetMachine().Options.GuaranteedTailCallOpt && |
| 4434 | CallConv == CallingConv::Fast) |
| 4435 | NumBytes = EnsureStackAlignment(MF.getTarget(), NumBytes); |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 4436 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4437 | // Calculate by how many bytes the stack has to be adjusted in case of tail |
| 4438 | // call optimization. |
| 4439 | int SPDiff = CalculateTailCallSPDiff(DAG, isTailCall, NumBytes); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4440 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 4441 | // To protect arguments on the stack from being clobbered in a tail call, |
| 4442 | // force all the loads to happen before doing any other lowering. |
| 4443 | if (isTailCall) |
| 4444 | Chain = DAG.getStackArgumentTokenFactor(Chain); |
| 4445 | |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4446 | // Adjust the stack pointer for the new arguments... |
| 4447 | // These operations are automatically eliminated by the prolog/epilog pass |
Andrew Trick | ad6d08a | 2013-05-29 22:03:55 +0000 | [diff] [blame] | 4448 | Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true), |
| 4449 | dl); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4450 | SDValue CallSeqStart = Chain; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4451 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4452 | // Load the return address and frame pointer so it can be move somewhere else |
| 4453 | // later. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4454 | SDValue LROp, FPOp; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 4455 | Chain = EmitTailCallLoadFPAndRetAddr(DAG, SPDiff, Chain, LROp, FPOp, true, |
| 4456 | dl); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4457 | |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4458 | // Set up a copy of the stack pointer for use loading and storing any |
| 4459 | // arguments that may not fit in the registers available for argument |
| 4460 | // passing. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4461 | SDValue StackPtr; |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 4462 | if (isPPC64) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4463 | StackPtr = DAG.getRegister(PPC::X1, MVT::i64); |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 4464 | else |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4465 | StackPtr = DAG.getRegister(PPC::R1, MVT::i32); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4466 | |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4467 | // Figure out which arguments are going to go in registers, and which in |
| 4468 | // memory. Also, if this is a vararg function, floating point operations |
| 4469 | // must be stored to our stack, and loaded into integer regs as well, if |
| 4470 | // any integer regs are available for argument passing. |
Ulrich Weigand | 8ca988f | 2014-06-23 14:15:53 +0000 | [diff] [blame] | 4471 | unsigned ArgOffset = LinkageSize; |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4472 | unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4473 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 4474 | static const MCPhysReg GPR_32[] = { // 32-bit registers. |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4475 | PPC::R3, PPC::R4, PPC::R5, PPC::R6, |
| 4476 | PPC::R7, PPC::R8, PPC::R9, PPC::R10, |
| 4477 | }; |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 4478 | static const MCPhysReg GPR_64[] = { // 64-bit registers. |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 4479 | PPC::X3, PPC::X4, PPC::X5, PPC::X6, |
| 4480 | PPC::X7, PPC::X8, PPC::X9, PPC::X10, |
| 4481 | }; |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 4482 | static const MCPhysReg *FPR = GetFPR(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4483 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 4484 | static const MCPhysReg VR[] = { |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4485 | PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, |
| 4486 | PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 |
| 4487 | }; |
Owen Anderson | e2f23a3 | 2007-09-07 04:06:50 +0000 | [diff] [blame] | 4488 | const unsigned NumGPRs = array_lengthof(GPR_32); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4489 | const unsigned NumFPRs = 13; |
Tilmann Scheller | 98bdaaa | 2009-07-03 06:43:35 +0000 | [diff] [blame] | 4490 | const unsigned NumVRs = array_lengthof(VR); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4491 | |
Craig Topper | 840beec | 2014-04-04 05:16:06 +0000 | [diff] [blame] | 4492 | const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32; |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 4493 | |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4494 | SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4495 | SmallVector<TailCallArgumentInfo, 8> TailCallArguments; |
| 4496 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4497 | SmallVector<SDValue, 8> MemOpChains; |
Evan Cheng | c2cd473 | 2006-05-25 00:57:32 +0000 | [diff] [blame] | 4498 | for (unsigned i = 0; i != NumOps; ++i) { |
Dan Gohman | fe7532a | 2010-07-07 15:54:55 +0000 | [diff] [blame] | 4499 | SDValue Arg = OutVals[i]; |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 4500 | ISD::ArgFlagsTy Flags = Outs[i].Flags; |
Nicolas Geoffray | 7aad928 | 2007-03-13 15:02:46 +0000 | [diff] [blame] | 4501 | |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4502 | // PtrOff will be used to store the current argument to the stack if a |
| 4503 | // register cannot be found for it. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4504 | SDValue PtrOff; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4505 | |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4506 | PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType()); |
Nicolas Geoffray | 7aad928 | 2007-03-13 15:02:46 +0000 | [diff] [blame] | 4507 | |
Dale Johannesen | 679073b | 2009-02-04 02:34:38 +0000 | [diff] [blame] | 4508 | PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff); |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 4509 | |
| 4510 | // On PPC64, promote integers to 64-bit values. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4511 | if (isPPC64 && Arg.getValueType() == MVT::i32) { |
Duncan Sands | d97eea3 | 2008-03-21 09:14:45 +0000 | [diff] [blame] | 4512 | // FIXME: Should this use ANY_EXTEND if neither sext nor zext? |
| 4513 | unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4514 | Arg = DAG.getNode(ExtOp, dl, MVT::i64, Arg); |
Chris Lattner | ec78cad | 2006-06-26 22:48:35 +0000 | [diff] [blame] | 4515 | } |
Dale Johannesen | 85d41a1 | 2008-03-04 23:17:14 +0000 | [diff] [blame] | 4516 | |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 4517 | // FIXME memcpy is used way more than necessary. Correctness first. |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 4518 | // Note: "by value" is code for passing a structure by value, not |
| 4519 | // basic types. |
Duncan Sands | d97eea3 | 2008-03-21 09:14:45 +0000 | [diff] [blame] | 4520 | if (Flags.isByVal()) { |
| 4521 | unsigned Size = Flags.getByValSize(); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4522 | // Very small objects are passed right-justified. Everything else is |
| 4523 | // passed left-justified. |
| 4524 | if (Size==1 || Size==2) { |
| 4525 | EVT VT = (Size==1) ? MVT::i8 : MVT::i16; |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 4526 | if (GPR_idx != NumGPRs) { |
Stuart Hastings | 81c4306 | 2011-02-16 16:23:55 +0000 | [diff] [blame] | 4527 | SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, Arg, |
Chris Lattner | 3d178ed | 2010-09-21 17:04:51 +0000 | [diff] [blame] | 4528 | MachinePointerInfo(), VT, |
| 4529 | false, false, 0); |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 4530 | MemOpChains.push_back(Load.getValue(1)); |
| 4531 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4532 | |
| 4533 | ArgOffset += PtrByteSize; |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 4534 | } else { |
Bill Schmidt | 48081ca | 2012-10-16 13:30:53 +0000 | [diff] [blame] | 4535 | SDValue Const = DAG.getConstant(PtrByteSize - Size, |
| 4536 | PtrOff.getValueType()); |
Dale Johannesen | 679073b | 2009-02-04 02:34:38 +0000 | [diff] [blame] | 4537 | SDValue AddPtr = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff, Const); |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4538 | Chain = CallSeqStart = createMemcpyOutsideCallSeq(Arg, AddPtr, |
| 4539 | CallSeqStart, |
| 4540 | Flags, DAG, dl); |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 4541 | ArgOffset += PtrByteSize; |
| 4542 | } |
| 4543 | continue; |
| 4544 | } |
Dale Johannesen | 92dcf1e | 2008-03-17 02:13:43 +0000 | [diff] [blame] | 4545 | // Copy entire object into memory. There are cases where gcc-generated |
| 4546 | // code assumes it is there, even if it could be put entirely into |
| 4547 | // registers. (This is not what the doc says.) |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4548 | Chain = CallSeqStart = createMemcpyOutsideCallSeq(Arg, PtrOff, |
| 4549 | CallSeqStart, |
| 4550 | Flags, DAG, dl); |
Bill Schmidt | 019cc6f | 2012-09-19 15:42:13 +0000 | [diff] [blame] | 4551 | |
| 4552 | // For small aggregates (Darwin only) and aggregates >= PtrByteSize, |
| 4553 | // copy the pieces of the object that fit into registers from the |
| 4554 | // parameter save area. |
Dale Johannesen | 85d41a1 | 2008-03-04 23:17:14 +0000 | [diff] [blame] | 4555 | for (unsigned j=0; j<Size; j+=PtrByteSize) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4556 | SDValue Const = DAG.getConstant(j, PtrOff.getValueType()); |
Dale Johannesen | 679073b | 2009-02-04 02:34:38 +0000 | [diff] [blame] | 4557 | SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const); |
Dale Johannesen | 85d41a1 | 2008-03-04 23:17:14 +0000 | [diff] [blame] | 4558 | if (GPR_idx != NumGPRs) { |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 4559 | SDValue Load = DAG.getLoad(PtrVT, dl, Chain, AddArg, |
| 4560 | MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 4561 | false, false, false, 0); |
Dale Johannesen | 0d23505 | 2008-03-05 23:31:27 +0000 | [diff] [blame] | 4562 | MemOpChains.push_back(Load.getValue(1)); |
Dale Johannesen | 85d41a1 | 2008-03-04 23:17:14 +0000 | [diff] [blame] | 4563 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4564 | ArgOffset += PtrByteSize; |
Dale Johannesen | 85d41a1 | 2008-03-04 23:17:14 +0000 | [diff] [blame] | 4565 | } else { |
Dale Johannesen | 92dcf1e | 2008-03-17 02:13:43 +0000 | [diff] [blame] | 4566 | ArgOffset += ((Size - j + PtrByteSize-1)/PtrByteSize)*PtrByteSize; |
Dale Johannesen | bfa252d | 2008-03-07 20:27:40 +0000 | [diff] [blame] | 4567 | break; |
Dale Johannesen | 85d41a1 | 2008-03-04 23:17:14 +0000 | [diff] [blame] | 4568 | } |
| 4569 | } |
| 4570 | continue; |
| 4571 | } |
| 4572 | |
Craig Topper | 5671010 | 2013-08-15 02:33:50 +0000 | [diff] [blame] | 4573 | switch (Arg.getSimpleValueType().SimpleTy) { |
Torok Edwin | fbcc663 | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 4574 | default: llvm_unreachable("Unexpected ValueType for argument!"); |
Hal Finkel | 5cae216 | 2014-02-28 01:17:25 +0000 | [diff] [blame] | 4575 | case MVT::i1: |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4576 | case MVT::i32: |
| 4577 | case MVT::i64: |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4578 | if (GPR_idx != NumGPRs) { |
Hal Finkel | 7f908e8 | 2014-03-06 00:45:19 +0000 | [diff] [blame] | 4579 | if (Arg.getValueType() == MVT::i1) |
| 4580 | Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, PtrVT, Arg); |
| 4581 | |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4582 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg)); |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4583 | } else { |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4584 | LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset, |
| 4585 | isPPC64, isTailCall, false, MemOpChains, |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 4586 | TailCallArguments, dl); |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4587 | } |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4588 | ArgOffset += PtrByteSize; |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4589 | break; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4590 | case MVT::f32: |
| 4591 | case MVT::f64: |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4592 | if (FPR_idx != NumFPRs) { |
| 4593 | RegsToPass.push_back(std::make_pair(FPR[FPR_idx++], Arg)); |
| 4594 | |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4595 | if (isVarArg) { |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 4596 | SDValue Store = DAG.getStore(Chain, dl, Arg, PtrOff, |
| 4597 | MachinePointerInfo(), false, false, 0); |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4598 | MemOpChains.push_back(Store); |
| 4599 | |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4600 | // Float varargs are always shadowed in available integer registers |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4601 | if (GPR_idx != NumGPRs) { |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 4602 | SDValue Load = DAG.getLoad(PtrVT, dl, Store, PtrOff, |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 4603 | MachinePointerInfo(), false, false, |
| 4604 | false, 0); |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4605 | MemOpChains.push_back(Load.getValue(1)); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4606 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4607 | } |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4608 | if (GPR_idx != NumGPRs && Arg.getValueType() == MVT::f64 && !isPPC64){ |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4609 | SDValue ConstFour = DAG.getConstant(4, PtrOff.getValueType()); |
Dale Johannesen | 679073b | 2009-02-04 02:34:38 +0000 | [diff] [blame] | 4610 | PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff, ConstFour); |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 4611 | SDValue Load = DAG.getLoad(PtrVT, dl, Store, PtrOff, |
| 4612 | MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 4613 | false, false, false, 0); |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4614 | MemOpChains.push_back(Load.getValue(1)); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4615 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); |
Chris Lattner | aa40ec1 | 2006-05-16 22:56:08 +0000 | [diff] [blame] | 4616 | } |
| 4617 | } else { |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4618 | // If we have any FPRs remaining, we may also have GPRs remaining. |
| 4619 | // Args passed in FPRs consume either 1 (f32) or 2 (f64) available |
| 4620 | // GPRs. |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4621 | if (GPR_idx != NumGPRs) |
| 4622 | ++GPR_idx; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4623 | if (GPR_idx != NumGPRs && Arg.getValueType() == MVT::f64 && |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4624 | !isPPC64) // PPC64 has 64-bit GPR's obviously :) |
| 4625 | ++GPR_idx; |
Chris Lattner | aa40ec1 | 2006-05-16 22:56:08 +0000 | [diff] [blame] | 4626 | } |
Bill Schmidt | 57d6de5 | 2012-10-23 15:51:16 +0000 | [diff] [blame] | 4627 | } else |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4628 | LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset, |
| 4629 | isPPC64, isTailCall, false, MemOpChains, |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 4630 | TailCallArguments, dl); |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4631 | if (isPPC64) |
| 4632 | ArgOffset += 8; |
| 4633 | else |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4634 | ArgOffset += Arg.getValueType() == MVT::f32 ? 4 : 8; |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4635 | break; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4636 | case MVT::v4f32: |
| 4637 | case MVT::v4i32: |
| 4638 | case MVT::v8i16: |
| 4639 | case MVT::v16i8: |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 4640 | if (isVarArg) { |
| 4641 | // These go aligned on the stack, or in the corresponding R registers |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4642 | // when within range. The Darwin PPC ABI doc claims they also go in |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 4643 | // V registers; in fact gcc does this only for arguments that are |
| 4644 | // prototyped, not for those that match the ... We do it for all |
| 4645 | // arguments, seems to work. |
| 4646 | while (ArgOffset % 16 !=0) { |
| 4647 | ArgOffset += PtrByteSize; |
| 4648 | if (GPR_idx != NumGPRs) |
| 4649 | GPR_idx++; |
| 4650 | } |
| 4651 | // We could elide this store in the case where the object fits |
| 4652 | // entirely in R registers. Maybe later. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4653 | PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 4654 | DAG.getConstant(ArgOffset, PtrVT)); |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 4655 | SDValue Store = DAG.getStore(Chain, dl, Arg, PtrOff, |
| 4656 | MachinePointerInfo(), false, false, 0); |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 4657 | MemOpChains.push_back(Store); |
| 4658 | if (VR_idx != NumVRs) { |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 4659 | SDValue Load = DAG.getLoad(MVT::v4f32, dl, Store, PtrOff, |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 4660 | MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 4661 | false, false, false, 0); |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 4662 | MemOpChains.push_back(Load.getValue(1)); |
| 4663 | RegsToPass.push_back(std::make_pair(VR[VR_idx++], Load)); |
| 4664 | } |
| 4665 | ArgOffset += 16; |
| 4666 | for (unsigned i=0; i<16; i+=PtrByteSize) { |
| 4667 | if (GPR_idx == NumGPRs) |
| 4668 | break; |
Dale Johannesen | 679073b | 2009-02-04 02:34:38 +0000 | [diff] [blame] | 4669 | SDValue Ix = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff, |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 4670 | DAG.getConstant(i, PtrVT)); |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 4671 | SDValue Load = DAG.getLoad(PtrVT, dl, Store, Ix, MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 4672 | false, false, false, 0); |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 4673 | MemOpChains.push_back(Load.getValue(1)); |
| 4674 | RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); |
| 4675 | } |
| 4676 | break; |
| 4677 | } |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4678 | |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 4679 | // Non-varargs Altivec params generally go in registers, but have |
| 4680 | // stack space allocated at the end. |
| 4681 | if (VR_idx != NumVRs) { |
| 4682 | // Doesn't have GPR space allocated. |
| 4683 | RegsToPass.push_back(std::make_pair(VR[VR_idx++], Arg)); |
| 4684 | } else if (nAltivecParamsAtEnd==0) { |
| 4685 | // We are emitting Altivec params in order. |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4686 | LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset, |
| 4687 | isPPC64, isTailCall, true, MemOpChains, |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 4688 | TailCallArguments, dl); |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 4689 | ArgOffset += 16; |
Dale Johannesen | b28456e | 2008-03-12 00:22:17 +0000 | [diff] [blame] | 4690 | } |
Chris Lattner | b7552a8 | 2006-05-17 00:15:40 +0000 | [diff] [blame] | 4691 | break; |
Chris Lattner | aa40ec1 | 2006-05-16 22:56:08 +0000 | [diff] [blame] | 4692 | } |
Chris Lattner | aa40ec1 | 2006-05-16 22:56:08 +0000 | [diff] [blame] | 4693 | } |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 4694 | // If all Altivec parameters fit in registers, as they usually do, |
| 4695 | // they get stack space following the non-Altivec parameters. We |
| 4696 | // don't track this here because nobody below needs it. |
| 4697 | // If there are more Altivec parameters than fit in registers emit |
| 4698 | // the stores here. |
| 4699 | if (!isVarArg && nAltivecParamsAtEnd > NumVRs) { |
| 4700 | unsigned j = 0; |
| 4701 | // Offset is aligned; skip 1st 12 params which go in V registers. |
| 4702 | ArgOffset = ((ArgOffset+15)/16)*16; |
| 4703 | ArgOffset += 12*16; |
| 4704 | for (unsigned i = 0; i != NumOps; ++i) { |
Dan Gohman | fe7532a | 2010-07-07 15:54:55 +0000 | [diff] [blame] | 4705 | SDValue Arg = OutVals[i]; |
| 4706 | EVT ArgType = Outs[i].VT; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4707 | if (ArgType==MVT::v4f32 || ArgType==MVT::v4i32 || |
| 4708 | ArgType==MVT::v8i16 || ArgType==MVT::v16i8) { |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 4709 | if (++j > NumVRs) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4710 | SDValue PtrOff; |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4711 | // We are emitting Altivec params in order. |
| 4712 | LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset, |
| 4713 | isPPC64, isTailCall, true, MemOpChains, |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 4714 | TailCallArguments, dl); |
Dale Johannesen | 0dfd3f3 | 2008-03-14 17:41:26 +0000 | [diff] [blame] | 4715 | ArgOffset += 16; |
| 4716 | } |
| 4717 | } |
| 4718 | } |
| 4719 | } |
| 4720 | |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4721 | if (!MemOpChains.empty()) |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 4722 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4723 | |
Dale Johannesen | 90eab67 | 2010-03-09 20:15:42 +0000 | [diff] [blame] | 4724 | // On Darwin, R12 must contain the address of an indirect callee. This does |
| 4725 | // not mean the MTCTR instruction must use R12; it's easier to model this as |
| 4726 | // an extra parameter, so do that. |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 4727 | if (!isTailCall && |
Dale Johannesen | 90eab67 | 2010-03-09 20:15:42 +0000 | [diff] [blame] | 4728 | !dyn_cast<GlobalAddressSDNode>(Callee) && |
| 4729 | !dyn_cast<ExternalSymbolSDNode>(Callee) && |
| 4730 | !isBLACompatibleAddress(Callee, DAG)) |
| 4731 | RegsToPass.push_back(std::make_pair((unsigned)(isPPC64 ? PPC::X12 : |
| 4732 | PPC::R12), Callee)); |
| 4733 | |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4734 | // Build a sequence of copy-to-reg nodes chained together with token chain |
| 4735 | // and flag operands which copy the outgoing args into the appropriate regs. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4736 | SDValue InFlag; |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4737 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4738 | Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, |
Dale Johannesen | 679073b | 2009-02-04 02:34:38 +0000 | [diff] [blame] | 4739 | RegsToPass[i].second, InFlag); |
Chris Lattner | b1e9e37 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 4740 | InFlag = Chain.getValue(1); |
| 4741 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4742 | |
Chris Lattner | df8e17d | 2010-11-14 23:42:06 +0000 | [diff] [blame] | 4743 | if (isTailCall) |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4744 | PrepareTailCall(DAG, InFlag, Chain, dl, isPPC64, SPDiff, NumBytes, LROp, |
| 4745 | FPOp, true, TailCallArguments); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4746 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 4747 | return FinishCall(CallConv, dl, isTailCall, isVarArg, DAG, |
| 4748 | RegsToPass, InFlag, Chain, Callee, SPDiff, NumBytes, |
| 4749 | Ins, InVals); |
Chris Lattner | aa40ec1 | 2006-05-16 22:56:08 +0000 | [diff] [blame] | 4750 | } |
| 4751 | |
Hal Finkel | 450128a | 2011-10-14 19:51:36 +0000 | [diff] [blame] | 4752 | bool |
| 4753 | PPCTargetLowering::CanLowerReturn(CallingConv::ID CallConv, |
| 4754 | MachineFunction &MF, bool isVarArg, |
| 4755 | const SmallVectorImpl<ISD::OutputArg> &Outs, |
| 4756 | LLVMContext &Context) const { |
| 4757 | SmallVector<CCValAssign, 16> RVLocs; |
| 4758 | CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), |
| 4759 | RVLocs, Context); |
| 4760 | return CCInfo.CheckReturn(Outs, RetCC_PPC); |
| 4761 | } |
| 4762 | |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 4763 | SDValue |
| 4764 | PPCTargetLowering::LowerReturn(SDValue Chain, |
Sandeep Patel | 68c5f47 | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 4765 | CallingConv::ID CallConv, bool isVarArg, |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 4766 | const SmallVectorImpl<ISD::OutputArg> &Outs, |
Dan Gohman | fe7532a | 2010-07-07 15:54:55 +0000 | [diff] [blame] | 4767 | const SmallVectorImpl<SDValue> &OutVals, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 4768 | SDLoc dl, SelectionDAG &DAG) const { |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 4769 | |
Chris Lattner | 4f2e4e0 | 2007-03-06 00:59:59 +0000 | [diff] [blame] | 4770 | SmallVector<CCValAssign, 16> RVLocs; |
Eric Christopher | 0713a9d | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 4771 | CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), |
Gabor Greif | 180c444 | 2012-04-19 15:16:31 +0000 | [diff] [blame] | 4772 | getTargetMachine(), RVLocs, *DAG.getContext()); |
Dan Gohman | f9bbcd1 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 4773 | CCInfo.AnalyzeReturn(Outs, RetCC_PPC); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4774 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4775 | SDValue Flag; |
Jakob Stoklund Olesen | 8660a8c | 2013-02-05 18:12:00 +0000 | [diff] [blame] | 4776 | SmallVector<SDValue, 4> RetOps(1, Chain); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4777 | |
Chris Lattner | 4f2e4e0 | 2007-03-06 00:59:59 +0000 | [diff] [blame] | 4778 | // Copy the result values into the output registers. |
| 4779 | for (unsigned i = 0; i != RVLocs.size(); ++i) { |
| 4780 | CCValAssign &VA = RVLocs[i]; |
| 4781 | assert(VA.isRegLoc() && "Can only return in registers!"); |
Ulrich Weigand | 339d059 | 2012-11-05 19:39:45 +0000 | [diff] [blame] | 4782 | |
| 4783 | SDValue Arg = OutVals[i]; |
| 4784 | |
| 4785 | switch (VA.getLocInfo()) { |
| 4786 | default: llvm_unreachable("Unknown loc info!"); |
| 4787 | case CCValAssign::Full: break; |
| 4788 | case CCValAssign::AExt: |
| 4789 | Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); |
| 4790 | break; |
| 4791 | case CCValAssign::ZExt: |
| 4792 | Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); |
| 4793 | break; |
| 4794 | case CCValAssign::SExt: |
| 4795 | Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); |
| 4796 | break; |
| 4797 | } |
| 4798 | |
| 4799 | Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Arg, Flag); |
Chris Lattner | 4f2e4e0 | 2007-03-06 00:59:59 +0000 | [diff] [blame] | 4800 | Flag = Chain.getValue(1); |
Jakob Stoklund Olesen | 8660a8c | 2013-02-05 18:12:00 +0000 | [diff] [blame] | 4801 | RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); |
Chris Lattner | 4f2e4e0 | 2007-03-06 00:59:59 +0000 | [diff] [blame] | 4802 | } |
| 4803 | |
Jakob Stoklund Olesen | 8660a8c | 2013-02-05 18:12:00 +0000 | [diff] [blame] | 4804 | RetOps[0] = Chain; // Update chain. |
| 4805 | |
| 4806 | // Add the flag if we have it. |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 4807 | if (Flag.getNode()) |
Jakob Stoklund Olesen | 8660a8c | 2013-02-05 18:12:00 +0000 | [diff] [blame] | 4808 | RetOps.push_back(Flag); |
| 4809 | |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 4810 | return DAG.getNode(PPCISD::RET_FLAG, dl, MVT::Other, RetOps); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 4811 | } |
| 4812 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4813 | SDValue PPCTargetLowering::LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 4814 | const PPCSubtarget &Subtarget) const { |
Jim Laskey | e4f4d04 | 2006-12-04 22:04:42 +0000 | [diff] [blame] | 4815 | // When we pop the dynamic allocation we need to restore the SP link. |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 4816 | SDLoc dl(Op); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4817 | |
Jim Laskey | e4f4d04 | 2006-12-04 22:04:42 +0000 | [diff] [blame] | 4818 | // Get the corect type for pointers. |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 4819 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Jim Laskey | e4f4d04 | 2006-12-04 22:04:42 +0000 | [diff] [blame] | 4820 | |
| 4821 | // Construct the stack pointer operand. |
Dale Johannesen | 86dcae1 | 2009-11-24 01:09:07 +0000 | [diff] [blame] | 4822 | bool isPPC64 = Subtarget.isPPC64(); |
| 4823 | unsigned SP = isPPC64 ? PPC::X1 : PPC::R1; |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4824 | SDValue StackPtr = DAG.getRegister(SP, PtrVT); |
Jim Laskey | e4f4d04 | 2006-12-04 22:04:42 +0000 | [diff] [blame] | 4825 | |
| 4826 | // Get the operands for the STACKRESTORE. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4827 | SDValue Chain = Op.getOperand(0); |
| 4828 | SDValue SaveSP = Op.getOperand(1); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4829 | |
Jim Laskey | e4f4d04 | 2006-12-04 22:04:42 +0000 | [diff] [blame] | 4830 | // Load the old link SP. |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 4831 | SDValue LoadLinkSP = DAG.getLoad(PtrVT, dl, Chain, StackPtr, |
| 4832 | MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 4833 | false, false, false, 0); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4834 | |
Jim Laskey | e4f4d04 | 2006-12-04 22:04:42 +0000 | [diff] [blame] | 4835 | // Restore the stack pointer. |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 4836 | Chain = DAG.getCopyToReg(LoadLinkSP.getValue(1), dl, SP, SaveSP); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4837 | |
Jim Laskey | e4f4d04 | 2006-12-04 22:04:42 +0000 | [diff] [blame] | 4838 | // Store the old link SP. |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 4839 | return DAG.getStore(Chain, dl, LoadLinkSP, StackPtr, MachinePointerInfo(), |
David Greene | 87a5abe | 2010-02-15 16:56:53 +0000 | [diff] [blame] | 4840 | false, false, 0); |
Jim Laskey | e4f4d04 | 2006-12-04 22:04:42 +0000 | [diff] [blame] | 4841 | } |
| 4842 | |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4843 | |
| 4844 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4845 | SDValue |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4846 | PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG & DAG) const { |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4847 | MachineFunction &MF = DAG.getMachineFunction(); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 4848 | bool isPPC64 = Subtarget.isPPC64(); |
| 4849 | bool isDarwinABI = Subtarget.isDarwinABI(); |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 4850 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4851 | |
| 4852 | // Get current frame pointer save index. The users of this index will be |
| 4853 | // primarily DYNALLOC instructions. |
| 4854 | PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>(); |
| 4855 | int RASI = FI->getReturnAddrSaveIndex(); |
| 4856 | |
| 4857 | // If the frame pointer save index hasn't been defined yet. |
| 4858 | if (!RASI) { |
| 4859 | // Find out what the fix offset of the frame pointer save area. |
Anton Korobeynikov | 2f93128 | 2011-01-10 12:39:04 +0000 | [diff] [blame] | 4860 | int LROffset = PPCFrameLowering::getReturnSaveOffset(isPPC64, isDarwinABI); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4861 | // Allocate the frame index for frame pointer save area. |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 4862 | RASI = MF.getFrameInfo()->CreateFixedObject(isPPC64? 8 : 4, LROffset, true); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4863 | // Save the result. |
| 4864 | FI->setReturnAddrSaveIndex(RASI); |
| 4865 | } |
| 4866 | return DAG.getFrameIndex(RASI, PtrVT); |
| 4867 | } |
| 4868 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4869 | SDValue |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4870 | PPCTargetLowering::getFramePointerFrameIndex(SelectionDAG & DAG) const { |
| 4871 | MachineFunction &MF = DAG.getMachineFunction(); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 4872 | bool isPPC64 = Subtarget.isPPC64(); |
| 4873 | bool isDarwinABI = Subtarget.isDarwinABI(); |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 4874 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4875 | |
| 4876 | // Get current frame pointer save index. The users of this index will be |
| 4877 | // primarily DYNALLOC instructions. |
| 4878 | PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>(); |
| 4879 | int FPSI = FI->getFramePointerSaveIndex(); |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4880 | |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4881 | // If the frame pointer save index hasn't been defined yet. |
| 4882 | if (!FPSI) { |
| 4883 | // Find out what the fix offset of the frame pointer save area. |
Anton Korobeynikov | 2f93128 | 2011-01-10 12:39:04 +0000 | [diff] [blame] | 4884 | int FPOffset = PPCFrameLowering::getFramePointerSaveOffset(isPPC64, |
Tilmann Scheller | 773f14c | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 4885 | isDarwinABI); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4886 | |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4887 | // Allocate the frame index for frame pointer save area. |
Evan Cheng | 0664a67 | 2010-07-03 00:40:23 +0000 | [diff] [blame] | 4888 | FPSI = MF.getFrameInfo()->CreateFixedObject(isPPC64? 8 : 4, FPOffset, true); |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4889 | // Save the result. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4890 | FI->setFramePointerSaveIndex(FPSI); |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4891 | } |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4892 | return DAG.getFrameIndex(FPSI, PtrVT); |
| 4893 | } |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4894 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4895 | SDValue PPCTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op, |
Arnold Schwaighofer | be0de34 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 4896 | SelectionDAG &DAG, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 4897 | const PPCSubtarget &Subtarget) const { |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4898 | // Get the inputs. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4899 | SDValue Chain = Op.getOperand(0); |
| 4900 | SDValue Size = Op.getOperand(1); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 4901 | SDLoc dl(Op); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4902 | |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4903 | // Get the corect type for pointers. |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 4904 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4905 | // Negate the size. |
Dale Johannesen | 400dc2e | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 4906 | SDValue NegSize = DAG.getNode(ISD::SUB, dl, PtrVT, |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4907 | DAG.getConstant(0, PtrVT), Size); |
| 4908 | // Construct a node for the frame pointer save index. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4909 | SDValue FPSIdx = getFramePointerFrameIndex(DAG); |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4910 | // Build a DYNALLOC node. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4911 | SDValue Ops[3] = { Chain, NegSize, FPSIdx }; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 4912 | SDVTList VTs = DAG.getVTList(PtrVT, MVT::Other); |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 4913 | return DAG.getNode(PPCISD::DYNALLOC, dl, VTs, Ops); |
Jim Laskey | 48850c1 | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 4914 | } |
| 4915 | |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 4916 | SDValue PPCTargetLowering::lowerEH_SJLJ_SETJMP(SDValue Op, |
| 4917 | SelectionDAG &DAG) const { |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 4918 | SDLoc DL(Op); |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 4919 | return DAG.getNode(PPCISD::EH_SJLJ_SETJMP, DL, |
| 4920 | DAG.getVTList(MVT::i32, MVT::Other), |
| 4921 | Op.getOperand(0), Op.getOperand(1)); |
| 4922 | } |
| 4923 | |
| 4924 | SDValue PPCTargetLowering::lowerEH_SJLJ_LONGJMP(SDValue Op, |
| 4925 | SelectionDAG &DAG) const { |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 4926 | SDLoc DL(Op); |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 4927 | return DAG.getNode(PPCISD::EH_SJLJ_LONGJMP, DL, MVT::Other, |
| 4928 | Op.getOperand(0), Op.getOperand(1)); |
| 4929 | } |
| 4930 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 4931 | SDValue PPCTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { |
| 4932 | assert(Op.getValueType() == MVT::i1 && |
| 4933 | "Custom lowering only for i1 loads"); |
| 4934 | |
| 4935 | // First, load 8 bits into 32 bits, then truncate to 1 bit. |
| 4936 | |
| 4937 | SDLoc dl(Op); |
| 4938 | LoadSDNode *LD = cast<LoadSDNode>(Op); |
| 4939 | |
| 4940 | SDValue Chain = LD->getChain(); |
| 4941 | SDValue BasePtr = LD->getBasePtr(); |
| 4942 | MachineMemOperand *MMO = LD->getMemOperand(); |
| 4943 | |
| 4944 | SDValue NewLD = DAG.getExtLoad(ISD::EXTLOAD, dl, getPointerTy(), Chain, |
| 4945 | BasePtr, MVT::i8, MMO); |
| 4946 | SDValue Result = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, NewLD); |
| 4947 | |
| 4948 | SDValue Ops[] = { Result, SDValue(NewLD.getNode(), 1) }; |
Craig Topper | 64941d9 | 2014-04-27 19:20:57 +0000 | [diff] [blame] | 4949 | return DAG.getMergeValues(Ops, dl); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 4950 | } |
| 4951 | |
| 4952 | SDValue PPCTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const { |
| 4953 | assert(Op.getOperand(1).getValueType() == MVT::i1 && |
| 4954 | "Custom lowering only for i1 stores"); |
| 4955 | |
| 4956 | // First, zero extend to 32 bits, then use a truncating store to 8 bits. |
| 4957 | |
| 4958 | SDLoc dl(Op); |
| 4959 | StoreSDNode *ST = cast<StoreSDNode>(Op); |
| 4960 | |
| 4961 | SDValue Chain = ST->getChain(); |
| 4962 | SDValue BasePtr = ST->getBasePtr(); |
| 4963 | SDValue Value = ST->getValue(); |
| 4964 | MachineMemOperand *MMO = ST->getMemOperand(); |
| 4965 | |
| 4966 | Value = DAG.getNode(ISD::ZERO_EXTEND, dl, getPointerTy(), Value); |
| 4967 | return DAG.getTruncStore(Chain, dl, Value, BasePtr, MVT::i8, MMO); |
| 4968 | } |
| 4969 | |
| 4970 | // FIXME: Remove this once the ANDI glue bug is fixed: |
| 4971 | SDValue PPCTargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const { |
| 4972 | assert(Op.getValueType() == MVT::i1 && |
| 4973 | "Custom lowering only for i1 results"); |
| 4974 | |
| 4975 | SDLoc DL(Op); |
| 4976 | return DAG.getNode(PPCISD::ANDIo_1_GT_BIT, DL, MVT::i1, |
| 4977 | Op.getOperand(0)); |
| 4978 | } |
| 4979 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 4980 | /// LowerSELECT_CC - Lower floating point select_cc's into fsel instruction when |
| 4981 | /// possible. |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 4982 | SDValue PPCTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const { |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 4983 | // Not FP? Not a fsel. |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 4984 | if (!Op.getOperand(0).getValueType().isFloatingPoint() || |
| 4985 | !Op.getOperand(2).getValueType().isFloatingPoint()) |
Eli Friedman | 5806e18 | 2009-05-28 04:31:08 +0000 | [diff] [blame] | 4986 | return Op; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4987 | |
Hal Finkel | 81f8799 | 2013-04-07 22:11:09 +0000 | [diff] [blame] | 4988 | // We might be able to do better than this under some circumstances, but in |
| 4989 | // general, fsel-based lowering of select is a finite-math-only optimization. |
| 4990 | // For more information, see section F.3 of the 2.06 ISA specification. |
| 4991 | if (!DAG.getTarget().Options.NoInfsFPMath || |
| 4992 | !DAG.getTarget().Options.NoNaNsFPMath) |
| 4993 | return Op; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4994 | |
Hal Finkel | 81f8799 | 2013-04-07 22:11:09 +0000 | [diff] [blame] | 4995 | ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 4996 | |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 4997 | EVT ResVT = Op.getValueType(); |
| 4998 | EVT CmpVT = Op.getOperand(0).getValueType(); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 4999 | SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1); |
| 5000 | SDValue TV = Op.getOperand(2), FV = Op.getOperand(3); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5001 | SDLoc dl(Op); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5002 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5003 | // If the RHS of the comparison is a 0.0, we don't need to do the |
| 5004 | // subtraction at all. |
Hal Finkel | 81f8799 | 2013-04-07 22:11:09 +0000 | [diff] [blame] | 5005 | SDValue Sel1; |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5006 | if (isFloatingPointZero(RHS)) |
| 5007 | switch (CC) { |
| 5008 | default: break; // SETUO etc aren't handled by fsel. |
Hal Finkel | 81f8799 | 2013-04-07 22:11:09 +0000 | [diff] [blame] | 5009 | case ISD::SETNE: |
| 5010 | std::swap(TV, FV); |
| 5011 | case ISD::SETEQ: |
| 5012 | if (LHS.getValueType() == MVT::f32) // Comparison is always 64-bits |
| 5013 | LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS); |
| 5014 | Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV); |
| 5015 | if (Sel1.getValueType() == MVT::f32) // Comparison is always 64-bits |
| 5016 | Sel1 = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Sel1); |
| 5017 | return DAG.getNode(PPCISD::FSEL, dl, ResVT, |
| 5018 | DAG.getNode(ISD::FNEG, dl, MVT::f64, LHS), Sel1, FV); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5019 | case ISD::SETULT: |
| 5020 | case ISD::SETLT: |
| 5021 | std::swap(TV, FV); // fsel is natively setge, swap operands for setlt |
Chris Lattner | b56d22c | 2006-05-24 00:06:44 +0000 | [diff] [blame] | 5022 | case ISD::SETOGE: |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5023 | case ISD::SETGE: |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5024 | if (LHS.getValueType() == MVT::f32) // Comparison is always 64-bits |
| 5025 | LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS); |
Dale Johannesen | 400dc2e | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 5026 | return DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5027 | case ISD::SETUGT: |
| 5028 | case ISD::SETGT: |
| 5029 | std::swap(TV, FV); // fsel is natively setge, swap operands for setlt |
Chris Lattner | b56d22c | 2006-05-24 00:06:44 +0000 | [diff] [blame] | 5030 | case ISD::SETOLE: |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5031 | case ISD::SETLE: |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5032 | if (LHS.getValueType() == MVT::f32) // Comparison is always 64-bits |
| 5033 | LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS); |
Dale Johannesen | 400dc2e | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 5034 | return DAG.getNode(PPCISD::FSEL, dl, ResVT, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5035 | DAG.getNode(ISD::FNEG, dl, MVT::f64, LHS), TV, FV); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5036 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5037 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5038 | SDValue Cmp; |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5039 | switch (CC) { |
| 5040 | default: break; // SETUO etc aren't handled by fsel. |
Hal Finkel | 81f8799 | 2013-04-07 22:11:09 +0000 | [diff] [blame] | 5041 | case ISD::SETNE: |
| 5042 | std::swap(TV, FV); |
| 5043 | case ISD::SETEQ: |
| 5044 | Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS); |
| 5045 | if (Cmp.getValueType() == MVT::f32) // Comparison is always 64-bits |
| 5046 | Cmp = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Cmp); |
| 5047 | Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, TV, FV); |
| 5048 | if (Sel1.getValueType() == MVT::f32) // Comparison is always 64-bits |
| 5049 | Sel1 = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Sel1); |
| 5050 | return DAG.getNode(PPCISD::FSEL, dl, ResVT, |
| 5051 | DAG.getNode(ISD::FNEG, dl, MVT::f64, Cmp), Sel1, FV); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5052 | case ISD::SETULT: |
| 5053 | case ISD::SETLT: |
Dale Johannesen | 400dc2e | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 5054 | Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5055 | if (Cmp.getValueType() == MVT::f32) // Comparison is always 64-bits |
| 5056 | Cmp = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Cmp); |
Hal Finkel | 81f8799 | 2013-04-07 22:11:09 +0000 | [diff] [blame] | 5057 | return DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, FV, TV); |
Chris Lattner | b56d22c | 2006-05-24 00:06:44 +0000 | [diff] [blame] | 5058 | case ISD::SETOGE: |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5059 | case ISD::SETGE: |
Dale Johannesen | 400dc2e | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 5060 | Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5061 | if (Cmp.getValueType() == MVT::f32) // Comparison is always 64-bits |
| 5062 | Cmp = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Cmp); |
Hal Finkel | 81f8799 | 2013-04-07 22:11:09 +0000 | [diff] [blame] | 5063 | return DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, TV, FV); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5064 | case ISD::SETUGT: |
| 5065 | case ISD::SETGT: |
Dale Johannesen | 400dc2e | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 5066 | Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5067 | if (Cmp.getValueType() == MVT::f32) // Comparison is always 64-bits |
| 5068 | Cmp = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Cmp); |
Hal Finkel | 81f8799 | 2013-04-07 22:11:09 +0000 | [diff] [blame] | 5069 | return DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, FV, TV); |
Chris Lattner | b56d22c | 2006-05-24 00:06:44 +0000 | [diff] [blame] | 5070 | case ISD::SETOLE: |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5071 | case ISD::SETLE: |
Dale Johannesen | 400dc2e | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 5072 | Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5073 | if (Cmp.getValueType() == MVT::f32) // Comparison is always 64-bits |
| 5074 | Cmp = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Cmp); |
Hal Finkel | 81f8799 | 2013-04-07 22:11:09 +0000 | [diff] [blame] | 5075 | return DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, TV, FV); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5076 | } |
Eli Friedman | 5806e18 | 2009-05-28 04:31:08 +0000 | [diff] [blame] | 5077 | return Op; |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5078 | } |
| 5079 | |
Chris Lattner | 57ee7c6 | 2007-11-28 18:44:47 +0000 | [diff] [blame] | 5080 | // FIXME: Split this code up when LegalizeDAGTypes lands. |
Dale Johannesen | 37bc85f | 2009-06-04 20:53:52 +0000 | [diff] [blame] | 5081 | SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5082 | SDLoc dl) const { |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 5083 | assert(Op.getOperand(0).getValueType().isFloatingPoint()); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5084 | SDValue Src = Op.getOperand(0); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5085 | if (Src.getValueType() == MVT::f32) |
| 5086 | Src = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Src); |
Duncan Sands | 2a28791 | 2008-07-19 16:26:02 +0000 | [diff] [blame] | 5087 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5088 | SDValue Tmp; |
Craig Topper | 5671010 | 2013-08-15 02:33:50 +0000 | [diff] [blame] | 5089 | switch (Op.getSimpleValueType().SimpleTy) { |
Torok Edwin | fbcc663 | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 5090 | default: llvm_unreachable("Unhandled FP_TO_INT type in custom expander!"); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5091 | case MVT::i32: |
Dale Johannesen | 37bc85f | 2009-06-04 20:53:52 +0000 | [diff] [blame] | 5092 | Tmp = DAG.getNode(Op.getOpcode()==ISD::FP_TO_SINT ? PPCISD::FCTIWZ : |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5093 | (Subtarget.hasFPCVT() ? PPCISD::FCTIWUZ : |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5094 | PPCISD::FCTIDZ), |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5095 | dl, MVT::f64, Src); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5096 | break; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5097 | case MVT::i64: |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5098 | assert((Op.getOpcode() == ISD::FP_TO_SINT || Subtarget.hasFPCVT()) && |
Hal Finkel | 3f88d08 | 2013-04-01 18:42:58 +0000 | [diff] [blame] | 5099 | "i64 FP_TO_UINT is supported only with FPCVT"); |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5100 | Tmp = DAG.getNode(Op.getOpcode()==ISD::FP_TO_SINT ? PPCISD::FCTIDZ : |
| 5101 | PPCISD::FCTIDUZ, |
| 5102 | dl, MVT::f64, Src); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5103 | break; |
| 5104 | } |
Duncan Sands | 2a28791 | 2008-07-19 16:26:02 +0000 | [diff] [blame] | 5105 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5106 | // Convert the FP value to an int value through memory. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5107 | bool i32Stack = Op.getValueType() == MVT::i32 && Subtarget.hasSTFIWX() && |
| 5108 | (Op.getOpcode() == ISD::FP_TO_SINT || Subtarget.hasFPCVT()); |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5109 | SDValue FIPtr = DAG.CreateStackTemporary(i32Stack ? MVT::i32 : MVT::f64); |
| 5110 | int FI = cast<FrameIndexSDNode>(FIPtr)->getIndex(); |
| 5111 | MachinePointerInfo MPI = MachinePointerInfo::getFixedStack(FI); |
Duncan Sands | 2a28791 | 2008-07-19 16:26:02 +0000 | [diff] [blame] | 5112 | |
Chris Lattner | 06a4954 | 2007-10-15 20:14:52 +0000 | [diff] [blame] | 5113 | // Emit a store to the stack slot. |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5114 | SDValue Chain; |
| 5115 | if (i32Stack) { |
| 5116 | MachineFunction &MF = DAG.getMachineFunction(); |
| 5117 | MachineMemOperand *MMO = |
| 5118 | MF.getMachineMemOperand(MPI, MachineMemOperand::MOStore, 4, 4); |
| 5119 | SDValue Ops[] = { DAG.getEntryNode(), Tmp, FIPtr }; |
| 5120 | Chain = DAG.getMemIntrinsicNode(PPCISD::STFIWX, dl, |
Craig Topper | 206fcd4 | 2014-04-26 19:29:41 +0000 | [diff] [blame] | 5121 | DAG.getVTList(MVT::Other), Ops, MVT::i32, MMO); |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5122 | } else |
| 5123 | Chain = DAG.getStore(DAG.getEntryNode(), dl, Tmp, FIPtr, |
| 5124 | MPI, false, false, 0); |
Chris Lattner | 06a4954 | 2007-10-15 20:14:52 +0000 | [diff] [blame] | 5125 | |
| 5126 | // Result is a load from the stack slot. If loading 4 bytes, make sure to |
| 5127 | // add in a bias. |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5128 | if (Op.getValueType() == MVT::i32 && !i32Stack) { |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 5129 | FIPtr = DAG.getNode(ISD::ADD, dl, FIPtr.getValueType(), FIPtr, |
Chris Lattner | 06a4954 | 2007-10-15 20:14:52 +0000 | [diff] [blame] | 5130 | DAG.getConstant(4, FIPtr.getValueType())); |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5131 | MPI = MachinePointerInfo(); |
| 5132 | } |
| 5133 | |
| 5134 | return DAG.getLoad(Op.getValueType(), dl, Chain, FIPtr, MPI, |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 5135 | false, false, false, 0); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5136 | } |
| 5137 | |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5138 | SDValue PPCTargetLowering::LowerINT_TO_FP(SDValue Op, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 5139 | SelectionDAG &DAG) const { |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5140 | SDLoc dl(Op); |
Dan Gohman | d6819da | 2008-03-11 01:59:03 +0000 | [diff] [blame] | 5141 | // Don't handle ppc_fp128 here; let it be lowered to a libcall. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5142 | if (Op.getValueType() != MVT::f32 && Op.getValueType() != MVT::f64) |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5143 | return SDValue(); |
Dan Gohman | d6819da | 2008-03-11 01:59:03 +0000 | [diff] [blame] | 5144 | |
Hal Finkel | 6a56b21 | 2014-03-05 22:14:00 +0000 | [diff] [blame] | 5145 | if (Op.getOperand(0).getValueType() == MVT::i1) |
| 5146 | return DAG.getNode(ISD::SELECT, dl, Op.getValueType(), Op.getOperand(0), |
| 5147 | DAG.getConstantFP(1.0, Op.getValueType()), |
| 5148 | DAG.getConstantFP(0.0, Op.getValueType())); |
| 5149 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5150 | assert((Op.getOpcode() == ISD::SINT_TO_FP || Subtarget.hasFPCVT()) && |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5151 | "UINT_TO_FP is supported only with FPCVT"); |
| 5152 | |
| 5153 | // If we have FCFIDS, then use it when converting to single-precision. |
Hal Finkel | 93d75ea | 2013-04-02 03:29:51 +0000 | [diff] [blame] | 5154 | // Otherwise, convert to double-precision and then round. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5155 | unsigned FCFOp = (Subtarget.hasFPCVT() && Op.getValueType() == MVT::f32) ? |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5156 | (Op.getOpcode() == ISD::UINT_TO_FP ? |
| 5157 | PPCISD::FCFIDUS : PPCISD::FCFIDS) : |
| 5158 | (Op.getOpcode() == ISD::UINT_TO_FP ? |
| 5159 | PPCISD::FCFIDU : PPCISD::FCFID); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5160 | MVT FCFTy = (Subtarget.hasFPCVT() && Op.getValueType() == MVT::f32) ? |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5161 | MVT::f32 : MVT::f64; |
| 5162 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5163 | if (Op.getOperand(0).getValueType() == MVT::i64) { |
Ulrich Weigand | d34b5bd | 2012-10-18 13:16:11 +0000 | [diff] [blame] | 5164 | SDValue SINT = Op.getOperand(0); |
| 5165 | // When converting to single-precision, we actually need to convert |
| 5166 | // to double-precision first and then round to single-precision. |
| 5167 | // To avoid double-rounding effects during that operation, we have |
| 5168 | // to prepare the input operand. Bits that might be truncated when |
| 5169 | // converting to double-precision are replaced by a bit that won't |
| 5170 | // be lost at this stage, but is below the single-precision rounding |
| 5171 | // position. |
| 5172 | // |
| 5173 | // However, if -enable-unsafe-fp-math is in effect, accept double |
| 5174 | // rounding to avoid the extra overhead. |
| 5175 | if (Op.getValueType() == MVT::f32 && |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5176 | !Subtarget.hasFPCVT() && |
Ulrich Weigand | d34b5bd | 2012-10-18 13:16:11 +0000 | [diff] [blame] | 5177 | !DAG.getTarget().Options.UnsafeFPMath) { |
| 5178 | |
| 5179 | // Twiddle input to make sure the low 11 bits are zero. (If this |
| 5180 | // is the case, we are guaranteed the value will fit into the 53 bit |
| 5181 | // mantissa of an IEEE double-precision value without rounding.) |
| 5182 | // If any of those low 11 bits were not zero originally, make sure |
| 5183 | // bit 12 (value 2048) is set instead, so that the final rounding |
| 5184 | // to single-precision gets the correct result. |
| 5185 | SDValue Round = DAG.getNode(ISD::AND, dl, MVT::i64, |
| 5186 | SINT, DAG.getConstant(2047, MVT::i64)); |
| 5187 | Round = DAG.getNode(ISD::ADD, dl, MVT::i64, |
| 5188 | Round, DAG.getConstant(2047, MVT::i64)); |
| 5189 | Round = DAG.getNode(ISD::OR, dl, MVT::i64, Round, SINT); |
| 5190 | Round = DAG.getNode(ISD::AND, dl, MVT::i64, |
| 5191 | Round, DAG.getConstant(-2048, MVT::i64)); |
| 5192 | |
| 5193 | // However, we cannot use that value unconditionally: if the magnitude |
| 5194 | // of the input value is small, the bit-twiddling we did above might |
| 5195 | // end up visibly changing the output. Fortunately, in that case, we |
| 5196 | // don't need to twiddle bits since the original input will convert |
| 5197 | // exactly to double-precision floating-point already. Therefore, |
| 5198 | // construct a conditional to use the original value if the top 11 |
| 5199 | // bits are all sign-bit copies, and use the rounded value computed |
| 5200 | // above otherwise. |
| 5201 | SDValue Cond = DAG.getNode(ISD::SRA, dl, MVT::i64, |
| 5202 | SINT, DAG.getConstant(53, MVT::i32)); |
| 5203 | Cond = DAG.getNode(ISD::ADD, dl, MVT::i64, |
| 5204 | Cond, DAG.getConstant(1, MVT::i64)); |
| 5205 | Cond = DAG.getSetCC(dl, MVT::i32, |
| 5206 | Cond, DAG.getConstant(1, MVT::i64), ISD::SETUGT); |
| 5207 | |
| 5208 | SINT = DAG.getNode(ISD::SELECT, dl, MVT::i64, Cond, Round, SINT); |
| 5209 | } |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5210 | |
Ulrich Weigand | d34b5bd | 2012-10-18 13:16:11 +0000 | [diff] [blame] | 5211 | SDValue Bits = DAG.getNode(ISD::BITCAST, dl, MVT::f64, SINT); |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5212 | SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Bits); |
| 5213 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5214 | if (Op.getValueType() == MVT::f32 && !Subtarget.hasFPCVT()) |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5215 | FP = DAG.getNode(ISD::FP_ROUND, dl, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5216 | MVT::f32, FP, DAG.getIntPtrConstant(0)); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5217 | return FP; |
| 5218 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5219 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5220 | assert(Op.getOperand(0).getValueType() == MVT::i32 && |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5221 | "Unhandled INT_TO_FP type in custom expander!"); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5222 | // Since we only generate this in 64-bit mode, we can take advantage of |
| 5223 | // 64-bit registers. In particular, sign extend the input value into the |
| 5224 | // 64-bit register with extsw, store the WHOLE 64-bit value into the stack |
| 5225 | // then lfd it and fcfid it. |
Dan Gohman | 48b185d | 2009-09-25 20:36:54 +0000 | [diff] [blame] | 5226 | MachineFunction &MF = DAG.getMachineFunction(); |
| 5227 | MachineFrameInfo *FrameInfo = MF.getFrameInfo(); |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5228 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5229 | |
Hal Finkel | beb296b | 2013-03-31 10:12:51 +0000 | [diff] [blame] | 5230 | SDValue Ld; |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5231 | if (Subtarget.hasLFIWAX() || Subtarget.hasFPCVT()) { |
Hal Finkel | beb296b | 2013-03-31 10:12:51 +0000 | [diff] [blame] | 5232 | int FrameIdx = FrameInfo->CreateStackObject(4, 4, false); |
| 5233 | SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5234 | |
Hal Finkel | beb296b | 2013-03-31 10:12:51 +0000 | [diff] [blame] | 5235 | SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0), FIdx, |
| 5236 | MachinePointerInfo::getFixedStack(FrameIdx), |
| 5237 | false, false, 0); |
Hal Finkel | e53429a | 2013-03-31 01:58:02 +0000 | [diff] [blame] | 5238 | |
Hal Finkel | beb296b | 2013-03-31 10:12:51 +0000 | [diff] [blame] | 5239 | assert(cast<StoreSDNode>(Store)->getMemoryVT() == MVT::i32 && |
| 5240 | "Expected an i32 store"); |
| 5241 | MachineMemOperand *MMO = |
| 5242 | MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx), |
| 5243 | MachineMemOperand::MOLoad, 4, 4); |
| 5244 | SDValue Ops[] = { Store, FIdx }; |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5245 | Ld = DAG.getMemIntrinsicNode(Op.getOpcode() == ISD::UINT_TO_FP ? |
| 5246 | PPCISD::LFIWZX : PPCISD::LFIWAX, |
| 5247 | dl, DAG.getVTList(MVT::f64, MVT::Other), |
Craig Topper | 206fcd4 | 2014-04-26 19:29:41 +0000 | [diff] [blame] | 5248 | Ops, MVT::i32, MMO); |
Hal Finkel | beb296b | 2013-03-31 10:12:51 +0000 | [diff] [blame] | 5249 | } else { |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5250 | assert(Subtarget.isPPC64() && |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5251 | "i32->FP without LFIWAX supported only on PPC64"); |
| 5252 | |
Hal Finkel | beb296b | 2013-03-31 10:12:51 +0000 | [diff] [blame] | 5253 | int FrameIdx = FrameInfo->CreateStackObject(8, 8, false); |
| 5254 | SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT); |
| 5255 | |
| 5256 | SDValue Ext64 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i64, |
| 5257 | Op.getOperand(0)); |
| 5258 | |
| 5259 | // STD the extended value into the stack slot. |
| 5260 | SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Ext64, FIdx, |
| 5261 | MachinePointerInfo::getFixedStack(FrameIdx), |
| 5262 | false, false, 0); |
| 5263 | |
| 5264 | // Load the value as a double. |
| 5265 | Ld = DAG.getLoad(MVT::f64, dl, Store, FIdx, |
| 5266 | MachinePointerInfo::getFixedStack(FrameIdx), |
| 5267 | false, false, false, 0); |
| 5268 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5269 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5270 | // FCFID it and return it. |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 5271 | SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Ld); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5272 | if (Op.getValueType() == MVT::f32 && !Subtarget.hasFPCVT()) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5273 | FP = DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, FP, DAG.getIntPtrConstant(0)); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5274 | return FP; |
| 5275 | } |
| 5276 | |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 5277 | SDValue PPCTargetLowering::LowerFLT_ROUNDS_(SDValue Op, |
| 5278 | SelectionDAG &DAG) const { |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5279 | SDLoc dl(Op); |
Dale Johannesen | 5c94cb3 | 2008-01-18 19:55:37 +0000 | [diff] [blame] | 5280 | /* |
| 5281 | The rounding mode is in bits 30:31 of FPSR, and has the following |
| 5282 | settings: |
| 5283 | 00 Round to nearest |
| 5284 | 01 Round to 0 |
| 5285 | 10 Round to +inf |
| 5286 | 11 Round to -inf |
| 5287 | |
| 5288 | FLT_ROUNDS, on the other hand, expects the following: |
| 5289 | -1 Undefined |
| 5290 | 0 Round to 0 |
| 5291 | 1 Round to nearest |
| 5292 | 2 Round to +inf |
| 5293 | 3 Round to -inf |
| 5294 | |
| 5295 | To perform the conversion, we do: |
| 5296 | ((FPSCR & 0x3) ^ ((~FPSCR & 0x3) >> 1)) |
| 5297 | */ |
| 5298 | |
| 5299 | MachineFunction &MF = DAG.getMachineFunction(); |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5300 | EVT VT = Op.getValueType(); |
| 5301 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Dale Johannesen | 5c94cb3 | 2008-01-18 19:55:37 +0000 | [diff] [blame] | 5302 | |
| 5303 | // Save FP Control Word to register |
Benjamin Kramer | fdf362b | 2013-03-07 20:33:29 +0000 | [diff] [blame] | 5304 | EVT NodeTys[] = { |
| 5305 | MVT::f64, // return register |
| 5306 | MVT::Glue // unused in this context |
| 5307 | }; |
Craig Topper | 2d2aa0c | 2014-04-30 07:17:30 +0000 | [diff] [blame] | 5308 | SDValue Chain = DAG.getNode(PPCISD::MFFS, dl, NodeTys, None); |
Dale Johannesen | 5c94cb3 | 2008-01-18 19:55:37 +0000 | [diff] [blame] | 5309 | |
| 5310 | // Save FP register to stack slot |
David Greene | 1fbe054 | 2009-11-12 20:49:22 +0000 | [diff] [blame] | 5311 | int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8, false); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5312 | SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT); |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 5313 | SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Chain, |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 5314 | StackSlot, MachinePointerInfo(), false, false,0); |
Dale Johannesen | 5c94cb3 | 2008-01-18 19:55:37 +0000 | [diff] [blame] | 5315 | |
| 5316 | // Load FP Control Word from low 32 bits of stack slot. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5317 | SDValue Four = DAG.getConstant(4, PtrVT); |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 5318 | SDValue Addr = DAG.getNode(ISD::ADD, dl, PtrVT, StackSlot, Four); |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 5319 | SDValue CWD = DAG.getLoad(MVT::i32, dl, Store, Addr, MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 5320 | false, false, false, 0); |
Dale Johannesen | 5c94cb3 | 2008-01-18 19:55:37 +0000 | [diff] [blame] | 5321 | |
| 5322 | // Transform as necessary |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5323 | SDValue CWD1 = |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5324 | DAG.getNode(ISD::AND, dl, MVT::i32, |
| 5325 | CWD, DAG.getConstant(3, MVT::i32)); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5326 | SDValue CWD2 = |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5327 | DAG.getNode(ISD::SRL, dl, MVT::i32, |
| 5328 | DAG.getNode(ISD::AND, dl, MVT::i32, |
| 5329 | DAG.getNode(ISD::XOR, dl, MVT::i32, |
| 5330 | CWD, DAG.getConstant(3, MVT::i32)), |
| 5331 | DAG.getConstant(3, MVT::i32)), |
| 5332 | DAG.getConstant(1, MVT::i32)); |
Dale Johannesen | 5c94cb3 | 2008-01-18 19:55:37 +0000 | [diff] [blame] | 5333 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5334 | SDValue RetVal = |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5335 | DAG.getNode(ISD::XOR, dl, MVT::i32, CWD1, CWD2); |
Dale Johannesen | 5c94cb3 | 2008-01-18 19:55:37 +0000 | [diff] [blame] | 5336 | |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 5337 | return DAG.getNode((VT.getSizeInBits() < 16 ? |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 5338 | ISD::TRUNCATE : ISD::ZERO_EXTEND), dl, VT, RetVal); |
Dale Johannesen | 5c94cb3 | 2008-01-18 19:55:37 +0000 | [diff] [blame] | 5339 | } |
| 5340 | |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 5341 | SDValue PPCTargetLowering::LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const { |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5342 | EVT VT = Op.getValueType(); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 5343 | unsigned BitWidth = VT.getSizeInBits(); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5344 | SDLoc dl(Op); |
Dan Gohman | 8d2ead2 | 2008-03-07 20:36:53 +0000 | [diff] [blame] | 5345 | assert(Op.getNumOperands() == 3 && |
| 5346 | VT == Op.getOperand(1).getValueType() && |
| 5347 | "Unexpected SHL!"); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5348 | |
Chris Lattner | 601b865 | 2006-09-20 03:47:40 +0000 | [diff] [blame] | 5349 | // Expand into a bunch of logical ops. Note that these ops |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5350 | // depend on the PPC behavior for oversized shift amounts. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5351 | SDValue Lo = Op.getOperand(0); |
| 5352 | SDValue Hi = Op.getOperand(1); |
| 5353 | SDValue Amt = Op.getOperand(2); |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5354 | EVT AmtVT = Amt.getValueType(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5355 | |
Dale Johannesen | 7ae8c8b | 2009-02-05 00:20:09 +0000 | [diff] [blame] | 5356 | SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, |
Duncan Sands | 1310574 | 2008-10-30 19:28:32 +0000 | [diff] [blame] | 5357 | DAG.getConstant(BitWidth, AmtVT), Amt); |
Dale Johannesen | 7ae8c8b | 2009-02-05 00:20:09 +0000 | [diff] [blame] | 5358 | SDValue Tmp2 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Amt); |
| 5359 | SDValue Tmp3 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Tmp1); |
| 5360 | SDValue Tmp4 = DAG.getNode(ISD::OR , dl, VT, Tmp2, Tmp3); |
| 5361 | SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, |
Duncan Sands | 1310574 | 2008-10-30 19:28:32 +0000 | [diff] [blame] | 5362 | DAG.getConstant(-BitWidth, AmtVT)); |
Dale Johannesen | 7ae8c8b | 2009-02-05 00:20:09 +0000 | [diff] [blame] | 5363 | SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); |
| 5364 | SDValue OutHi = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); |
| 5365 | SDValue OutLo = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Amt); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5366 | SDValue OutOps[] = { OutLo, OutHi }; |
Craig Topper | 64941d9 | 2014-04-27 19:20:57 +0000 | [diff] [blame] | 5367 | return DAG.getMergeValues(OutOps, dl); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5368 | } |
| 5369 | |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 5370 | SDValue PPCTargetLowering::LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const { |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5371 | EVT VT = Op.getValueType(); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5372 | SDLoc dl(Op); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 5373 | unsigned BitWidth = VT.getSizeInBits(); |
Dan Gohman | 8d2ead2 | 2008-03-07 20:36:53 +0000 | [diff] [blame] | 5374 | assert(Op.getNumOperands() == 3 && |
| 5375 | VT == Op.getOperand(1).getValueType() && |
| 5376 | "Unexpected SRL!"); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5377 | |
Dan Gohman | 8d2ead2 | 2008-03-07 20:36:53 +0000 | [diff] [blame] | 5378 | // Expand into a bunch of logical ops. Note that these ops |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5379 | // depend on the PPC behavior for oversized shift amounts. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5380 | SDValue Lo = Op.getOperand(0); |
| 5381 | SDValue Hi = Op.getOperand(1); |
| 5382 | SDValue Amt = Op.getOperand(2); |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5383 | EVT AmtVT = Amt.getValueType(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5384 | |
Dale Johannesen | 7ae8c8b | 2009-02-05 00:20:09 +0000 | [diff] [blame] | 5385 | SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, |
Duncan Sands | 1310574 | 2008-10-30 19:28:32 +0000 | [diff] [blame] | 5386 | DAG.getConstant(BitWidth, AmtVT), Amt); |
Dale Johannesen | 7ae8c8b | 2009-02-05 00:20:09 +0000 | [diff] [blame] | 5387 | SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); |
| 5388 | SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1); |
| 5389 | SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); |
| 5390 | SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, |
Duncan Sands | 1310574 | 2008-10-30 19:28:32 +0000 | [diff] [blame] | 5391 | DAG.getConstant(-BitWidth, AmtVT)); |
Dale Johannesen | 7ae8c8b | 2009-02-05 00:20:09 +0000 | [diff] [blame] | 5392 | SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); |
| 5393 | SDValue OutLo = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); |
| 5394 | SDValue OutHi = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Amt); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5395 | SDValue OutOps[] = { OutLo, OutHi }; |
Craig Topper | 64941d9 | 2014-04-27 19:20:57 +0000 | [diff] [blame] | 5396 | return DAG.getMergeValues(OutOps, dl); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5397 | } |
| 5398 | |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 5399 | SDValue PPCTargetLowering::LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const { |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5400 | SDLoc dl(Op); |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5401 | EVT VT = Op.getValueType(); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 5402 | unsigned BitWidth = VT.getSizeInBits(); |
Dan Gohman | 8d2ead2 | 2008-03-07 20:36:53 +0000 | [diff] [blame] | 5403 | assert(Op.getNumOperands() == 3 && |
| 5404 | VT == Op.getOperand(1).getValueType() && |
| 5405 | "Unexpected SRA!"); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5406 | |
Dan Gohman | 8d2ead2 | 2008-03-07 20:36:53 +0000 | [diff] [blame] | 5407 | // Expand into a bunch of logical ops, followed by a select_cc. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5408 | SDValue Lo = Op.getOperand(0); |
| 5409 | SDValue Hi = Op.getOperand(1); |
| 5410 | SDValue Amt = Op.getOperand(2); |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5411 | EVT AmtVT = Amt.getValueType(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5412 | |
Dale Johannesen | f2bb6f0 | 2009-02-04 01:48:28 +0000 | [diff] [blame] | 5413 | SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, |
Duncan Sands | 1310574 | 2008-10-30 19:28:32 +0000 | [diff] [blame] | 5414 | DAG.getConstant(BitWidth, AmtVT), Amt); |
Dale Johannesen | f2bb6f0 | 2009-02-04 01:48:28 +0000 | [diff] [blame] | 5415 | SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); |
| 5416 | SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1); |
| 5417 | SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); |
| 5418 | SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, |
Duncan Sands | 1310574 | 2008-10-30 19:28:32 +0000 | [diff] [blame] | 5419 | DAG.getConstant(-BitWidth, AmtVT)); |
Dale Johannesen | f2bb6f0 | 2009-02-04 01:48:28 +0000 | [diff] [blame] | 5420 | SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); |
| 5421 | SDValue OutHi = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Amt); |
| 5422 | SDValue OutLo = DAG.getSelectCC(dl, Tmp5, DAG.getConstant(0, AmtVT), |
Duncan Sands | 1310574 | 2008-10-30 19:28:32 +0000 | [diff] [blame] | 5423 | Tmp4, Tmp6, ISD::SETLE); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5424 | SDValue OutOps[] = { OutLo, OutHi }; |
Craig Topper | 64941d9 | 2014-04-27 19:20:57 +0000 | [diff] [blame] | 5425 | return DAG.getMergeValues(OutOps, dl); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5426 | } |
| 5427 | |
| 5428 | //===----------------------------------------------------------------------===// |
| 5429 | // Vector related lowering. |
| 5430 | // |
| 5431 | |
Chris Lattner | 2a099c0 | 2006-04-17 06:00:21 +0000 | [diff] [blame] | 5432 | /// BuildSplatI - Build a canonical splati of Val with an element size of |
| 5433 | /// SplatSize. Cast the result to VT. |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5434 | static SDValue BuildSplatI(int Val, unsigned SplatSize, EVT VT, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5435 | SelectionDAG &DAG, SDLoc dl) { |
Chris Lattner | 2a099c0 | 2006-04-17 06:00:21 +0000 | [diff] [blame] | 5436 | assert(Val >= -16 && Val <= 15 && "vsplti is out of range!"); |
Chris Lattner | 09ed0ff | 2006-12-01 01:45:39 +0000 | [diff] [blame] | 5437 | |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5438 | static const EVT VTys[] = { // canonical VT to use for each size. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5439 | MVT::v16i8, MVT::v8i16, MVT::Other, MVT::v4i32 |
Chris Lattner | 2a099c0 | 2006-04-17 06:00:21 +0000 | [diff] [blame] | 5440 | }; |
Chris Lattner | 09ed0ff | 2006-12-01 01:45:39 +0000 | [diff] [blame] | 5441 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5442 | EVT ReqVT = VT != MVT::Other ? VT : VTys[SplatSize-1]; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5443 | |
Chris Lattner | 09ed0ff | 2006-12-01 01:45:39 +0000 | [diff] [blame] | 5444 | // Force vspltis[hw] -1 to vspltisb -1 to canonicalize. |
| 5445 | if (Val == -1) |
| 5446 | SplatSize = 1; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5447 | |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5448 | EVT CanonicalVT = VTys[SplatSize-1]; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5449 | |
Chris Lattner | 2a099c0 | 2006-04-17 06:00:21 +0000 | [diff] [blame] | 5450 | // Build a canonical splat for this value. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5451 | SDValue Elt = DAG.getConstant(Val, MVT::i32); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5452 | SmallVector<SDValue, 8> Ops; |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 5453 | Ops.assign(CanonicalVT.getVectorNumElements(), Elt); |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 5454 | SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, dl, CanonicalVT, Ops); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5455 | return DAG.getNode(ISD::BITCAST, dl, ReqVT, Res); |
Chris Lattner | 2a099c0 | 2006-04-17 06:00:21 +0000 | [diff] [blame] | 5456 | } |
| 5457 | |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 5458 | /// BuildIntrinsicOp - Return a unary operator intrinsic node with the |
| 5459 | /// specified intrinsic ID. |
| 5460 | static SDValue BuildIntrinsicOp(unsigned IID, SDValue Op, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5461 | SelectionDAG &DAG, SDLoc dl, |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 5462 | EVT DestVT = MVT::Other) { |
| 5463 | if (DestVT == MVT::Other) DestVT = Op.getValueType(); |
| 5464 | return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, |
| 5465 | DAG.getConstant(IID, MVT::i32), Op); |
| 5466 | } |
| 5467 | |
Chris Lattner | a2cae1b | 2006-04-18 03:24:30 +0000 | [diff] [blame] | 5468 | /// BuildIntrinsicOp - Return a binary operator intrinsic node with the |
Chris Lattner | 1b3806a | 2006-04-17 06:58:41 +0000 | [diff] [blame] | 5469 | /// specified intrinsic ID. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5470 | static SDValue BuildIntrinsicOp(unsigned IID, SDValue LHS, SDValue RHS, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5471 | SelectionDAG &DAG, SDLoc dl, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5472 | EVT DestVT = MVT::Other) { |
| 5473 | if (DestVT == MVT::Other) DestVT = LHS.getValueType(); |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 5474 | return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5475 | DAG.getConstant(IID, MVT::i32), LHS, RHS); |
Chris Lattner | 1b3806a | 2006-04-17 06:58:41 +0000 | [diff] [blame] | 5476 | } |
| 5477 | |
Chris Lattner | a2cae1b | 2006-04-18 03:24:30 +0000 | [diff] [blame] | 5478 | /// BuildIntrinsicOp - Return a ternary operator intrinsic node with the |
| 5479 | /// specified intrinsic ID. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5480 | static SDValue BuildIntrinsicOp(unsigned IID, SDValue Op0, SDValue Op1, |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 5481 | SDValue Op2, SelectionDAG &DAG, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5482 | SDLoc dl, EVT DestVT = MVT::Other) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5483 | if (DestVT == MVT::Other) DestVT = Op0.getValueType(); |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 5484 | return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5485 | DAG.getConstant(IID, MVT::i32), Op0, Op1, Op2); |
Chris Lattner | a2cae1b | 2006-04-18 03:24:30 +0000 | [diff] [blame] | 5486 | } |
| 5487 | |
| 5488 | |
Chris Lattner | 264c908 | 2006-04-17 17:55:10 +0000 | [diff] [blame] | 5489 | /// BuildVSLDOI - Return a VECTOR_SHUFFLE that is a vsldoi of the specified |
| 5490 | /// amount. The result has the specified value type. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5491 | static SDValue BuildVSLDOI(SDValue LHS, SDValue RHS, unsigned Amt, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5492 | EVT VT, SelectionDAG &DAG, SDLoc dl) { |
Chris Lattner | 264c908 | 2006-04-17 17:55:10 +0000 | [diff] [blame] | 5493 | // Force LHS/RHS to be the right type. |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5494 | LHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, LHS); |
| 5495 | RHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, RHS); |
Duncan Sands | b0e3938 | 2008-07-21 10:20:31 +0000 | [diff] [blame] | 5496 | |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 5497 | int Ops[16]; |
Chris Lattner | 264c908 | 2006-04-17 17:55:10 +0000 | [diff] [blame] | 5498 | for (unsigned i = 0; i != 16; ++i) |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 5499 | Ops[i] = i + Amt; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5500 | SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, LHS, RHS, Ops); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5501 | return DAG.getNode(ISD::BITCAST, dl, VT, T); |
Chris Lattner | 264c908 | 2006-04-17 17:55:10 +0000 | [diff] [blame] | 5502 | } |
| 5503 | |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5504 | // If this is a case we can't handle, return null and let the default |
| 5505 | // expansion code take care of it. If we CAN select this case, and if it |
| 5506 | // selects to a single instruction, return Op. Otherwise, if we can codegen |
| 5507 | // this case more efficiently than a constant pool load, lower it to the |
| 5508 | // sequence of ops that should be used. |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 5509 | SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op, |
| 5510 | SelectionDAG &DAG) const { |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5511 | SDLoc dl(Op); |
Bob Wilson | d8ea0e1 | 2009-03-01 01:13:55 +0000 | [diff] [blame] | 5512 | BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode()); |
Craig Topper | e73658d | 2014-04-28 04:05:08 +0000 | [diff] [blame] | 5513 | assert(BVN && "Expected a BuildVectorSDNode in LowerBUILD_VECTOR"); |
Scott Michel | bb87828 | 2009-02-25 03:12:50 +0000 | [diff] [blame] | 5514 | |
Bob Wilson | 85cefe8 | 2009-03-02 23:24:16 +0000 | [diff] [blame] | 5515 | // Check if this is a splat of a constant value. |
| 5516 | APInt APSplatBits, APSplatUndef; |
| 5517 | unsigned SplatBitSize; |
Bob Wilson | d8ea0e1 | 2009-03-01 01:13:55 +0000 | [diff] [blame] | 5518 | bool HasAnyUndefs; |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5519 | if (! BVN->isConstantSplat(APSplatBits, APSplatUndef, SplatBitSize, |
Dale Johannesen | 5f4eecf | 2009-11-13 01:45:18 +0000 | [diff] [blame] | 5520 | HasAnyUndefs, 0, true) || SplatBitSize > 32) |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5521 | return SDValue(); |
Evan Cheng | a49de9d | 2009-02-25 22:49:59 +0000 | [diff] [blame] | 5522 | |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5523 | unsigned SplatBits = APSplatBits.getZExtValue(); |
| 5524 | unsigned SplatUndef = APSplatUndef.getZExtValue(); |
| 5525 | unsigned SplatSize = SplatBitSize / 8; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5526 | |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5527 | // First, handle single instruction cases. |
| 5528 | |
| 5529 | // All zeros? |
| 5530 | if (SplatBits == 0) { |
| 5531 | // Canonicalize all zero vectors to be v4i32. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5532 | if (Op.getValueType() != MVT::v4i32 || HasAnyUndefs) { |
| 5533 | SDValue Z = DAG.getConstant(0, MVT::i32); |
| 5534 | Z = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, Z, Z, Z, Z); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5535 | Op = DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Z); |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5536 | } |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5537 | return Op; |
| 5538 | } |
Chris Lattner | fa5aa39 | 2006-04-16 01:01:29 +0000 | [diff] [blame] | 5539 | |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5540 | // If the sign extended value is in the range [-16,15], use VSPLTI[bhw]. |
| 5541 | int32_t SextVal= (int32_t(SplatBits << (32-SplatBitSize)) >> |
| 5542 | (32-SplatBitSize)); |
| 5543 | if (SextVal >= -16 && SextVal <= 15) |
| 5544 | return BuildSplatI(SextVal, SplatSize, Op.getValueType(), DAG, dl); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5545 | |
| 5546 | |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5547 | // Two instruction sequences. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5548 | |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5549 | // If this value is in the range [-32,30] and is even, use: |
Bill Schmidt | c6cbecc | 2013-02-20 20:41:42 +0000 | [diff] [blame] | 5550 | // VSPLTI[bhw](val/2) + VSPLTI[bhw](val/2) |
| 5551 | // If this value is in the range [17,31] and is odd, use: |
| 5552 | // VSPLTI[bhw](val-16) - VSPLTI[bhw](-16) |
| 5553 | // If this value is in the range [-31,-17] and is odd, use: |
| 5554 | // VSPLTI[bhw](val+16) + VSPLTI[bhw](-16) |
| 5555 | // Note the last two are three-instruction sequences. |
| 5556 | if (SextVal >= -32 && SextVal <= 31) { |
| 5557 | // To avoid having these optimizations undone by constant folding, |
| 5558 | // we convert to a pseudo that will be expanded later into one of |
| 5559 | // the above forms. |
| 5560 | SDValue Elt = DAG.getConstant(SextVal, MVT::i32); |
Bill Schmidt | 71dddd5 | 2014-05-27 15:57:51 +0000 | [diff] [blame] | 5561 | EVT VT = (SplatSize == 1 ? MVT::v16i8 : |
| 5562 | (SplatSize == 2 ? MVT::v8i16 : MVT::v4i32)); |
| 5563 | SDValue EltSize = DAG.getConstant(SplatSize, MVT::i32); |
| 5564 | SDValue RetVal = DAG.getNode(PPCISD::VADD_SPLAT, dl, VT, Elt, EltSize); |
| 5565 | if (VT == Op.getValueType()) |
| 5566 | return RetVal; |
| 5567 | else |
| 5568 | return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), RetVal); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5569 | } |
| 5570 | |
| 5571 | // If this is 0x8000_0000 x 4, turn into vspltisw + vslw. If it is |
| 5572 | // 0x7FFF_FFFF x 4, turn it into not(0x8000_0000). This is important |
| 5573 | // for fneg/fabs. |
| 5574 | if (SplatSize == 4 && SplatBits == (0x7FFFFFFF&~SplatUndef)) { |
| 5575 | // Make -1 and vspltisw -1: |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5576 | SDValue OnesV = BuildSplatI(-1, 4, MVT::v4i32, DAG, dl); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5577 | |
| 5578 | // Make the VSLW intrinsic, computing 0x8000_0000. |
| 5579 | SDValue Res = BuildIntrinsicOp(Intrinsic::ppc_altivec_vslw, OnesV, |
| 5580 | OnesV, DAG, dl); |
| 5581 | |
| 5582 | // xor by OnesV to invert it. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5583 | Res = DAG.getNode(ISD::XOR, dl, MVT::v4i32, Res, OnesV); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5584 | return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5585 | } |
| 5586 | |
Bill Schmidt | 4aedff8 | 2014-06-06 14:06:26 +0000 | [diff] [blame] | 5587 | // The remaining cases assume either big endian element order or |
| 5588 | // a splat-size that equates to the element size of the vector |
| 5589 | // to be built. An example that doesn't work for little endian is |
| 5590 | // {0, -1, 0, -1, 0, -1, 0, -1} which has a splat size of 32 bits |
| 5591 | // and a vector element size of 16 bits. The code below will |
| 5592 | // produce the vector in big endian element order, which for little |
| 5593 | // endian is {-1, 0, -1, 0, -1, 0, -1, 0}. |
| 5594 | |
| 5595 | // For now, just avoid these optimizations in that case. |
| 5596 | // FIXME: Develop correct optimizations for LE with mismatched |
| 5597 | // splat and element sizes. |
| 5598 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5599 | if (Subtarget.isLittleEndian() && |
Bill Schmidt | 4aedff8 | 2014-06-06 14:06:26 +0000 | [diff] [blame] | 5600 | SplatSize != Op.getValueType().getVectorElementType().getSizeInBits()) |
| 5601 | return SDValue(); |
| 5602 | |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5603 | // Check to see if this is a wide variety of vsplti*, binop self cases. |
| 5604 | static const signed char SplatCsts[] = { |
| 5605 | -1, 1, -2, 2, -3, 3, -4, 4, -5, 5, -6, 6, -7, 7, |
| 5606 | -8, 8, -9, 9, -10, 10, -11, 11, -12, 12, -13, 13, 14, -14, 15, -15, -16 |
| 5607 | }; |
| 5608 | |
| 5609 | for (unsigned idx = 0; idx < array_lengthof(SplatCsts); ++idx) { |
| 5610 | // Indirect through the SplatCsts array so that we favor 'vsplti -1' for |
| 5611 | // cases which are ambiguous (e.g. formation of 0x8000_0000). 'vsplti -1' |
| 5612 | int i = SplatCsts[idx]; |
| 5613 | |
| 5614 | // Figure out what shift amount will be used by altivec if shifted by i in |
| 5615 | // this splat size. |
| 5616 | unsigned TypeShiftAmt = i & (SplatBitSize-1); |
| 5617 | |
| 5618 | // vsplti + shl self. |
Richard Smith | 228e6d4 | 2012-08-24 23:29:28 +0000 | [diff] [blame] | 5619 | if (SextVal == (int)((unsigned)i << TypeShiftAmt)) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5620 | SDValue Res = BuildSplatI(i, SplatSize, MVT::Other, DAG, dl); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5621 | static const unsigned IIDs[] = { // Intrinsic to use for each size. |
| 5622 | Intrinsic::ppc_altivec_vslb, Intrinsic::ppc_altivec_vslh, 0, |
| 5623 | Intrinsic::ppc_altivec_vslw |
| 5624 | }; |
| 5625 | Res = BuildIntrinsicOp(IIDs[SplatSize-1], Res, Res, DAG, dl); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5626 | return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); |
Chris Lattner | 2a099c0 | 2006-04-17 06:00:21 +0000 | [diff] [blame] | 5627 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5628 | |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5629 | // vsplti + srl self. |
| 5630 | if (SextVal == (int)((unsigned)i >> TypeShiftAmt)) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5631 | SDValue Res = BuildSplatI(i, SplatSize, MVT::Other, DAG, dl); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5632 | static const unsigned IIDs[] = { // Intrinsic to use for each size. |
| 5633 | Intrinsic::ppc_altivec_vsrb, Intrinsic::ppc_altivec_vsrh, 0, |
| 5634 | Intrinsic::ppc_altivec_vsrw |
| 5635 | }; |
| 5636 | Res = BuildIntrinsicOp(IIDs[SplatSize-1], Res, Res, DAG, dl); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5637 | return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); |
Chris Lattner | 1b3806a | 2006-04-17 06:58:41 +0000 | [diff] [blame] | 5638 | } |
| 5639 | |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5640 | // vsplti + sra self. |
| 5641 | if (SextVal == (int)((unsigned)i >> TypeShiftAmt)) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5642 | SDValue Res = BuildSplatI(i, SplatSize, MVT::Other, DAG, dl); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5643 | static const unsigned IIDs[] = { // Intrinsic to use for each size. |
| 5644 | Intrinsic::ppc_altivec_vsrab, Intrinsic::ppc_altivec_vsrah, 0, |
| 5645 | Intrinsic::ppc_altivec_vsraw |
| 5646 | }; |
| 5647 | Res = BuildIntrinsicOp(IIDs[SplatSize-1], Res, Res, DAG, dl); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5648 | return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); |
Chris Lattner | 1b3806a | 2006-04-17 06:58:41 +0000 | [diff] [blame] | 5649 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5650 | |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5651 | // vsplti + rol self. |
| 5652 | if (SextVal == (int)(((unsigned)i << TypeShiftAmt) | |
| 5653 | ((unsigned)i >> (SplatBitSize-TypeShiftAmt)))) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5654 | SDValue Res = BuildSplatI(i, SplatSize, MVT::Other, DAG, dl); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5655 | static const unsigned IIDs[] = { // Intrinsic to use for each size. |
| 5656 | Intrinsic::ppc_altivec_vrlb, Intrinsic::ppc_altivec_vrlh, 0, |
| 5657 | Intrinsic::ppc_altivec_vrlw |
| 5658 | }; |
| 5659 | Res = BuildIntrinsicOp(IIDs[SplatSize-1], Res, Res, DAG, dl); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5660 | return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5661 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5662 | |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5663 | // t = vsplti c, result = vsldoi t, t, 1 |
Richard Smith | 228e6d4 | 2012-08-24 23:29:28 +0000 | [diff] [blame] | 5664 | if (SextVal == (int)(((unsigned)i << 8) | (i < 0 ? 0xFF : 0))) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5665 | SDValue T = BuildSplatI(i, SplatSize, MVT::v16i8, DAG, dl); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5666 | return BuildVSLDOI(T, T, 1, Op.getValueType(), DAG, dl); |
Chris Lattner | e54133c | 2006-04-17 18:09:22 +0000 | [diff] [blame] | 5667 | } |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5668 | // t = vsplti c, result = vsldoi t, t, 2 |
Richard Smith | 228e6d4 | 2012-08-24 23:29:28 +0000 | [diff] [blame] | 5669 | if (SextVal == (int)(((unsigned)i << 16) | (i < 0 ? 0xFFFF : 0))) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5670 | SDValue T = BuildSplatI(i, SplatSize, MVT::v16i8, DAG, dl); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5671 | return BuildVSLDOI(T, T, 2, Op.getValueType(), DAG, dl); |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5672 | } |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5673 | // t = vsplti c, result = vsldoi t, t, 3 |
Richard Smith | 228e6d4 | 2012-08-24 23:29:28 +0000 | [diff] [blame] | 5674 | if (SextVal == (int)(((unsigned)i << 24) | (i < 0 ? 0xFFFFFF : 0))) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5675 | SDValue T = BuildSplatI(i, SplatSize, MVT::v16i8, DAG, dl); |
Bob Wilson | 530e038 | 2009-03-03 19:26:27 +0000 | [diff] [blame] | 5676 | return BuildVSLDOI(T, T, 3, Op.getValueType(), DAG, dl); |
| 5677 | } |
| 5678 | } |
| 5679 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5680 | return SDValue(); |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5681 | } |
| 5682 | |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5683 | /// GeneratePerfectShuffle - Given an entry in the perfect-shuffle table, emit |
| 5684 | /// the specified operations to build the shuffle. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5685 | static SDValue GeneratePerfectShuffle(unsigned PFEntry, SDValue LHS, |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5686 | SDValue RHS, SelectionDAG &DAG, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5687 | SDLoc dl) { |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5688 | unsigned OpNum = (PFEntry >> 26) & 0x0F; |
Bill Wendling | 95e1af2 | 2008-09-17 00:30:57 +0000 | [diff] [blame] | 5689 | unsigned LHSID = (PFEntry >> 13) & ((1 << 13)-1); |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5690 | unsigned RHSID = (PFEntry >> 0) & ((1 << 13)-1); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5691 | |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5692 | enum { |
Chris Lattner | d2ca9ab | 2006-05-16 04:20:24 +0000 | [diff] [blame] | 5693 | OP_COPY = 0, // Copy, used for things like <u,u,u,3> to say it is <0,1,2,3> |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5694 | OP_VMRGHW, |
| 5695 | OP_VMRGLW, |
| 5696 | OP_VSPLTISW0, |
| 5697 | OP_VSPLTISW1, |
| 5698 | OP_VSPLTISW2, |
| 5699 | OP_VSPLTISW3, |
| 5700 | OP_VSLDOI4, |
| 5701 | OP_VSLDOI8, |
Chris Lattner | aa237256 | 2006-05-24 17:04:05 +0000 | [diff] [blame] | 5702 | OP_VSLDOI12 |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5703 | }; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5704 | |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5705 | if (OpNum == OP_COPY) { |
| 5706 | if (LHSID == (1*9+2)*9+3) return LHS; |
| 5707 | assert(LHSID == ((4*9+5)*9+6)*9+7 && "Illegal OP_COPY!"); |
| 5708 | return RHS; |
| 5709 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5710 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5711 | SDValue OpLHS, OpRHS; |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 5712 | OpLHS = GeneratePerfectShuffle(PerfectShuffleTable[LHSID], LHS, RHS, DAG, dl); |
| 5713 | OpRHS = GeneratePerfectShuffle(PerfectShuffleTable[RHSID], LHS, RHS, DAG, dl); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5714 | |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 5715 | int ShufIdxs[16]; |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5716 | switch (OpNum) { |
Torok Edwin | fbcc663 | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 5717 | default: llvm_unreachable("Unknown i32 permute!"); |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5718 | case OP_VMRGHW: |
| 5719 | ShufIdxs[ 0] = 0; ShufIdxs[ 1] = 1; ShufIdxs[ 2] = 2; ShufIdxs[ 3] = 3; |
| 5720 | ShufIdxs[ 4] = 16; ShufIdxs[ 5] = 17; ShufIdxs[ 6] = 18; ShufIdxs[ 7] = 19; |
| 5721 | ShufIdxs[ 8] = 4; ShufIdxs[ 9] = 5; ShufIdxs[10] = 6; ShufIdxs[11] = 7; |
| 5722 | ShufIdxs[12] = 20; ShufIdxs[13] = 21; ShufIdxs[14] = 22; ShufIdxs[15] = 23; |
| 5723 | break; |
| 5724 | case OP_VMRGLW: |
| 5725 | ShufIdxs[ 0] = 8; ShufIdxs[ 1] = 9; ShufIdxs[ 2] = 10; ShufIdxs[ 3] = 11; |
| 5726 | ShufIdxs[ 4] = 24; ShufIdxs[ 5] = 25; ShufIdxs[ 6] = 26; ShufIdxs[ 7] = 27; |
| 5727 | ShufIdxs[ 8] = 12; ShufIdxs[ 9] = 13; ShufIdxs[10] = 14; ShufIdxs[11] = 15; |
| 5728 | ShufIdxs[12] = 28; ShufIdxs[13] = 29; ShufIdxs[14] = 30; ShufIdxs[15] = 31; |
| 5729 | break; |
| 5730 | case OP_VSPLTISW0: |
| 5731 | for (unsigned i = 0; i != 16; ++i) |
| 5732 | ShufIdxs[i] = (i&3)+0; |
| 5733 | break; |
| 5734 | case OP_VSPLTISW1: |
| 5735 | for (unsigned i = 0; i != 16; ++i) |
| 5736 | ShufIdxs[i] = (i&3)+4; |
| 5737 | break; |
| 5738 | case OP_VSPLTISW2: |
| 5739 | for (unsigned i = 0; i != 16; ++i) |
| 5740 | ShufIdxs[i] = (i&3)+8; |
| 5741 | break; |
| 5742 | case OP_VSPLTISW3: |
| 5743 | for (unsigned i = 0; i != 16; ++i) |
| 5744 | ShufIdxs[i] = (i&3)+12; |
| 5745 | break; |
| 5746 | case OP_VSLDOI4: |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 5747 | return BuildVSLDOI(OpLHS, OpRHS, 4, OpLHS.getValueType(), DAG, dl); |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5748 | case OP_VSLDOI8: |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 5749 | return BuildVSLDOI(OpLHS, OpRHS, 8, OpLHS.getValueType(), DAG, dl); |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5750 | case OP_VSLDOI12: |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 5751 | return BuildVSLDOI(OpLHS, OpRHS, 12, OpLHS.getValueType(), DAG, dl); |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5752 | } |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5753 | EVT VT = OpLHS.getValueType(); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5754 | OpLHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, OpLHS); |
| 5755 | OpRHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, OpRHS); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5756 | SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, OpLHS, OpRHS, ShufIdxs); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5757 | return DAG.getNode(ISD::BITCAST, dl, VT, T); |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5758 | } |
| 5759 | |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5760 | /// LowerVECTOR_SHUFFLE - Return the code we lower for VECTOR_SHUFFLE. If this |
| 5761 | /// is a shuffle we can handle in a single instruction, return it. Otherwise, |
| 5762 | /// return the code it can be lowered into. Worst case, it can always be |
| 5763 | /// lowered into a vperm. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5764 | SDValue PPCTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 5765 | SelectionDAG &DAG) const { |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5766 | SDLoc dl(Op); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5767 | SDValue V1 = Op.getOperand(0); |
| 5768 | SDValue V2 = Op.getOperand(1); |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 5769 | ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(Op); |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5770 | EVT VT = Op.getValueType(); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 5771 | bool isLittleEndian = Subtarget.isLittleEndian(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5772 | |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5773 | // Cases that are handled by instructions that take permute immediates |
| 5774 | // (such as vsplt*) should be left as VECTOR_SHUFFLE nodes so they can be |
| 5775 | // selected by the instruction selector. |
| 5776 | if (V2.getOpcode() == ISD::UNDEF) { |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 5777 | if (PPC::isSplatShuffleMask(SVOp, 1) || |
| 5778 | PPC::isSplatShuffleMask(SVOp, 2) || |
| 5779 | PPC::isSplatShuffleMask(SVOp, 4) || |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 5780 | PPC::isVPKUWUMShuffleMask(SVOp, true, DAG) || |
| 5781 | PPC::isVPKUHUMShuffleMask(SVOp, true, DAG) || |
| 5782 | PPC::isVSLDOIShuffleMask(SVOp, true, DAG) != -1 || |
| 5783 | PPC::isVMRGLShuffleMask(SVOp, 1, true, DAG) || |
| 5784 | PPC::isVMRGLShuffleMask(SVOp, 2, true, DAG) || |
| 5785 | PPC::isVMRGLShuffleMask(SVOp, 4, true, DAG) || |
| 5786 | PPC::isVMRGHShuffleMask(SVOp, 1, true, DAG) || |
| 5787 | PPC::isVMRGHShuffleMask(SVOp, 2, true, DAG) || |
| 5788 | PPC::isVMRGHShuffleMask(SVOp, 4, true, DAG)) { |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5789 | return Op; |
| 5790 | } |
| 5791 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5792 | |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5793 | // Altivec has a variety of "shuffle immediates" that take two vector inputs |
| 5794 | // and produce a fixed permutation. If any of these match, do not lower to |
| 5795 | // VPERM. |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 5796 | if (PPC::isVPKUWUMShuffleMask(SVOp, false, DAG) || |
| 5797 | PPC::isVPKUHUMShuffleMask(SVOp, false, DAG) || |
| 5798 | PPC::isVSLDOIShuffleMask(SVOp, false, DAG) != -1 || |
| 5799 | PPC::isVMRGLShuffleMask(SVOp, 1, false, DAG) || |
| 5800 | PPC::isVMRGLShuffleMask(SVOp, 2, false, DAG) || |
| 5801 | PPC::isVMRGLShuffleMask(SVOp, 4, false, DAG) || |
| 5802 | PPC::isVMRGHShuffleMask(SVOp, 1, false, DAG) || |
| 5803 | PPC::isVMRGHShuffleMask(SVOp, 2, false, DAG) || |
| 5804 | PPC::isVMRGHShuffleMask(SVOp, 4, false, DAG)) |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5805 | return Op; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5806 | |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5807 | // Check to see if this is a shuffle of 4-byte values. If so, we can use our |
| 5808 | // perfect shuffle table to emit an optimal matching sequence. |
Benjamin Kramer | 339ced4 | 2012-01-15 13:16:05 +0000 | [diff] [blame] | 5809 | ArrayRef<int> PermMask = SVOp->getMask(); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5810 | |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5811 | unsigned PFIndexes[4]; |
| 5812 | bool isFourElementShuffle = true; |
| 5813 | for (unsigned i = 0; i != 4 && isFourElementShuffle; ++i) { // Element number |
| 5814 | unsigned EltNo = 8; // Start out undef. |
| 5815 | for (unsigned j = 0; j != 4; ++j) { // Intra-element byte. |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 5816 | if (PermMask[i*4+j] < 0) |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5817 | continue; // Undef, ignore it. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5818 | |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 5819 | unsigned ByteSource = PermMask[i*4+j]; |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5820 | if ((ByteSource & 3) != j) { |
| 5821 | isFourElementShuffle = false; |
| 5822 | break; |
| 5823 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5824 | |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5825 | if (EltNo == 8) { |
| 5826 | EltNo = ByteSource/4; |
| 5827 | } else if (EltNo != ByteSource/4) { |
| 5828 | isFourElementShuffle = false; |
| 5829 | break; |
| 5830 | } |
| 5831 | } |
| 5832 | PFIndexes[i] = EltNo; |
| 5833 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5834 | |
| 5835 | // If this shuffle can be expressed as a shuffle of 4-byte elements, use the |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5836 | // perfect shuffle vector to determine if it is cost effective to do this as |
| 5837 | // discrete instructions, or whether we should use a vperm. |
Bill Schmidt | f910a06 | 2014-06-10 14:35:01 +0000 | [diff] [blame] | 5838 | // For now, we skip this for little endian until such time as we have a |
| 5839 | // little-endian perfect shuffle table. |
| 5840 | if (isFourElementShuffle && !isLittleEndian) { |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5841 | // Compute the index in the perfect shuffle table. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5842 | unsigned PFTableIndex = |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5843 | PFIndexes[0]*9*9*9+PFIndexes[1]*9*9+PFIndexes[2]*9+PFIndexes[3]; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5844 | |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5845 | unsigned PFEntry = PerfectShuffleTable[PFTableIndex]; |
| 5846 | unsigned Cost = (PFEntry >> 30); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5847 | |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5848 | // Determining when to avoid vperm is tricky. Many things affect the cost |
| 5849 | // of vperm, particularly how many times the perm mask needs to be computed. |
| 5850 | // For example, if the perm mask can be hoisted out of a loop or is already |
| 5851 | // used (perhaps because there are multiple permutes with the same shuffle |
| 5852 | // mask?) the vperm has a cost of 1. OTOH, hoisting the permute mask out of |
| 5853 | // the loop requires an extra register. |
| 5854 | // |
| 5855 | // As a compromise, we only emit discrete instructions if the shuffle can be |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5856 | // generated in 3 or fewer operations. When we have loop information |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5857 | // available, if this block is within a loop, we should avoid using vperm |
| 5858 | // for 3-operation perms and use a constant pool load instead. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5859 | if (Cost < 3) |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 5860 | return GeneratePerfectShuffle(PFEntry, V1, V2, DAG, dl); |
Chris Lattner | 071ad01 | 2006-04-17 05:28:54 +0000 | [diff] [blame] | 5861 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5862 | |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5863 | // Lower this to a VPERM(V1, V2, V3) expression, where V3 is a constant |
| 5864 | // vector that will get spilled to the constant pool. |
| 5865 | if (V2.getOpcode() == ISD::UNDEF) V2 = V1; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5866 | |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5867 | // The SHUFFLE_VECTOR mask is almost exactly what we want for vperm, except |
| 5868 | // that it is in input element units, not in bytes. Convert now. |
Bill Schmidt | 4aedff8 | 2014-06-06 14:06:26 +0000 | [diff] [blame] | 5869 | |
| 5870 | // For little endian, the order of the input vectors is reversed, and |
| 5871 | // the permutation mask is complemented with respect to 31. This is |
| 5872 | // necessary to produce proper semantics with the big-endian-biased vperm |
| 5873 | // instruction. |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 5874 | EVT EltVT = V1.getValueType().getVectorElementType(); |
Duncan Sands | 13237ac | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 5875 | unsigned BytesPerElement = EltVT.getSizeInBits()/8; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5876 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5877 | SmallVector<SDValue, 16> ResultMask; |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 5878 | for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i) { |
| 5879 | unsigned SrcElt = PermMask[i] < 0 ? 0 : PermMask[i]; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5880 | |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5881 | for (unsigned j = 0; j != BytesPerElement; ++j) |
Bill Schmidt | 4aedff8 | 2014-06-06 14:06:26 +0000 | [diff] [blame] | 5882 | if (isLittleEndian) |
| 5883 | ResultMask.push_back(DAG.getConstant(31 - (SrcElt*BytesPerElement+j), |
| 5884 | MVT::i32)); |
| 5885 | else |
| 5886 | ResultMask.push_back(DAG.getConstant(SrcElt*BytesPerElement+j, |
| 5887 | MVT::i32)); |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5888 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5889 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5890 | SDValue VPermMask = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i8, |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 5891 | ResultMask); |
Bill Schmidt | 4aedff8 | 2014-06-06 14:06:26 +0000 | [diff] [blame] | 5892 | if (isLittleEndian) |
| 5893 | return DAG.getNode(PPCISD::VPERM, dl, V1.getValueType(), |
| 5894 | V2, V1, VPermMask); |
| 5895 | else |
| 5896 | return DAG.getNode(PPCISD::VPERM, dl, V1.getValueType(), |
| 5897 | V1, V2, VPermMask); |
Chris Lattner | 19e9055 | 2006-04-14 05:19:18 +0000 | [diff] [blame] | 5898 | } |
| 5899 | |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 5900 | /// getAltivecCompareInfo - Given an intrinsic, return false if it is not an |
| 5901 | /// altivec comparison. If it is, return true and fill in Opc/isDot with |
| 5902 | /// information about the intrinsic. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5903 | static bool getAltivecCompareInfo(SDValue Intrin, int &CompareOpc, |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 5904 | bool &isDot) { |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 5905 | unsigned IntrinsicID = |
| 5906 | cast<ConstantSDNode>(Intrin.getOperand(0))->getZExtValue(); |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 5907 | CompareOpc = -1; |
| 5908 | isDot = false; |
| 5909 | switch (IntrinsicID) { |
| 5910 | default: return false; |
| 5911 | // Comparison predicates. |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5912 | case Intrinsic::ppc_altivec_vcmpbfp_p: CompareOpc = 966; isDot = 1; break; |
| 5913 | case Intrinsic::ppc_altivec_vcmpeqfp_p: CompareOpc = 198; isDot = 1; break; |
| 5914 | case Intrinsic::ppc_altivec_vcmpequb_p: CompareOpc = 6; isDot = 1; break; |
| 5915 | case Intrinsic::ppc_altivec_vcmpequh_p: CompareOpc = 70; isDot = 1; break; |
| 5916 | case Intrinsic::ppc_altivec_vcmpequw_p: CompareOpc = 134; isDot = 1; break; |
| 5917 | case Intrinsic::ppc_altivec_vcmpgefp_p: CompareOpc = 454; isDot = 1; break; |
| 5918 | case Intrinsic::ppc_altivec_vcmpgtfp_p: CompareOpc = 710; isDot = 1; break; |
| 5919 | case Intrinsic::ppc_altivec_vcmpgtsb_p: CompareOpc = 774; isDot = 1; break; |
| 5920 | case Intrinsic::ppc_altivec_vcmpgtsh_p: CompareOpc = 838; isDot = 1; break; |
| 5921 | case Intrinsic::ppc_altivec_vcmpgtsw_p: CompareOpc = 902; isDot = 1; break; |
| 5922 | case Intrinsic::ppc_altivec_vcmpgtub_p: CompareOpc = 518; isDot = 1; break; |
| 5923 | case Intrinsic::ppc_altivec_vcmpgtuh_p: CompareOpc = 582; isDot = 1; break; |
| 5924 | case Intrinsic::ppc_altivec_vcmpgtuw_p: CompareOpc = 646; isDot = 1; break; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5925 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5926 | // Normal Comparisons. |
| 5927 | case Intrinsic::ppc_altivec_vcmpbfp: CompareOpc = 966; isDot = 0; break; |
| 5928 | case Intrinsic::ppc_altivec_vcmpeqfp: CompareOpc = 198; isDot = 0; break; |
| 5929 | case Intrinsic::ppc_altivec_vcmpequb: CompareOpc = 6; isDot = 0; break; |
| 5930 | case Intrinsic::ppc_altivec_vcmpequh: CompareOpc = 70; isDot = 0; break; |
| 5931 | case Intrinsic::ppc_altivec_vcmpequw: CompareOpc = 134; isDot = 0; break; |
| 5932 | case Intrinsic::ppc_altivec_vcmpgefp: CompareOpc = 454; isDot = 0; break; |
| 5933 | case Intrinsic::ppc_altivec_vcmpgtfp: CompareOpc = 710; isDot = 0; break; |
| 5934 | case Intrinsic::ppc_altivec_vcmpgtsb: CompareOpc = 774; isDot = 0; break; |
| 5935 | case Intrinsic::ppc_altivec_vcmpgtsh: CompareOpc = 838; isDot = 0; break; |
| 5936 | case Intrinsic::ppc_altivec_vcmpgtsw: CompareOpc = 902; isDot = 0; break; |
| 5937 | case Intrinsic::ppc_altivec_vcmpgtub: CompareOpc = 518; isDot = 0; break; |
| 5938 | case Intrinsic::ppc_altivec_vcmpgtuh: CompareOpc = 582; isDot = 0; break; |
| 5939 | case Intrinsic::ppc_altivec_vcmpgtuw: CompareOpc = 646; isDot = 0; break; |
| 5940 | } |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 5941 | return true; |
| 5942 | } |
| 5943 | |
| 5944 | /// LowerINTRINSIC_WO_CHAIN - If this is an intrinsic that we want to custom |
| 5945 | /// lower, do it, otherwise return null. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5946 | SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 5947 | SelectionDAG &DAG) const { |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 5948 | // If this is a lowered altivec predicate compare, CompareOpc is set to the |
| 5949 | // opcode number of the comparison. |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 5950 | SDLoc dl(Op); |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 5951 | int CompareOpc; |
| 5952 | bool isDot; |
| 5953 | if (!getAltivecCompareInfo(Op, CompareOpc, isDot)) |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5954 | return SDValue(); // Don't custom lower most intrinsics. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5955 | |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 5956 | // If this is a non-dot comparison, make the VCMP node and we are done. |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5957 | if (!isDot) { |
Dale Johannesen | f80493b | 2009-02-05 22:07:54 +0000 | [diff] [blame] | 5958 | SDValue Tmp = DAG.getNode(PPCISD::VCMP, dl, Op.getOperand(2).getValueType(), |
Chris Lattner | 9fa851b | 2010-03-14 22:44:11 +0000 | [diff] [blame] | 5959 | Op.getOperand(1), Op.getOperand(2), |
| 5960 | DAG.getConstant(CompareOpc, MVT::i32)); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 5961 | return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Tmp); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5962 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5963 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5964 | // Create the PPCISD altivec 'dot' comparison node. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 5965 | SDValue Ops[] = { |
Chris Lattner | d66f14e | 2006-08-11 17:18:05 +0000 | [diff] [blame] | 5966 | Op.getOperand(2), // LHS |
| 5967 | Op.getOperand(3), // RHS |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5968 | DAG.getConstant(CompareOpc, MVT::i32) |
Chris Lattner | d66f14e | 2006-08-11 17:18:05 +0000 | [diff] [blame] | 5969 | }; |
Benjamin Kramer | fdf362b | 2013-03-07 20:33:29 +0000 | [diff] [blame] | 5970 | EVT VTs[] = { Op.getOperand(2).getValueType(), MVT::Glue }; |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 5971 | SDValue CompNode = DAG.getNode(PPCISD::VCMPo, dl, VTs, Ops); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5972 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5973 | // Now that we have the comparison, emit a copy from the CR to a GPR. |
| 5974 | // This is flagged to the above dot comparison. |
Ulrich Weigand | d5ebc62 | 2013-07-03 17:05:42 +0000 | [diff] [blame] | 5975 | SDValue Flags = DAG.getNode(PPCISD::MFOCRF, dl, MVT::i32, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5976 | DAG.getRegister(PPC::CR6, MVT::i32), |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5977 | CompNode.getValue(1)); |
| 5978 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5979 | // Unpack the result based on how the target uses it. |
| 5980 | unsigned BitNo; // Bit # of CR6. |
| 5981 | bool InvertBit; // Invert result? |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 5982 | switch (cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue()) { |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5983 | default: // Can't happen, don't crash on invalid number though. |
| 5984 | case 0: // Return the value of the EQ bit of CR6. |
| 5985 | BitNo = 0; InvertBit = false; |
| 5986 | break; |
| 5987 | case 1: // Return the inverted value of the EQ bit of CR6. |
| 5988 | BitNo = 0; InvertBit = true; |
| 5989 | break; |
| 5990 | case 2: // Return the value of the LT bit of CR6. |
| 5991 | BitNo = 2; InvertBit = false; |
| 5992 | break; |
| 5993 | case 3: // Return the inverted value of the LT bit of CR6. |
| 5994 | BitNo = 2; InvertBit = true; |
| 5995 | break; |
| 5996 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 5997 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 5998 | // Shift the bit into the low position. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 5999 | Flags = DAG.getNode(ISD::SRL, dl, MVT::i32, Flags, |
| 6000 | DAG.getConstant(8-(3-BitNo), MVT::i32)); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6001 | // Isolate the bit. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6002 | Flags = DAG.getNode(ISD::AND, dl, MVT::i32, Flags, |
| 6003 | DAG.getConstant(1, MVT::i32)); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6004 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6005 | // If we are supposed to, toggle the bit. |
| 6006 | if (InvertBit) |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6007 | Flags = DAG.getNode(ISD::XOR, dl, MVT::i32, Flags, |
| 6008 | DAG.getConstant(1, MVT::i32)); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6009 | return Flags; |
| 6010 | } |
| 6011 | |
Hal Finkel | 5c0d145 | 2014-03-30 13:22:59 +0000 | [diff] [blame] | 6012 | SDValue PPCTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op, |
| 6013 | SelectionDAG &DAG) const { |
| 6014 | SDLoc dl(Op); |
| 6015 | // For v2i64 (VSX), we can pattern patch the v2i32 case (using fp <-> int |
| 6016 | // instructions), but for smaller types, we need to first extend up to v2i32 |
| 6017 | // before doing going farther. |
| 6018 | if (Op.getValueType() == MVT::v2i64) { |
| 6019 | EVT ExtVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); |
| 6020 | if (ExtVT != MVT::v2i32) { |
| 6021 | Op = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Op.getOperand(0)); |
| 6022 | Op = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::v4i32, Op, |
| 6023 | DAG.getValueType(EVT::getVectorVT(*DAG.getContext(), |
| 6024 | ExtVT.getVectorElementType(), 4))); |
| 6025 | Op = DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, Op); |
| 6026 | Op = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::v2i64, Op, |
| 6027 | DAG.getValueType(MVT::v2i32)); |
| 6028 | } |
| 6029 | |
| 6030 | return Op; |
| 6031 | } |
| 6032 | |
| 6033 | return SDValue(); |
| 6034 | } |
| 6035 | |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6036 | SDValue PPCTargetLowering::LowerSCALAR_TO_VECTOR(SDValue Op, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 6037 | SelectionDAG &DAG) const { |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 6038 | SDLoc dl(Op); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6039 | // Create a stack slot that is 16-byte aligned. |
| 6040 | MachineFrameInfo *FrameInfo = DAG.getMachineFunction().getFrameInfo(); |
David Greene | 1fbe054 | 2009-11-12 20:49:22 +0000 | [diff] [blame] | 6041 | int FrameIdx = FrameInfo->CreateStackObject(16, 16, false); |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 6042 | EVT PtrVT = getPointerTy(); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 6043 | SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6044 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6045 | // Store the input value into Value#0 of the stack slot. |
Dale Johannesen | 021052a | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 6046 | SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, |
Chris Lattner | 676c61d | 2010-09-21 18:41:36 +0000 | [diff] [blame] | 6047 | Op.getOperand(0), FIdx, MachinePointerInfo(), |
David Greene | 87a5abe | 2010-02-15 16:56:53 +0000 | [diff] [blame] | 6048 | false, false, 0); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6049 | // Load it out. |
Chris Lattner | 7727d05 | 2010-09-21 06:44:06 +0000 | [diff] [blame] | 6050 | return DAG.getLoad(Op.getValueType(), dl, Store, FIdx, MachinePointerInfo(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 6051 | false, false, false, 0); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6052 | } |
| 6053 | |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 6054 | SDValue PPCTargetLowering::LowerMUL(SDValue Op, SelectionDAG &DAG) const { |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 6055 | SDLoc dl(Op); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6056 | if (Op.getValueType() == MVT::v4i32) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 6057 | SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6058 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6059 | SDValue Zero = BuildSplatI( 0, 1, MVT::v4i32, DAG, dl); |
| 6060 | SDValue Neg16 = BuildSplatI(-16, 4, MVT::v4i32, DAG, dl);//+16 as shift amt. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6061 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 6062 | SDValue RHSSwap = // = vrlw RHS, 16 |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 6063 | BuildIntrinsicOp(Intrinsic::ppc_altivec_vrlw, RHS, Neg16, DAG, dl); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6064 | |
Chris Lattner | 7e439874 | 2006-04-18 03:43:48 +0000 | [diff] [blame] | 6065 | // Shrinkify inputs to v8i16. |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 6066 | LHS = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, LHS); |
| 6067 | RHS = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, RHS); |
| 6068 | RHSSwap = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, RHSSwap); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6069 | |
Chris Lattner | 7e439874 | 2006-04-18 03:43:48 +0000 | [diff] [blame] | 6070 | // Low parts multiplied together, generating 32-bit results (we ignore the |
| 6071 | // top parts). |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 6072 | SDValue LoProd = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmulouh, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6073 | LHS, RHS, DAG, dl, MVT::v4i32); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6074 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 6075 | SDValue HiProd = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmsumuhm, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6076 | LHS, RHSSwap, Zero, DAG, dl, MVT::v4i32); |
Chris Lattner | 7e439874 | 2006-04-18 03:43:48 +0000 | [diff] [blame] | 6077 | // Shift the high parts up 16 bits. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6078 | HiProd = BuildIntrinsicOp(Intrinsic::ppc_altivec_vslw, HiProd, |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 6079 | Neg16, DAG, dl); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6080 | return DAG.getNode(ISD::ADD, dl, MVT::v4i32, LoProd, HiProd); |
| 6081 | } else if (Op.getValueType() == MVT::v8i16) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 6082 | SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6083 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6084 | SDValue Zero = BuildSplatI(0, 1, MVT::v8i16, DAG, dl); |
Chris Lattner | 7e439874 | 2006-04-18 03:43:48 +0000 | [diff] [blame] | 6085 | |
Chris Lattner | 96d5048 | 2006-04-18 04:28:57 +0000 | [diff] [blame] | 6086 | return BuildIntrinsicOp(Intrinsic::ppc_altivec_vmladduhm, |
Dale Johannesen | 9f3f72f | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 6087 | LHS, RHS, Zero, DAG, dl); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6088 | } else if (Op.getValueType() == MVT::v16i8) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 6089 | SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6090 | bool isLittleEndian = Subtarget.isLittleEndian(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6091 | |
Chris Lattner | d6d82aa | 2006-04-18 03:57:35 +0000 | [diff] [blame] | 6092 | // Multiply the even 8-bit parts, producing 16-bit sums. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 6093 | SDValue EvenParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuleub, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6094 | LHS, RHS, DAG, dl, MVT::v8i16); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 6095 | EvenParts = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, EvenParts); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6096 | |
Chris Lattner | d6d82aa | 2006-04-18 03:57:35 +0000 | [diff] [blame] | 6097 | // Multiply the odd 8-bit parts, producing 16-bit sums. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 6098 | SDValue OddParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuloub, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6099 | LHS, RHS, DAG, dl, MVT::v8i16); |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 6100 | OddParts = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, OddParts); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6101 | |
Bill Schmidt | 42995e8 | 2014-06-09 16:06:29 +0000 | [diff] [blame] | 6102 | // Merge the results together. Because vmuleub and vmuloub are |
| 6103 | // instructions with a big-endian bias, we must reverse the |
| 6104 | // element numbering and reverse the meaning of "odd" and "even" |
| 6105 | // when generating little endian code. |
Nate Begeman | 8d6d4b9 | 2009-04-27 18:41:29 +0000 | [diff] [blame] | 6106 | int Ops[16]; |
Chris Lattner | d6d82aa | 2006-04-18 03:57:35 +0000 | [diff] [blame] | 6107 | for (unsigned i = 0; i != 8; ++i) { |
Bill Schmidt | 42995e8 | 2014-06-09 16:06:29 +0000 | [diff] [blame] | 6108 | if (isLittleEndian) { |
| 6109 | Ops[i*2 ] = 2*i; |
| 6110 | Ops[i*2+1] = 2*i+16; |
| 6111 | } else { |
| 6112 | Ops[i*2 ] = 2*i+1; |
| 6113 | Ops[i*2+1] = 2*i+1+16; |
| 6114 | } |
Chris Lattner | d6d82aa | 2006-04-18 03:57:35 +0000 | [diff] [blame] | 6115 | } |
Bill Schmidt | 42995e8 | 2014-06-09 16:06:29 +0000 | [diff] [blame] | 6116 | if (isLittleEndian) |
| 6117 | return DAG.getVectorShuffle(MVT::v16i8, dl, OddParts, EvenParts, Ops); |
| 6118 | else |
| 6119 | return DAG.getVectorShuffle(MVT::v16i8, dl, EvenParts, OddParts, Ops); |
Chris Lattner | 7e439874 | 2006-04-18 03:43:48 +0000 | [diff] [blame] | 6120 | } else { |
Torok Edwin | fbcc663 | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 6121 | llvm_unreachable("Unknown mul to lower!"); |
Chris Lattner | 7e439874 | 2006-04-18 03:43:48 +0000 | [diff] [blame] | 6122 | } |
Chris Lattner | a2cae1b | 2006-04-18 03:24:30 +0000 | [diff] [blame] | 6123 | } |
| 6124 | |
Chris Lattner | f3d06c6 | 2005-08-26 00:52:45 +0000 | [diff] [blame] | 6125 | /// LowerOperation - Provide custom lowering hooks for some operations. |
| 6126 | /// |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 6127 | SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const { |
Chris Lattner | f3d06c6 | 2005-08-26 00:52:45 +0000 | [diff] [blame] | 6128 | switch (Op.getOpcode()) { |
Torok Edwin | fbcc663 | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 6129 | default: llvm_unreachable("Wasn't expecting to be able to lower this!"); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6130 | case ISD::ConstantPool: return LowerConstantPool(Op, DAG); |
Bob Wilson | f84f710 | 2009-11-04 21:31:18 +0000 | [diff] [blame] | 6131 | case ISD::BlockAddress: return LowerBlockAddress(Op, DAG); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6132 | case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); |
Roman Divacky | e3f15c98 | 2012-06-04 17:36:38 +0000 | [diff] [blame] | 6133 | case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); |
Nate Begeman | 4ca2ea5 | 2006-04-22 18:53:45 +0000 | [diff] [blame] | 6134 | case ISD::JumpTable: return LowerJumpTable(Op, DAG); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6135 | case ISD::SETCC: return LowerSETCC(Op, DAG); |
Duncan Sands | a098436 | 2011-09-06 13:37:06 +0000 | [diff] [blame] | 6136 | case ISD::INIT_TRAMPOLINE: return LowerINIT_TRAMPOLINE(Op, DAG); |
| 6137 | case ISD::ADJUST_TRAMPOLINE: return LowerADJUST_TRAMPOLINE(Op, DAG); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6138 | case ISD::VASTART: |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6139 | return LowerVASTART(Op, DAG, Subtarget); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6140 | |
| 6141 | case ISD::VAARG: |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6142 | return LowerVAARG(Op, DAG, Subtarget); |
Nicolas Geoffray | 23710a7 | 2007-04-03 13:59:52 +0000 | [diff] [blame] | 6143 | |
Roman Divacky | c3825df | 2013-07-25 21:36:47 +0000 | [diff] [blame] | 6144 | case ISD::VACOPY: |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6145 | return LowerVACOPY(Op, DAG, Subtarget); |
Roman Divacky | c3825df | 2013-07-25 21:36:47 +0000 | [diff] [blame] | 6146 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6147 | case ISD::STACKRESTORE: return LowerSTACKRESTORE(Op, DAG, Subtarget); |
Chris Lattner | 43df5b3 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 6148 | case ISD::DYNAMIC_STACKALLOC: |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6149 | return LowerDYNAMIC_STACKALLOC(Op, DAG, Subtarget); |
Evan Cheng | 51096af | 2008-04-19 01:30:48 +0000 | [diff] [blame] | 6150 | |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6151 | case ISD::EH_SJLJ_SETJMP: return lowerEH_SJLJ_SETJMP(Op, DAG); |
| 6152 | case ISD::EH_SJLJ_LONGJMP: return lowerEH_SJLJ_LONGJMP(Op, DAG); |
| 6153 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 6154 | case ISD::LOAD: return LowerLOAD(Op, DAG); |
| 6155 | case ISD::STORE: return LowerSTORE(Op, DAG); |
| 6156 | case ISD::TRUNCATE: return LowerTRUNCATE(Op, DAG); |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6157 | case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); |
Dale Johannesen | 37bc85f | 2009-06-04 20:53:52 +0000 | [diff] [blame] | 6158 | case ISD::FP_TO_UINT: |
| 6159 | case ISD::FP_TO_SINT: return LowerFP_TO_INT(Op, DAG, |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 6160 | SDLoc(Op)); |
Hal Finkel | f6d45f2 | 2013-04-01 17:52:07 +0000 | [diff] [blame] | 6161 | case ISD::UINT_TO_FP: |
| 6162 | case ISD::SINT_TO_FP: return LowerINT_TO_FP(Op, DAG); |
Dan Gohman | 9ba4d76 | 2008-01-31 00:41:03 +0000 | [diff] [blame] | 6163 | case ISD::FLT_ROUNDS_: return LowerFLT_ROUNDS_(Op, DAG); |
Chris Lattner | 4a66d69 | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 6164 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6165 | // Lower 64-bit shifts. |
Chris Lattner | 601b865 | 2006-09-20 03:47:40 +0000 | [diff] [blame] | 6166 | case ISD::SHL_PARTS: return LowerSHL_PARTS(Op, DAG); |
| 6167 | case ISD::SRL_PARTS: return LowerSRL_PARTS(Op, DAG); |
| 6168 | case ISD::SRA_PARTS: return LowerSRA_PARTS(Op, DAG); |
Chris Lattner | 4a66d69 | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 6169 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6170 | // Vector-related lowering. |
| 6171 | case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG); |
| 6172 | case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); |
| 6173 | case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); |
| 6174 | case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG); |
Hal Finkel | 5c0d145 | 2014-03-30 13:22:59 +0000 | [diff] [blame] | 6175 | case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG); |
Chris Lattner | a2cae1b | 2006-04-18 03:24:30 +0000 | [diff] [blame] | 6176 | case ISD::MUL: return LowerMUL(Op, DAG); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6177 | |
Hal Finkel | 25c1992 | 2013-05-15 21:37:41 +0000 | [diff] [blame] | 6178 | // For counter-based loop handling. |
| 6179 | case ISD::INTRINSIC_W_CHAIN: return SDValue(); |
| 6180 | |
Chris Lattner | f6a8156 | 2007-12-08 06:59:59 +0000 | [diff] [blame] | 6181 | // Frame & Return address. |
| 6182 | case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG); |
Nicolas Geoffray | 75ab979 | 2007-03-01 13:11:38 +0000 | [diff] [blame] | 6183 | case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); |
Chris Lattner | e675a08 | 2005-08-31 20:23:54 +0000 | [diff] [blame] | 6184 | } |
Chris Lattner | f3d06c6 | 2005-08-26 00:52:45 +0000 | [diff] [blame] | 6185 | } |
| 6186 | |
Duncan Sands | 6ed4014 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 6187 | void PPCTargetLowering::ReplaceNodeResults(SDNode *N, |
| 6188 | SmallVectorImpl<SDValue>&Results, |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 6189 | SelectionDAG &DAG) const { |
Roman Divacky | 4394e68 | 2011-06-28 15:30:42 +0000 | [diff] [blame] | 6190 | const TargetMachine &TM = getTargetMachine(); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 6191 | SDLoc dl(N); |
Chris Lattner | 57ee7c6 | 2007-11-28 18:44:47 +0000 | [diff] [blame] | 6192 | switch (N->getOpcode()) { |
Duncan Sands | 4068a7f | 2008-10-28 15:00:32 +0000 | [diff] [blame] | 6193 | default: |
Craig Topper | e55c556 | 2012-02-07 02:50:20 +0000 | [diff] [blame] | 6194 | llvm_unreachable("Do not know how to custom type legalize this operation!"); |
Hal Finkel | 25c1992 | 2013-05-15 21:37:41 +0000 | [diff] [blame] | 6195 | case ISD::INTRINSIC_W_CHAIN: { |
| 6196 | if (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() != |
| 6197 | Intrinsic::ppc_is_decremented_ctr_nonzero) |
| 6198 | break; |
| 6199 | |
| 6200 | assert(N->getValueType(0) == MVT::i1 && |
| 6201 | "Unexpected result type for CTR decrement intrinsic"); |
Matt Arsenault | 75865923 | 2013-05-18 00:21:46 +0000 | [diff] [blame] | 6202 | EVT SVT = getSetCCResultType(*DAG.getContext(), N->getValueType(0)); |
Hal Finkel | 25c1992 | 2013-05-15 21:37:41 +0000 | [diff] [blame] | 6203 | SDVTList VTs = DAG.getVTList(SVT, MVT::Other); |
| 6204 | SDValue NewInt = DAG.getNode(N->getOpcode(), dl, VTs, N->getOperand(0), |
| 6205 | N->getOperand(1)); |
| 6206 | |
| 6207 | Results.push_back(NewInt); |
| 6208 | Results.push_back(NewInt.getValue(1)); |
| 6209 | break; |
| 6210 | } |
Roman Divacky | 4394e68 | 2011-06-28 15:30:42 +0000 | [diff] [blame] | 6211 | case ISD::VAARG: { |
| 6212 | if (!TM.getSubtarget<PPCSubtarget>().isSVR4ABI() |
| 6213 | || TM.getSubtarget<PPCSubtarget>().isPPC64()) |
| 6214 | return; |
| 6215 | |
| 6216 | EVT VT = N->getValueType(0); |
| 6217 | |
| 6218 | if (VT == MVT::i64) { |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6219 | SDValue NewNode = LowerVAARG(SDValue(N, 1), DAG, Subtarget); |
Roman Divacky | 4394e68 | 2011-06-28 15:30:42 +0000 | [diff] [blame] | 6220 | |
| 6221 | Results.push_back(NewNode); |
| 6222 | Results.push_back(NewNode.getValue(1)); |
| 6223 | } |
| 6224 | return; |
| 6225 | } |
Duncan Sands | 6ed4014 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 6226 | case ISD::FP_ROUND_INREG: { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6227 | assert(N->getValueType(0) == MVT::ppcf128); |
| 6228 | assert(N->getOperand(0).getValueType() == MVT::ppcf128); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6229 | SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6230 | MVT::f64, N->getOperand(0), |
Duncan Sands | 6ed4014 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 6231 | DAG.getIntPtrConstant(0)); |
Dale Johannesen | f80493b | 2009-02-05 22:07:54 +0000 | [diff] [blame] | 6232 | SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6233 | MVT::f64, N->getOperand(0), |
Duncan Sands | 6ed4014 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 6234 | DAG.getIntPtrConstant(1)); |
| 6235 | |
Ulrich Weigand | 874fc62 | 2013-03-26 10:56:22 +0000 | [diff] [blame] | 6236 | // Add the two halves of the long double in round-to-zero mode. |
| 6237 | SDValue FPreg = DAG.getNode(PPCISD::FADDRTZ, dl, MVT::f64, Lo, Hi); |
Duncan Sands | 6ed4014 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 6238 | |
| 6239 | // We know the low half is about to be thrown away, so just use something |
| 6240 | // convenient. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 6241 | Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::ppcf128, |
Dale Johannesen | f80493b | 2009-02-05 22:07:54 +0000 | [diff] [blame] | 6242 | FPreg, FPreg)); |
Duncan Sands | 6ed4014 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 6243 | return; |
Duncan Sands | 2a28791 | 2008-07-19 16:26:02 +0000 | [diff] [blame] | 6244 | } |
Duncan Sands | 6ed4014 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 6245 | case ISD::FP_TO_SINT: |
Bill Schmidt | 4122169 | 2013-07-09 18:50:20 +0000 | [diff] [blame] | 6246 | // LowerFP_TO_INT() can only handle f32 and f64. |
| 6247 | if (N->getOperand(0).getValueType() == MVT::ppcf128) |
| 6248 | return; |
Dale Johannesen | 37bc85f | 2009-06-04 20:53:52 +0000 | [diff] [blame] | 6249 | Results.push_back(LowerFP_TO_INT(SDValue(N, 0), DAG, dl)); |
Duncan Sands | 6ed4014 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 6250 | return; |
Chris Lattner | 57ee7c6 | 2007-11-28 18:44:47 +0000 | [diff] [blame] | 6251 | } |
| 6252 | } |
| 6253 | |
| 6254 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 6255 | //===----------------------------------------------------------------------===// |
| 6256 | // Other Lowering Code |
| 6257 | //===----------------------------------------------------------------------===// |
| 6258 | |
Chris Lattner | 9b577f1 | 2005-08-26 21:23:58 +0000 | [diff] [blame] | 6259 | MachineBasicBlock * |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6260 | PPCTargetLowering::EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB, |
Dan Gohman | 747e55b | 2009-02-07 16:15:20 +0000 | [diff] [blame] | 6261 | bool is64bit, unsigned BinOpcode) const { |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6262 | // This also handles ATOMIC_SWAP, indicated by BinOpcode==0. |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6263 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
| 6264 | |
| 6265 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
| 6266 | MachineFunction *F = BB->getParent(); |
| 6267 | MachineFunction::iterator It = BB; |
| 6268 | ++It; |
| 6269 | |
| 6270 | unsigned dest = MI->getOperand(0).getReg(); |
| 6271 | unsigned ptrA = MI->getOperand(1).getReg(); |
| 6272 | unsigned ptrB = MI->getOperand(2).getReg(); |
| 6273 | unsigned incr = MI->getOperand(3).getReg(); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6274 | DebugLoc dl = MI->getDebugLoc(); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6275 | |
| 6276 | MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6277 | MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6278 | F->insert(It, loopMBB); |
| 6279 | F->insert(It, exitMBB); |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6280 | exitMBB->splice(exitMBB->begin(), BB, |
Benjamin Kramer | b6d0bd4 | 2014-03-02 12:27:27 +0000 | [diff] [blame] | 6281 | std::next(MachineBasicBlock::iterator(MI)), BB->end()); |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6282 | exitMBB->transferSuccessorsAndUpdatePHIs(BB); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6283 | |
| 6284 | MachineRegisterInfo &RegInfo = F->getRegInfo(); |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6285 | unsigned TmpReg = (!BinOpcode) ? incr : |
| 6286 | RegInfo.createVirtualRegister( |
Dale Johannesen | bc69829 | 2008-09-02 20:30:23 +0000 | [diff] [blame] | 6287 | is64bit ? (const TargetRegisterClass *) &PPC::G8RCRegClass : |
| 6288 | (const TargetRegisterClass *) &PPC::GPRCRegClass); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6289 | |
| 6290 | // thisMBB: |
| 6291 | // ... |
| 6292 | // fallthrough --> loopMBB |
| 6293 | BB->addSuccessor(loopMBB); |
| 6294 | |
| 6295 | // loopMBB: |
| 6296 | // l[wd]arx dest, ptr |
| 6297 | // add r0, dest, incr |
| 6298 | // st[wd]cx. r0, ptr |
| 6299 | // bne- loopMBB |
| 6300 | // fallthrough --> exitMBB |
| 6301 | BB = loopMBB; |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6302 | BuildMI(BB, dl, TII->get(is64bit ? PPC::LDARX : PPC::LWARX), dest) |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6303 | .addReg(ptrA).addReg(ptrB); |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6304 | if (BinOpcode) |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6305 | BuildMI(BB, dl, TII->get(BinOpcode), TmpReg).addReg(incr).addReg(dest); |
| 6306 | BuildMI(BB, dl, TII->get(is64bit ? PPC::STDCX : PPC::STWCX)) |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6307 | .addReg(TmpReg).addReg(ptrA).addReg(ptrB); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6308 | BuildMI(BB, dl, TII->get(PPC::BCC)) |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6309 | .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6310 | BB->addSuccessor(loopMBB); |
| 6311 | BB->addSuccessor(exitMBB); |
| 6312 | |
| 6313 | // exitMBB: |
| 6314 | // ... |
| 6315 | BB = exitMBB; |
| 6316 | return BB; |
| 6317 | } |
| 6318 | |
| 6319 | MachineBasicBlock * |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6320 | PPCTargetLowering::EmitPartwordAtomicBinary(MachineInstr *MI, |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6321 | MachineBasicBlock *BB, |
| 6322 | bool is8bit, // operation |
Dan Gohman | 747e55b | 2009-02-07 16:15:20 +0000 | [diff] [blame] | 6323 | unsigned BinOpcode) const { |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6324 | // This also handles ATOMIC_SWAP, indicated by BinOpcode==0. |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6325 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
| 6326 | // In 64 bit mode we have to use 64 bits for addresses, even though the |
| 6327 | // lwarx/stwcx are 32 bits. With the 32-bit atomics we can use address |
| 6328 | // registers without caring whether they're 32 or 64, but here we're |
| 6329 | // doing actual arithmetic on the addresses. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6330 | bool is64bit = Subtarget.isPPC64(); |
Hal Finkel | f70c41e | 2013-03-21 23:45:03 +0000 | [diff] [blame] | 6331 | unsigned ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6332 | |
| 6333 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
| 6334 | MachineFunction *F = BB->getParent(); |
| 6335 | MachineFunction::iterator It = BB; |
| 6336 | ++It; |
| 6337 | |
| 6338 | unsigned dest = MI->getOperand(0).getReg(); |
| 6339 | unsigned ptrA = MI->getOperand(1).getReg(); |
| 6340 | unsigned ptrB = MI->getOperand(2).getReg(); |
| 6341 | unsigned incr = MI->getOperand(3).getReg(); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6342 | DebugLoc dl = MI->getDebugLoc(); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6343 | |
| 6344 | MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6345 | MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6346 | F->insert(It, loopMBB); |
| 6347 | F->insert(It, exitMBB); |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6348 | exitMBB->splice(exitMBB->begin(), BB, |
Benjamin Kramer | b6d0bd4 | 2014-03-02 12:27:27 +0000 | [diff] [blame] | 6349 | std::next(MachineBasicBlock::iterator(MI)), BB->end()); |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6350 | exitMBB->transferSuccessorsAndUpdatePHIs(BB); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6351 | |
| 6352 | MachineRegisterInfo &RegInfo = F->getRegInfo(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6353 | const TargetRegisterClass *RC = |
Dale Johannesen | bc69829 | 2008-09-02 20:30:23 +0000 | [diff] [blame] | 6354 | is64bit ? (const TargetRegisterClass *) &PPC::G8RCRegClass : |
| 6355 | (const TargetRegisterClass *) &PPC::GPRCRegClass; |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6356 | unsigned PtrReg = RegInfo.createVirtualRegister(RC); |
| 6357 | unsigned Shift1Reg = RegInfo.createVirtualRegister(RC); |
| 6358 | unsigned ShiftReg = RegInfo.createVirtualRegister(RC); |
| 6359 | unsigned Incr2Reg = RegInfo.createVirtualRegister(RC); |
| 6360 | unsigned MaskReg = RegInfo.createVirtualRegister(RC); |
| 6361 | unsigned Mask2Reg = RegInfo.createVirtualRegister(RC); |
| 6362 | unsigned Mask3Reg = RegInfo.createVirtualRegister(RC); |
| 6363 | unsigned Tmp2Reg = RegInfo.createVirtualRegister(RC); |
| 6364 | unsigned Tmp3Reg = RegInfo.createVirtualRegister(RC); |
| 6365 | unsigned Tmp4Reg = RegInfo.createVirtualRegister(RC); |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6366 | unsigned TmpDestReg = RegInfo.createVirtualRegister(RC); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6367 | unsigned Ptr1Reg; |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6368 | unsigned TmpReg = (!BinOpcode) ? Incr2Reg : RegInfo.createVirtualRegister(RC); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6369 | |
| 6370 | // thisMBB: |
| 6371 | // ... |
| 6372 | // fallthrough --> loopMBB |
| 6373 | BB->addSuccessor(loopMBB); |
| 6374 | |
| 6375 | // The 4-byte load must be aligned, while a char or short may be |
| 6376 | // anywhere in the word. Hence all this nasty bookkeeping code. |
| 6377 | // add ptr1, ptrA, ptrB [copy if ptrA==0] |
| 6378 | // rlwinm shift1, ptr1, 3, 27, 28 [3, 27, 27] |
Dale Johannesen | bc69829 | 2008-09-02 20:30:23 +0000 | [diff] [blame] | 6379 | // xori shift, shift1, 24 [16] |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6380 | // rlwinm ptr, ptr1, 0, 0, 29 |
| 6381 | // slw incr2, incr, shift |
| 6382 | // li mask2, 255 [li mask3, 0; ori mask2, mask3, 65535] |
| 6383 | // slw mask, mask2, shift |
| 6384 | // loopMBB: |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 6385 | // lwarx tmpDest, ptr |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6386 | // add tmp, tmpDest, incr2 |
| 6387 | // andc tmp2, tmpDest, mask |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6388 | // and tmp3, tmp, mask |
| 6389 | // or tmp4, tmp3, tmp2 |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 6390 | // stwcx. tmp4, ptr |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6391 | // bne- loopMBB |
| 6392 | // fallthrough --> exitMBB |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6393 | // srw dest, tmpDest, shift |
Jakob Stoklund Olesen | 7067bff | 2011-04-04 17:07:06 +0000 | [diff] [blame] | 6394 | if (ptrA != ZeroReg) { |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6395 | Ptr1Reg = RegInfo.createVirtualRegister(RC); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6396 | BuildMI(BB, dl, TII->get(is64bit ? PPC::ADD8 : PPC::ADD4), Ptr1Reg) |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6397 | .addReg(ptrA).addReg(ptrB); |
| 6398 | } else { |
| 6399 | Ptr1Reg = ptrB; |
| 6400 | } |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6401 | BuildMI(BB, dl, TII->get(PPC::RLWINM), Shift1Reg).addReg(Ptr1Reg) |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6402 | .addImm(3).addImm(27).addImm(is8bit ? 28 : 27); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6403 | BuildMI(BB, dl, TII->get(is64bit ? PPC::XORI8 : PPC::XORI), ShiftReg) |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6404 | .addReg(Shift1Reg).addImm(is8bit ? 24 : 16); |
| 6405 | if (is64bit) |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6406 | BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg) |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6407 | .addReg(Ptr1Reg).addImm(0).addImm(61); |
| 6408 | else |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6409 | BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg) |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6410 | .addReg(Ptr1Reg).addImm(0).addImm(0).addImm(29); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6411 | BuildMI(BB, dl, TII->get(PPC::SLW), Incr2Reg) |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6412 | .addReg(incr).addReg(ShiftReg); |
| 6413 | if (is8bit) |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6414 | BuildMI(BB, dl, TII->get(PPC::LI), Mask2Reg).addImm(255); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6415 | else { |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6416 | BuildMI(BB, dl, TII->get(PPC::LI), Mask3Reg).addImm(0); |
| 6417 | BuildMI(BB, dl, TII->get(PPC::ORI),Mask2Reg).addReg(Mask3Reg).addImm(65535); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6418 | } |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6419 | BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6420 | .addReg(Mask2Reg).addReg(ShiftReg); |
| 6421 | |
| 6422 | BB = loopMBB; |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6423 | BuildMI(BB, dl, TII->get(PPC::LWARX), TmpDestReg) |
Jakob Stoklund Olesen | 7067bff | 2011-04-04 17:07:06 +0000 | [diff] [blame] | 6424 | .addReg(ZeroReg).addReg(PtrReg); |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6425 | if (BinOpcode) |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6426 | BuildMI(BB, dl, TII->get(BinOpcode), TmpReg) |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6427 | .addReg(Incr2Reg).addReg(TmpDestReg); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6428 | BuildMI(BB, dl, TII->get(is64bit ? PPC::ANDC8 : PPC::ANDC), Tmp2Reg) |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6429 | .addReg(TmpDestReg).addReg(MaskReg); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6430 | BuildMI(BB, dl, TII->get(is64bit ? PPC::AND8 : PPC::AND), Tmp3Reg) |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6431 | .addReg(TmpReg).addReg(MaskReg); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6432 | BuildMI(BB, dl, TII->get(is64bit ? PPC::OR8 : PPC::OR), Tmp4Reg) |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6433 | .addReg(Tmp3Reg).addReg(Tmp2Reg); |
Bill Schmidt | 3581cd4 | 2013-04-02 18:37:08 +0000 | [diff] [blame] | 6434 | BuildMI(BB, dl, TII->get(PPC::STWCX)) |
Jakob Stoklund Olesen | 7067bff | 2011-04-04 17:07:06 +0000 | [diff] [blame] | 6435 | .addReg(Tmp4Reg).addReg(ZeroReg).addReg(PtrReg); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6436 | BuildMI(BB, dl, TII->get(PPC::BCC)) |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6437 | .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6438 | BB->addSuccessor(loopMBB); |
| 6439 | BB->addSuccessor(exitMBB); |
| 6440 | |
| 6441 | // exitMBB: |
| 6442 | // ... |
| 6443 | BB = exitMBB; |
Jakob Stoklund Olesen | 13ce236 | 2011-04-04 17:57:29 +0000 | [diff] [blame] | 6444 | BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW), dest).addReg(TmpDestReg) |
| 6445 | .addReg(ShiftReg); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6446 | return BB; |
| 6447 | } |
| 6448 | |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6449 | llvm::MachineBasicBlock* |
| 6450 | PPCTargetLowering::emitEHSjLjSetJmp(MachineInstr *MI, |
| 6451 | MachineBasicBlock *MBB) const { |
| 6452 | DebugLoc DL = MI->getDebugLoc(); |
| 6453 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
| 6454 | |
| 6455 | MachineFunction *MF = MBB->getParent(); |
| 6456 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
| 6457 | |
| 6458 | const BasicBlock *BB = MBB->getBasicBlock(); |
| 6459 | MachineFunction::iterator I = MBB; |
| 6460 | ++I; |
| 6461 | |
| 6462 | // Memory Reference |
| 6463 | MachineInstr::mmo_iterator MMOBegin = MI->memoperands_begin(); |
| 6464 | MachineInstr::mmo_iterator MMOEnd = MI->memoperands_end(); |
| 6465 | |
| 6466 | unsigned DstReg = MI->getOperand(0).getReg(); |
| 6467 | const TargetRegisterClass *RC = MRI.getRegClass(DstReg); |
| 6468 | assert(RC->hasType(MVT::i32) && "Invalid destination!"); |
| 6469 | unsigned mainDstReg = MRI.createVirtualRegister(RC); |
| 6470 | unsigned restoreDstReg = MRI.createVirtualRegister(RC); |
| 6471 | |
| 6472 | MVT PVT = getPointerTy(); |
| 6473 | assert((PVT == MVT::i64 || PVT == MVT::i32) && |
| 6474 | "Invalid Pointer Size!"); |
| 6475 | // For v = setjmp(buf), we generate |
| 6476 | // |
| 6477 | // thisMBB: |
| 6478 | // SjLjSetup mainMBB |
| 6479 | // bl mainMBB |
| 6480 | // v_restore = 1 |
| 6481 | // b sinkMBB |
| 6482 | // |
| 6483 | // mainMBB: |
| 6484 | // buf[LabelOffset] = LR |
| 6485 | // v_main = 0 |
| 6486 | // |
| 6487 | // sinkMBB: |
| 6488 | // v = phi(main, restore) |
| 6489 | // |
| 6490 | |
| 6491 | MachineBasicBlock *thisMBB = MBB; |
| 6492 | MachineBasicBlock *mainMBB = MF->CreateMachineBasicBlock(BB); |
| 6493 | MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock(BB); |
| 6494 | MF->insert(I, mainMBB); |
| 6495 | MF->insert(I, sinkMBB); |
| 6496 | |
| 6497 | MachineInstrBuilder MIB; |
| 6498 | |
| 6499 | // Transfer the remainder of BB and its successor edges to sinkMBB. |
| 6500 | sinkMBB->splice(sinkMBB->begin(), MBB, |
Benjamin Kramer | b6d0bd4 | 2014-03-02 12:27:27 +0000 | [diff] [blame] | 6501 | std::next(MachineBasicBlock::iterator(MI)), MBB->end()); |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6502 | sinkMBB->transferSuccessorsAndUpdatePHIs(MBB); |
| 6503 | |
| 6504 | // Note that the structure of the jmp_buf used here is not compatible |
| 6505 | // with that used by libc, and is not designed to be. Specifically, it |
| 6506 | // stores only those 'reserved' registers that LLVM does not otherwise |
| 6507 | // understand how to spill. Also, by convention, by the time this |
| 6508 | // intrinsic is called, Clang has already stored the frame address in the |
| 6509 | // first slot of the buffer and stack address in the third. Following the |
| 6510 | // X86 target code, we'll store the jump address in the second slot. We also |
| 6511 | // need to save the TOC pointer (R2) to handle jumps between shared |
| 6512 | // libraries, and that will be stored in the fourth slot. The thread |
| 6513 | // identifier (R13) is not affected. |
| 6514 | |
| 6515 | // thisMBB: |
| 6516 | const int64_t LabelOffset = 1 * PVT.getStoreSize(); |
| 6517 | const int64_t TOCOffset = 3 * PVT.getStoreSize(); |
Hal Finkel | f05d6c7 | 2013-07-17 23:50:51 +0000 | [diff] [blame] | 6518 | const int64_t BPOffset = 4 * PVT.getStoreSize(); |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6519 | |
| 6520 | // Prepare IP either in reg. |
| 6521 | const TargetRegisterClass *PtrRC = getRegClassFor(PVT); |
| 6522 | unsigned LabelReg = MRI.createVirtualRegister(PtrRC); |
| 6523 | unsigned BufReg = MI->getOperand(1).getReg(); |
| 6524 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6525 | if (Subtarget.isPPC64() && Subtarget.isSVR4ABI()) { |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6526 | MIB = BuildMI(*thisMBB, MI, DL, TII->get(PPC::STD)) |
| 6527 | .addReg(PPC::X2) |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 6528 | .addImm(TOCOffset) |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6529 | .addReg(BufReg); |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6530 | MIB.setMemRefs(MMOBegin, MMOEnd); |
| 6531 | } |
| 6532 | |
Hal Finkel | f05d6c7 | 2013-07-17 23:50:51 +0000 | [diff] [blame] | 6533 | // Naked functions never have a base pointer, and so we use r1. For all |
| 6534 | // other functions, this decision must be delayed until during PEI. |
| 6535 | unsigned BaseReg; |
| 6536 | if (MF->getFunction()->getAttributes().hasAttribute( |
| 6537 | AttributeSet::FunctionIndex, Attribute::Naked)) |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6538 | BaseReg = Subtarget.isPPC64() ? PPC::X1 : PPC::R1; |
Hal Finkel | f05d6c7 | 2013-07-17 23:50:51 +0000 | [diff] [blame] | 6539 | else |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6540 | BaseReg = Subtarget.isPPC64() ? PPC::BP8 : PPC::BP; |
Hal Finkel | f05d6c7 | 2013-07-17 23:50:51 +0000 | [diff] [blame] | 6541 | |
| 6542 | MIB = BuildMI(*thisMBB, MI, DL, |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6543 | TII->get(Subtarget.isPPC64() ? PPC::STD : PPC::STW)) |
Hal Finkel | f05d6c7 | 2013-07-17 23:50:51 +0000 | [diff] [blame] | 6544 | .addReg(BaseReg) |
| 6545 | .addImm(BPOffset) |
| 6546 | .addReg(BufReg); |
| 6547 | MIB.setMemRefs(MMOBegin, MMOEnd); |
| 6548 | |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6549 | // Setup |
Hal Finkel | e5680b3 | 2013-04-04 22:55:54 +0000 | [diff] [blame] | 6550 | MIB = BuildMI(*thisMBB, MI, DL, TII->get(PPC::BCLalways)).addMBB(mainMBB); |
Bill Wendling | 5e7656b | 2013-06-07 07:55:53 +0000 | [diff] [blame] | 6551 | const PPCRegisterInfo *TRI = |
| 6552 | static_cast<const PPCRegisterInfo*>(getTargetMachine().getRegisterInfo()); |
| 6553 | MIB.addRegMask(TRI->getNoPreservedMask()); |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6554 | |
| 6555 | BuildMI(*thisMBB, MI, DL, TII->get(PPC::LI), restoreDstReg).addImm(1); |
| 6556 | |
| 6557 | MIB = BuildMI(*thisMBB, MI, DL, TII->get(PPC::EH_SjLj_Setup)) |
| 6558 | .addMBB(mainMBB); |
| 6559 | MIB = BuildMI(*thisMBB, MI, DL, TII->get(PPC::B)).addMBB(sinkMBB); |
| 6560 | |
| 6561 | thisMBB->addSuccessor(mainMBB, /* weight */ 0); |
| 6562 | thisMBB->addSuccessor(sinkMBB, /* weight */ 1); |
| 6563 | |
| 6564 | // mainMBB: |
| 6565 | // mainDstReg = 0 |
| 6566 | MIB = BuildMI(mainMBB, DL, |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6567 | TII->get(Subtarget.isPPC64() ? PPC::MFLR8 : PPC::MFLR), LabelReg); |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6568 | |
| 6569 | // Store IP |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6570 | if (Subtarget.isPPC64()) { |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6571 | MIB = BuildMI(mainMBB, DL, TII->get(PPC::STD)) |
| 6572 | .addReg(LabelReg) |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 6573 | .addImm(LabelOffset) |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6574 | .addReg(BufReg); |
| 6575 | } else { |
| 6576 | MIB = BuildMI(mainMBB, DL, TII->get(PPC::STW)) |
| 6577 | .addReg(LabelReg) |
| 6578 | .addImm(LabelOffset) |
| 6579 | .addReg(BufReg); |
| 6580 | } |
| 6581 | |
| 6582 | MIB.setMemRefs(MMOBegin, MMOEnd); |
| 6583 | |
| 6584 | BuildMI(mainMBB, DL, TII->get(PPC::LI), mainDstReg).addImm(0); |
| 6585 | mainMBB->addSuccessor(sinkMBB); |
| 6586 | |
| 6587 | // sinkMBB: |
| 6588 | BuildMI(*sinkMBB, sinkMBB->begin(), DL, |
| 6589 | TII->get(PPC::PHI), DstReg) |
| 6590 | .addReg(mainDstReg).addMBB(mainMBB) |
| 6591 | .addReg(restoreDstReg).addMBB(thisMBB); |
| 6592 | |
| 6593 | MI->eraseFromParent(); |
| 6594 | return sinkMBB; |
| 6595 | } |
| 6596 | |
| 6597 | MachineBasicBlock * |
| 6598 | PPCTargetLowering::emitEHSjLjLongJmp(MachineInstr *MI, |
| 6599 | MachineBasicBlock *MBB) const { |
| 6600 | DebugLoc DL = MI->getDebugLoc(); |
| 6601 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
| 6602 | |
| 6603 | MachineFunction *MF = MBB->getParent(); |
| 6604 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
| 6605 | |
| 6606 | // Memory Reference |
| 6607 | MachineInstr::mmo_iterator MMOBegin = MI->memoperands_begin(); |
| 6608 | MachineInstr::mmo_iterator MMOEnd = MI->memoperands_end(); |
| 6609 | |
| 6610 | MVT PVT = getPointerTy(); |
| 6611 | assert((PVT == MVT::i64 || PVT == MVT::i32) && |
| 6612 | "Invalid Pointer Size!"); |
| 6613 | |
| 6614 | const TargetRegisterClass *RC = |
| 6615 | (PVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; |
| 6616 | unsigned Tmp = MRI.createVirtualRegister(RC); |
| 6617 | // Since FP is only updated here but NOT referenced, it's treated as GPR. |
| 6618 | unsigned FP = (PVT == MVT::i64) ? PPC::X31 : PPC::R31; |
| 6619 | unsigned SP = (PVT == MVT::i64) ? PPC::X1 : PPC::R1; |
Hal Finkel | f05d6c7 | 2013-07-17 23:50:51 +0000 | [diff] [blame] | 6620 | unsigned BP = (PVT == MVT::i64) ? PPC::X30 : PPC::R30; |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6621 | |
| 6622 | MachineInstrBuilder MIB; |
| 6623 | |
| 6624 | const int64_t LabelOffset = 1 * PVT.getStoreSize(); |
| 6625 | const int64_t SPOffset = 2 * PVT.getStoreSize(); |
| 6626 | const int64_t TOCOffset = 3 * PVT.getStoreSize(); |
Hal Finkel | f05d6c7 | 2013-07-17 23:50:51 +0000 | [diff] [blame] | 6627 | const int64_t BPOffset = 4 * PVT.getStoreSize(); |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6628 | |
| 6629 | unsigned BufReg = MI->getOperand(0).getReg(); |
| 6630 | |
| 6631 | // Reload FP (the jumped-to function may not have had a |
| 6632 | // frame pointer, and if so, then its r31 will be restored |
| 6633 | // as necessary). |
| 6634 | if (PVT == MVT::i64) { |
| 6635 | MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LD), FP) |
| 6636 | .addImm(0) |
| 6637 | .addReg(BufReg); |
| 6638 | } else { |
| 6639 | MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LWZ), FP) |
| 6640 | .addImm(0) |
| 6641 | .addReg(BufReg); |
| 6642 | } |
| 6643 | MIB.setMemRefs(MMOBegin, MMOEnd); |
| 6644 | |
| 6645 | // Reload IP |
| 6646 | if (PVT == MVT::i64) { |
| 6647 | MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LD), Tmp) |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 6648 | .addImm(LabelOffset) |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6649 | .addReg(BufReg); |
| 6650 | } else { |
| 6651 | MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LWZ), Tmp) |
| 6652 | .addImm(LabelOffset) |
| 6653 | .addReg(BufReg); |
| 6654 | } |
| 6655 | MIB.setMemRefs(MMOBegin, MMOEnd); |
| 6656 | |
| 6657 | // Reload SP |
| 6658 | if (PVT == MVT::i64) { |
| 6659 | MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LD), SP) |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 6660 | .addImm(SPOffset) |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6661 | .addReg(BufReg); |
| 6662 | } else { |
| 6663 | MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LWZ), SP) |
| 6664 | .addImm(SPOffset) |
| 6665 | .addReg(BufReg); |
| 6666 | } |
| 6667 | MIB.setMemRefs(MMOBegin, MMOEnd); |
| 6668 | |
Hal Finkel | f05d6c7 | 2013-07-17 23:50:51 +0000 | [diff] [blame] | 6669 | // Reload BP |
| 6670 | if (PVT == MVT::i64) { |
| 6671 | MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LD), BP) |
| 6672 | .addImm(BPOffset) |
| 6673 | .addReg(BufReg); |
| 6674 | } else { |
| 6675 | MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LWZ), BP) |
| 6676 | .addImm(BPOffset) |
| 6677 | .addReg(BufReg); |
| 6678 | } |
| 6679 | MIB.setMemRefs(MMOBegin, MMOEnd); |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6680 | |
| 6681 | // Reload TOC |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6682 | if (PVT == MVT::i64 && Subtarget.isSVR4ABI()) { |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6683 | MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LD), PPC::X2) |
Ulrich Weigand | 9d980cb | 2013-05-16 17:58:02 +0000 | [diff] [blame] | 6684 | .addImm(TOCOffset) |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6685 | .addReg(BufReg); |
| 6686 | |
| 6687 | MIB.setMemRefs(MMOBegin, MMOEnd); |
| 6688 | } |
| 6689 | |
| 6690 | // Jump |
| 6691 | BuildMI(*MBB, MI, DL, |
| 6692 | TII->get(PVT == MVT::i64 ? PPC::MTCTR8 : PPC::MTCTR)).addReg(Tmp); |
| 6693 | BuildMI(*MBB, MI, DL, TII->get(PVT == MVT::i64 ? PPC::BCTR8 : PPC::BCTR)); |
| 6694 | |
| 6695 | MI->eraseFromParent(); |
| 6696 | return MBB; |
| 6697 | } |
| 6698 | |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6699 | MachineBasicBlock * |
Evan Cheng | 29cfb67 | 2008-01-30 18:18:23 +0000 | [diff] [blame] | 6700 | PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, |
Dan Gohman | 25c1653 | 2010-05-01 00:01:06 +0000 | [diff] [blame] | 6701 | MachineBasicBlock *BB) const { |
Hal Finkel | 756810f | 2013-03-21 21:37:52 +0000 | [diff] [blame] | 6702 | if (MI->getOpcode() == PPC::EH_SjLj_SetJmp32 || |
| 6703 | MI->getOpcode() == PPC::EH_SjLj_SetJmp64) { |
| 6704 | return emitEHSjLjSetJmp(MI, BB); |
| 6705 | } else if (MI->getOpcode() == PPC::EH_SjLj_LongJmp32 || |
| 6706 | MI->getOpcode() == PPC::EH_SjLj_LongJmp64) { |
| 6707 | return emitEHSjLjLongJmp(MI, BB); |
| 6708 | } |
| 6709 | |
Evan Cheng | 20350c4 | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 6710 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6711 | |
| 6712 | // To "insert" these instructions we actually have to insert their |
| 6713 | // control-flow patterns. |
Chris Lattner | 9b577f1 | 2005-08-26 21:23:58 +0000 | [diff] [blame] | 6714 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
Dan Gohman | 3b46030 | 2008-07-07 23:14:23 +0000 | [diff] [blame] | 6715 | MachineFunction::iterator It = BB; |
Chris Lattner | 9b577f1 | 2005-08-26 21:23:58 +0000 | [diff] [blame] | 6716 | ++It; |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6717 | |
Dan Gohman | 3b46030 | 2008-07-07 23:14:23 +0000 | [diff] [blame] | 6718 | MachineFunction *F = BB->getParent(); |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6719 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6720 | if (Subtarget.hasISEL() && (MI->getOpcode() == PPC::SELECT_CC_I4 || |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 6721 | MI->getOpcode() == PPC::SELECT_CC_I8 || |
| 6722 | MI->getOpcode() == PPC::SELECT_I4 || |
| 6723 | MI->getOpcode() == PPC::SELECT_I8)) { |
Hal Finkel | ed6a285 | 2013-04-05 23:29:01 +0000 | [diff] [blame] | 6724 | SmallVector<MachineOperand, 2> Cond; |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 6725 | if (MI->getOpcode() == PPC::SELECT_CC_I4 || |
| 6726 | MI->getOpcode() == PPC::SELECT_CC_I8) |
| 6727 | Cond.push_back(MI->getOperand(4)); |
| 6728 | else |
| 6729 | Cond.push_back(MachineOperand::CreateImm(PPC::PRED_BIT_SET)); |
Hal Finkel | ed6a285 | 2013-04-05 23:29:01 +0000 | [diff] [blame] | 6730 | Cond.push_back(MI->getOperand(1)); |
| 6731 | |
Hal Finkel | 460e94d | 2012-06-22 23:10:08 +0000 | [diff] [blame] | 6732 | DebugLoc dl = MI->getDebugLoc(); |
Bill Wendling | 5e7656b | 2013-06-07 07:55:53 +0000 | [diff] [blame] | 6733 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
| 6734 | TII->insertSelect(*BB, MI, dl, MI->getOperand(0).getReg(), |
| 6735 | Cond, MI->getOperand(2).getReg(), |
| 6736 | MI->getOperand(3).getReg()); |
Hal Finkel | 460e94d | 2012-06-22 23:10:08 +0000 | [diff] [blame] | 6737 | } else if (MI->getOpcode() == PPC::SELECT_CC_I4 || |
| 6738 | MI->getOpcode() == PPC::SELECT_CC_I8 || |
| 6739 | MI->getOpcode() == PPC::SELECT_CC_F4 || |
| 6740 | MI->getOpcode() == PPC::SELECT_CC_F8 || |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 6741 | MI->getOpcode() == PPC::SELECT_CC_VRRC || |
| 6742 | MI->getOpcode() == PPC::SELECT_I4 || |
| 6743 | MI->getOpcode() == PPC::SELECT_I8 || |
| 6744 | MI->getOpcode() == PPC::SELECT_F4 || |
| 6745 | MI->getOpcode() == PPC::SELECT_F8 || |
| 6746 | MI->getOpcode() == PPC::SELECT_VRRC) { |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6747 | // The incoming instruction knows the destination vreg to set, the |
| 6748 | // condition code register to branch on, the true/false values to |
| 6749 | // select between, and a branch opcode to use. |
| 6750 | |
| 6751 | // thisMBB: |
| 6752 | // ... |
| 6753 | // TrueVal = ... |
| 6754 | // cmpTY ccX, r1, r2 |
| 6755 | // bCC copy1MBB |
| 6756 | // fallthrough --> copy0MBB |
| 6757 | MachineBasicBlock *thisMBB = BB; |
| 6758 | MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6759 | MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6760 | DebugLoc dl = MI->getDebugLoc(); |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6761 | F->insert(It, copy0MBB); |
| 6762 | F->insert(It, sinkMBB); |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6763 | |
| 6764 | // Transfer the remainder of BB and its successor edges to sinkMBB. |
| 6765 | sinkMBB->splice(sinkMBB->begin(), BB, |
Benjamin Kramer | b6d0bd4 | 2014-03-02 12:27:27 +0000 | [diff] [blame] | 6766 | std::next(MachineBasicBlock::iterator(MI)), BB->end()); |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6767 | sinkMBB->transferSuccessorsAndUpdatePHIs(BB); |
| 6768 | |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6769 | // Next, add the true and fallthrough blocks as its successors. |
| 6770 | BB->addSuccessor(copy0MBB); |
| 6771 | BB->addSuccessor(sinkMBB); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6772 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 6773 | if (MI->getOpcode() == PPC::SELECT_I4 || |
| 6774 | MI->getOpcode() == PPC::SELECT_I8 || |
| 6775 | MI->getOpcode() == PPC::SELECT_F4 || |
| 6776 | MI->getOpcode() == PPC::SELECT_F8 || |
| 6777 | MI->getOpcode() == PPC::SELECT_VRRC) { |
| 6778 | BuildMI(BB, dl, TII->get(PPC::BC)) |
| 6779 | .addReg(MI->getOperand(1).getReg()).addMBB(sinkMBB); |
| 6780 | } else { |
| 6781 | unsigned SelectPred = MI->getOperand(4).getImm(); |
| 6782 | BuildMI(BB, dl, TII->get(PPC::BCC)) |
| 6783 | .addImm(SelectPred).addReg(MI->getOperand(1).getReg()).addMBB(sinkMBB); |
| 6784 | } |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6785 | |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6786 | // copy0MBB: |
| 6787 | // %FalseValue = ... |
| 6788 | // # fallthrough to sinkMBB |
| 6789 | BB = copy0MBB; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6790 | |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6791 | // Update machine-CFG edges |
| 6792 | BB->addSuccessor(sinkMBB); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6793 | |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6794 | // sinkMBB: |
| 6795 | // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ] |
| 6796 | // ... |
| 6797 | BB = sinkMBB; |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6798 | BuildMI(*BB, BB->begin(), dl, |
| 6799 | TII->get(PPC::PHI), MI->getOperand(0).getReg()) |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6800 | .addReg(MI->getOperand(3).getReg()).addMBB(copy0MBB) |
| 6801 | .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB); |
| 6802 | } |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6803 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_ADD_I8) |
| 6804 | BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::ADD4); |
| 6805 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_ADD_I16) |
| 6806 | BB = EmitPartwordAtomicBinary(MI, BB, false, PPC::ADD4); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6807 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_ADD_I32) |
| 6808 | BB = EmitAtomicBinary(MI, BB, false, PPC::ADD4); |
| 6809 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_ADD_I64) |
| 6810 | BB = EmitAtomicBinary(MI, BB, true, PPC::ADD8); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6811 | |
| 6812 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_AND_I8) |
| 6813 | BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::AND); |
| 6814 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_AND_I16) |
| 6815 | BB = EmitPartwordAtomicBinary(MI, BB, false, PPC::AND); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6816 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_AND_I32) |
| 6817 | BB = EmitAtomicBinary(MI, BB, false, PPC::AND); |
| 6818 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_AND_I64) |
| 6819 | BB = EmitAtomicBinary(MI, BB, true, PPC::AND8); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6820 | |
| 6821 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_OR_I8) |
| 6822 | BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::OR); |
| 6823 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_OR_I16) |
| 6824 | BB = EmitPartwordAtomicBinary(MI, BB, false, PPC::OR); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6825 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_OR_I32) |
| 6826 | BB = EmitAtomicBinary(MI, BB, false, PPC::OR); |
| 6827 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_OR_I64) |
| 6828 | BB = EmitAtomicBinary(MI, BB, true, PPC::OR8); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6829 | |
| 6830 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_XOR_I8) |
| 6831 | BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::XOR); |
| 6832 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_XOR_I16) |
| 6833 | BB = EmitPartwordAtomicBinary(MI, BB, false, PPC::XOR); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6834 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_XOR_I32) |
| 6835 | BB = EmitAtomicBinary(MI, BB, false, PPC::XOR); |
| 6836 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_XOR_I64) |
| 6837 | BB = EmitAtomicBinary(MI, BB, true, PPC::XOR8); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6838 | |
| 6839 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_NAND_I8) |
Dale Johannesen | e5ca04e | 2008-09-11 02:15:03 +0000 | [diff] [blame] | 6840 | BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::ANDC); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6841 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_NAND_I16) |
Dale Johannesen | e5ca04e | 2008-09-11 02:15:03 +0000 | [diff] [blame] | 6842 | BB = EmitPartwordAtomicBinary(MI, BB, false, PPC::ANDC); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6843 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_NAND_I32) |
Dale Johannesen | e5ca04e | 2008-09-11 02:15:03 +0000 | [diff] [blame] | 6844 | BB = EmitAtomicBinary(MI, BB, false, PPC::ANDC); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6845 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_NAND_I64) |
Dale Johannesen | e5ca04e | 2008-09-11 02:15:03 +0000 | [diff] [blame] | 6846 | BB = EmitAtomicBinary(MI, BB, true, PPC::ANDC8); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6847 | |
| 6848 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_SUB_I8) |
| 6849 | BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::SUBF); |
| 6850 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_SUB_I16) |
| 6851 | BB = EmitPartwordAtomicBinary(MI, BB, false, PPC::SUBF); |
Dale Johannesen | d4eb052 | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 6852 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_SUB_I32) |
| 6853 | BB = EmitAtomicBinary(MI, BB, false, PPC::SUBF); |
| 6854 | else if (MI->getOpcode() == PPC::ATOMIC_LOAD_SUB_I64) |
| 6855 | BB = EmitAtomicBinary(MI, BB, true, PPC::SUBF8); |
Dale Johannesen | a32affb | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 6856 | |
Dale Johannesen | f0a88d6 | 2008-08-29 18:29:46 +0000 | [diff] [blame] | 6857 | else if (MI->getOpcode() == PPC::ATOMIC_SWAP_I8) |
| 6858 | BB = EmitPartwordAtomicBinary(MI, BB, true, 0); |
| 6859 | else if (MI->getOpcode() == PPC::ATOMIC_SWAP_I16) |
| 6860 | BB = EmitPartwordAtomicBinary(MI, BB, false, 0); |
| 6861 | else if (MI->getOpcode() == PPC::ATOMIC_SWAP_I32) |
| 6862 | BB = EmitAtomicBinary(MI, BB, false, 0); |
| 6863 | else if (MI->getOpcode() == PPC::ATOMIC_SWAP_I64) |
| 6864 | BB = EmitAtomicBinary(MI, BB, true, 0); |
| 6865 | |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6866 | else if (MI->getOpcode() == PPC::ATOMIC_CMP_SWAP_I32 || |
| 6867 | MI->getOpcode() == PPC::ATOMIC_CMP_SWAP_I64) { |
| 6868 | bool is64bit = MI->getOpcode() == PPC::ATOMIC_CMP_SWAP_I64; |
| 6869 | |
| 6870 | unsigned dest = MI->getOperand(0).getReg(); |
| 6871 | unsigned ptrA = MI->getOperand(1).getReg(); |
| 6872 | unsigned ptrB = MI->getOperand(2).getReg(); |
| 6873 | unsigned oldval = MI->getOperand(3).getReg(); |
| 6874 | unsigned newval = MI->getOperand(4).getReg(); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6875 | DebugLoc dl = MI->getDebugLoc(); |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6876 | |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6877 | MachineBasicBlock *loop1MBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6878 | MachineBasicBlock *loop2MBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6879 | MachineBasicBlock *midMBB = F->CreateMachineBasicBlock(LLVM_BB); |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6880 | MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB); |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6881 | F->insert(It, loop1MBB); |
| 6882 | F->insert(It, loop2MBB); |
| 6883 | F->insert(It, midMBB); |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6884 | F->insert(It, exitMBB); |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6885 | exitMBB->splice(exitMBB->begin(), BB, |
Benjamin Kramer | b6d0bd4 | 2014-03-02 12:27:27 +0000 | [diff] [blame] | 6886 | std::next(MachineBasicBlock::iterator(MI)), BB->end()); |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6887 | exitMBB->transferSuccessorsAndUpdatePHIs(BB); |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6888 | |
| 6889 | // thisMBB: |
| 6890 | // ... |
| 6891 | // fallthrough --> loopMBB |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6892 | BB->addSuccessor(loop1MBB); |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6893 | |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6894 | // loop1MBB: |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6895 | // l[wd]arx dest, ptr |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6896 | // cmp[wd] dest, oldval |
| 6897 | // bne- midMBB |
| 6898 | // loop2MBB: |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6899 | // st[wd]cx. newval, ptr |
| 6900 | // bne- loopMBB |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6901 | // b exitBB |
| 6902 | // midMBB: |
| 6903 | // st[wd]cx. dest, ptr |
| 6904 | // exitBB: |
| 6905 | BB = loop1MBB; |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6906 | BuildMI(BB, dl, TII->get(is64bit ? PPC::LDARX : PPC::LWARX), dest) |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6907 | .addReg(ptrA).addReg(ptrB); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6908 | BuildMI(BB, dl, TII->get(is64bit ? PPC::CMPD : PPC::CMPW), PPC::CR0) |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6909 | .addReg(oldval).addReg(dest); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6910 | BuildMI(BB, dl, TII->get(PPC::BCC)) |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6911 | .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(midMBB); |
| 6912 | BB->addSuccessor(loop2MBB); |
| 6913 | BB->addSuccessor(midMBB); |
| 6914 | |
| 6915 | BB = loop2MBB; |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6916 | BuildMI(BB, dl, TII->get(is64bit ? PPC::STDCX : PPC::STWCX)) |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6917 | .addReg(newval).addReg(ptrA).addReg(ptrB); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6918 | BuildMI(BB, dl, TII->get(PPC::BCC)) |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6919 | .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loop1MBB); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6920 | BuildMI(BB, dl, TII->get(PPC::B)).addMBB(exitMBB); |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6921 | BB->addSuccessor(loop1MBB); |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6922 | BB->addSuccessor(exitMBB); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6923 | |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6924 | BB = midMBB; |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6925 | BuildMI(BB, dl, TII->get(is64bit ? PPC::STDCX : PPC::STWCX)) |
Dale Johannesen | 166d6cb | 2008-08-25 18:53:26 +0000 | [diff] [blame] | 6926 | .addReg(dest).addReg(ptrA).addReg(ptrB); |
| 6927 | BB->addSuccessor(exitMBB); |
| 6928 | |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 6929 | // exitMBB: |
| 6930 | // ... |
| 6931 | BB = exitMBB; |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 6932 | } else if (MI->getOpcode() == PPC::ATOMIC_CMP_SWAP_I8 || |
| 6933 | MI->getOpcode() == PPC::ATOMIC_CMP_SWAP_I16) { |
| 6934 | // We must use 64-bit registers for addresses when targeting 64-bit, |
| 6935 | // since we're actually doing arithmetic on them. Other registers |
| 6936 | // can be 32-bit. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 6937 | bool is64bit = Subtarget.isPPC64(); |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 6938 | bool is8bit = MI->getOpcode() == PPC::ATOMIC_CMP_SWAP_I8; |
| 6939 | |
| 6940 | unsigned dest = MI->getOperand(0).getReg(); |
| 6941 | unsigned ptrA = MI->getOperand(1).getReg(); |
| 6942 | unsigned ptrB = MI->getOperand(2).getReg(); |
| 6943 | unsigned oldval = MI->getOperand(3).getReg(); |
| 6944 | unsigned newval = MI->getOperand(4).getReg(); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 6945 | DebugLoc dl = MI->getDebugLoc(); |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 6946 | |
| 6947 | MachineBasicBlock *loop1MBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6948 | MachineBasicBlock *loop2MBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6949 | MachineBasicBlock *midMBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6950 | MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 6951 | F->insert(It, loop1MBB); |
| 6952 | F->insert(It, loop2MBB); |
| 6953 | F->insert(It, midMBB); |
| 6954 | F->insert(It, exitMBB); |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6955 | exitMBB->splice(exitMBB->begin(), BB, |
Benjamin Kramer | b6d0bd4 | 2014-03-02 12:27:27 +0000 | [diff] [blame] | 6956 | std::next(MachineBasicBlock::iterator(MI)), BB->end()); |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 6957 | exitMBB->transferSuccessorsAndUpdatePHIs(BB); |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 6958 | |
| 6959 | MachineRegisterInfo &RegInfo = F->getRegInfo(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 6960 | const TargetRegisterClass *RC = |
Dale Johannesen | bc69829 | 2008-09-02 20:30:23 +0000 | [diff] [blame] | 6961 | is64bit ? (const TargetRegisterClass *) &PPC::G8RCRegClass : |
| 6962 | (const TargetRegisterClass *) &PPC::GPRCRegClass; |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 6963 | unsigned PtrReg = RegInfo.createVirtualRegister(RC); |
| 6964 | unsigned Shift1Reg = RegInfo.createVirtualRegister(RC); |
| 6965 | unsigned ShiftReg = RegInfo.createVirtualRegister(RC); |
| 6966 | unsigned NewVal2Reg = RegInfo.createVirtualRegister(RC); |
| 6967 | unsigned NewVal3Reg = RegInfo.createVirtualRegister(RC); |
| 6968 | unsigned OldVal2Reg = RegInfo.createVirtualRegister(RC); |
| 6969 | unsigned OldVal3Reg = RegInfo.createVirtualRegister(RC); |
| 6970 | unsigned MaskReg = RegInfo.createVirtualRegister(RC); |
| 6971 | unsigned Mask2Reg = RegInfo.createVirtualRegister(RC); |
| 6972 | unsigned Mask3Reg = RegInfo.createVirtualRegister(RC); |
| 6973 | unsigned Tmp2Reg = RegInfo.createVirtualRegister(RC); |
| 6974 | unsigned Tmp4Reg = RegInfo.createVirtualRegister(RC); |
| 6975 | unsigned TmpDestReg = RegInfo.createVirtualRegister(RC); |
| 6976 | unsigned Ptr1Reg; |
| 6977 | unsigned TmpReg = RegInfo.createVirtualRegister(RC); |
Hal Finkel | f70c41e | 2013-03-21 23:45:03 +0000 | [diff] [blame] | 6978 | unsigned ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 6979 | // thisMBB: |
| 6980 | // ... |
| 6981 | // fallthrough --> loopMBB |
| 6982 | BB->addSuccessor(loop1MBB); |
| 6983 | |
| 6984 | // The 4-byte load must be aligned, while a char or short may be |
| 6985 | // anywhere in the word. Hence all this nasty bookkeeping code. |
| 6986 | // add ptr1, ptrA, ptrB [copy if ptrA==0] |
| 6987 | // rlwinm shift1, ptr1, 3, 27, 28 [3, 27, 27] |
Dale Johannesen | bc69829 | 2008-09-02 20:30:23 +0000 | [diff] [blame] | 6988 | // xori shift, shift1, 24 [16] |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 6989 | // rlwinm ptr, ptr1, 0, 0, 29 |
| 6990 | // slw newval2, newval, shift |
| 6991 | // slw oldval2, oldval,shift |
| 6992 | // li mask2, 255 [li mask3, 0; ori mask2, mask3, 65535] |
| 6993 | // slw mask, mask2, shift |
| 6994 | // and newval3, newval2, mask |
| 6995 | // and oldval3, oldval2, mask |
| 6996 | // loop1MBB: |
| 6997 | // lwarx tmpDest, ptr |
| 6998 | // and tmp, tmpDest, mask |
| 6999 | // cmpw tmp, oldval3 |
| 7000 | // bne- midMBB |
| 7001 | // loop2MBB: |
| 7002 | // andc tmp2, tmpDest, mask |
| 7003 | // or tmp4, tmp2, newval3 |
| 7004 | // stwcx. tmp4, ptr |
| 7005 | // bne- loop1MBB |
| 7006 | // b exitBB |
| 7007 | // midMBB: |
| 7008 | // stwcx. tmpDest, ptr |
| 7009 | // exitBB: |
| 7010 | // srw dest, tmpDest, shift |
Jakob Stoklund Olesen | 7067bff | 2011-04-04 17:07:06 +0000 | [diff] [blame] | 7011 | if (ptrA != ZeroReg) { |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7012 | Ptr1Reg = RegInfo.createVirtualRegister(RC); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7013 | BuildMI(BB, dl, TII->get(is64bit ? PPC::ADD8 : PPC::ADD4), Ptr1Reg) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7014 | .addReg(ptrA).addReg(ptrB); |
| 7015 | } else { |
| 7016 | Ptr1Reg = ptrB; |
| 7017 | } |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7018 | BuildMI(BB, dl, TII->get(PPC::RLWINM), Shift1Reg).addReg(Ptr1Reg) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7019 | .addImm(3).addImm(27).addImm(is8bit ? 28 : 27); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7020 | BuildMI(BB, dl, TII->get(is64bit ? PPC::XORI8 : PPC::XORI), ShiftReg) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7021 | .addReg(Shift1Reg).addImm(is8bit ? 24 : 16); |
| 7022 | if (is64bit) |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7023 | BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7024 | .addReg(Ptr1Reg).addImm(0).addImm(61); |
| 7025 | else |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7026 | BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7027 | .addReg(Ptr1Reg).addImm(0).addImm(0).addImm(29); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7028 | BuildMI(BB, dl, TII->get(PPC::SLW), NewVal2Reg) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7029 | .addReg(newval).addReg(ShiftReg); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7030 | BuildMI(BB, dl, TII->get(PPC::SLW), OldVal2Reg) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7031 | .addReg(oldval).addReg(ShiftReg); |
| 7032 | if (is8bit) |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7033 | BuildMI(BB, dl, TII->get(PPC::LI), Mask2Reg).addImm(255); |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7034 | else { |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7035 | BuildMI(BB, dl, TII->get(PPC::LI), Mask3Reg).addImm(0); |
| 7036 | BuildMI(BB, dl, TII->get(PPC::ORI), Mask2Reg) |
| 7037 | .addReg(Mask3Reg).addImm(65535); |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7038 | } |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7039 | BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7040 | .addReg(Mask2Reg).addReg(ShiftReg); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7041 | BuildMI(BB, dl, TII->get(PPC::AND), NewVal3Reg) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7042 | .addReg(NewVal2Reg).addReg(MaskReg); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7043 | BuildMI(BB, dl, TII->get(PPC::AND), OldVal3Reg) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7044 | .addReg(OldVal2Reg).addReg(MaskReg); |
| 7045 | |
| 7046 | BB = loop1MBB; |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7047 | BuildMI(BB, dl, TII->get(PPC::LWARX), TmpDestReg) |
Jakob Stoklund Olesen | 7067bff | 2011-04-04 17:07:06 +0000 | [diff] [blame] | 7048 | .addReg(ZeroReg).addReg(PtrReg); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7049 | BuildMI(BB, dl, TII->get(PPC::AND),TmpReg) |
| 7050 | .addReg(TmpDestReg).addReg(MaskReg); |
| 7051 | BuildMI(BB, dl, TII->get(PPC::CMPW), PPC::CR0) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7052 | .addReg(TmpReg).addReg(OldVal3Reg); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7053 | BuildMI(BB, dl, TII->get(PPC::BCC)) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7054 | .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(midMBB); |
| 7055 | BB->addSuccessor(loop2MBB); |
| 7056 | BB->addSuccessor(midMBB); |
| 7057 | |
| 7058 | BB = loop2MBB; |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7059 | BuildMI(BB, dl, TII->get(PPC::ANDC),Tmp2Reg) |
| 7060 | .addReg(TmpDestReg).addReg(MaskReg); |
| 7061 | BuildMI(BB, dl, TII->get(PPC::OR),Tmp4Reg) |
| 7062 | .addReg(Tmp2Reg).addReg(NewVal3Reg); |
| 7063 | BuildMI(BB, dl, TII->get(PPC::STWCX)).addReg(Tmp4Reg) |
Jakob Stoklund Olesen | 7067bff | 2011-04-04 17:07:06 +0000 | [diff] [blame] | 7064 | .addReg(ZeroReg).addReg(PtrReg); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7065 | BuildMI(BB, dl, TII->get(PPC::BCC)) |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7066 | .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loop1MBB); |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7067 | BuildMI(BB, dl, TII->get(PPC::B)).addMBB(exitMBB); |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7068 | BB->addSuccessor(loop1MBB); |
| 7069 | BB->addSuccessor(exitMBB); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 7070 | |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7071 | BB = midMBB; |
Dale Johannesen | e9f623e | 2009-02-13 02:27:39 +0000 | [diff] [blame] | 7072 | BuildMI(BB, dl, TII->get(PPC::STWCX)).addReg(TmpDestReg) |
Jakob Stoklund Olesen | 7067bff | 2011-04-04 17:07:06 +0000 | [diff] [blame] | 7073 | .addReg(ZeroReg).addReg(PtrReg); |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7074 | BB->addSuccessor(exitMBB); |
| 7075 | |
| 7076 | // exitMBB: |
| 7077 | // ... |
| 7078 | BB = exitMBB; |
Jakob Stoklund Olesen | 13ce236 | 2011-04-04 17:57:29 +0000 | [diff] [blame] | 7079 | BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW),dest).addReg(TmpReg) |
| 7080 | .addReg(ShiftReg); |
Ulrich Weigand | 874fc62 | 2013-03-26 10:56:22 +0000 | [diff] [blame] | 7081 | } else if (MI->getOpcode() == PPC::FADDrtz) { |
| 7082 | // This pseudo performs an FADD with rounding mode temporarily forced |
| 7083 | // to round-to-zero. We emit this via custom inserter since the FPSCR |
| 7084 | // is not modeled at the SelectionDAG level. |
| 7085 | unsigned Dest = MI->getOperand(0).getReg(); |
| 7086 | unsigned Src1 = MI->getOperand(1).getReg(); |
| 7087 | unsigned Src2 = MI->getOperand(2).getReg(); |
| 7088 | DebugLoc dl = MI->getDebugLoc(); |
| 7089 | |
| 7090 | MachineRegisterInfo &RegInfo = F->getRegInfo(); |
| 7091 | unsigned MFFSReg = RegInfo.createVirtualRegister(&PPC::F8RCRegClass); |
| 7092 | |
| 7093 | // Save FPSCR value. |
| 7094 | BuildMI(*BB, MI, dl, TII->get(PPC::MFFS), MFFSReg); |
| 7095 | |
| 7096 | // Set rounding mode to round-to-zero. |
| 7097 | BuildMI(*BB, MI, dl, TII->get(PPC::MTFSB1)).addImm(31); |
| 7098 | BuildMI(*BB, MI, dl, TII->get(PPC::MTFSB0)).addImm(30); |
| 7099 | |
| 7100 | // Perform addition. |
| 7101 | BuildMI(*BB, MI, dl, TII->get(PPC::FADD), Dest).addReg(Src1).addReg(Src2); |
| 7102 | |
| 7103 | // Restore FPSCR value. |
| 7104 | BuildMI(*BB, MI, dl, TII->get(PPC::MTFSF)).addImm(1).addReg(MFFSReg); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7105 | } else if (MI->getOpcode() == PPC::ANDIo_1_EQ_BIT || |
| 7106 | MI->getOpcode() == PPC::ANDIo_1_GT_BIT || |
| 7107 | MI->getOpcode() == PPC::ANDIo_1_EQ_BIT8 || |
| 7108 | MI->getOpcode() == PPC::ANDIo_1_GT_BIT8) { |
| 7109 | unsigned Opcode = (MI->getOpcode() == PPC::ANDIo_1_EQ_BIT8 || |
| 7110 | MI->getOpcode() == PPC::ANDIo_1_GT_BIT8) ? |
| 7111 | PPC::ANDIo8 : PPC::ANDIo; |
| 7112 | bool isEQ = (MI->getOpcode() == PPC::ANDIo_1_EQ_BIT || |
| 7113 | MI->getOpcode() == PPC::ANDIo_1_EQ_BIT8); |
| 7114 | |
| 7115 | MachineRegisterInfo &RegInfo = F->getRegInfo(); |
| 7116 | unsigned Dest = RegInfo.createVirtualRegister(Opcode == PPC::ANDIo ? |
| 7117 | &PPC::GPRCRegClass : |
| 7118 | &PPC::G8RCRegClass); |
| 7119 | |
| 7120 | DebugLoc dl = MI->getDebugLoc(); |
| 7121 | BuildMI(*BB, MI, dl, TII->get(Opcode), Dest) |
| 7122 | .addReg(MI->getOperand(1).getReg()).addImm(1); |
| 7123 | BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), |
| 7124 | MI->getOperand(0).getReg()) |
| 7125 | .addReg(isEQ ? PPC::CR0EQ : PPC::CR0GT); |
Dale Johannesen | 340d264 | 2008-08-30 00:08:53 +0000 | [diff] [blame] | 7126 | } else { |
Torok Edwin | fbcc663 | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 7127 | llvm_unreachable("Unexpected instr type to insert"); |
Evan Cheng | 32e376f | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 7128 | } |
Chris Lattner | 9b577f1 | 2005-08-26 21:23:58 +0000 | [diff] [blame] | 7129 | |
Dan Gohman | 3439629 | 2010-07-06 20:24:04 +0000 | [diff] [blame] | 7130 | MI->eraseFromParent(); // The pseudo instruction is gone now. |
Chris Lattner | 9b577f1 | 2005-08-26 21:23:58 +0000 | [diff] [blame] | 7131 | return BB; |
| 7132 | } |
| 7133 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 7134 | //===----------------------------------------------------------------------===// |
| 7135 | // Target Optimization Hooks |
| 7136 | //===----------------------------------------------------------------------===// |
| 7137 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7138 | SDValue PPCTargetLowering::DAGCombineFastRecip(SDValue Op, |
| 7139 | DAGCombinerInfo &DCI) const { |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7140 | if (DCI.isAfterLegalizeVectorOps()) |
| 7141 | return SDValue(); |
| 7142 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7143 | EVT VT = Op.getValueType(); |
| 7144 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 7145 | if ((VT == MVT::f32 && Subtarget.hasFRES()) || |
| 7146 | (VT == MVT::f64 && Subtarget.hasFRE()) || |
| 7147 | (VT == MVT::v4f32 && Subtarget.hasAltivec()) || |
| 7148 | (VT == MVT::v2f64 && Subtarget.hasVSX())) { |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7149 | |
| 7150 | // Newton iteration for a function: F(X) is X_{i+1} = X_i - F(X_i)/F'(X_i) |
| 7151 | // For the reciprocal, we need to find the zero of the function: |
| 7152 | // F(X) = A X - 1 [which has a zero at X = 1/A] |
| 7153 | // => |
| 7154 | // X_{i+1} = X_i (2 - A X_i) = X_i + X_i (1 - A X_i) [this second form |
| 7155 | // does not require additional intermediate precision] |
| 7156 | |
| 7157 | // Convergence is quadratic, so we essentially double the number of digits |
| 7158 | // correct after every iteration. The minimum architected relative |
| 7159 | // accuracy is 2^-5. When hasRecipPrec(), this is 2^-14. IEEE float has |
| 7160 | // 23 digits and double has 52 digits. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 7161 | int Iterations = Subtarget.hasRecipPrec() ? 1 : 3; |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7162 | if (VT.getScalarType() == MVT::f64) |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7163 | ++Iterations; |
| 7164 | |
| 7165 | SelectionDAG &DAG = DCI.DAG; |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 7166 | SDLoc dl(Op); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7167 | |
| 7168 | SDValue FPOne = |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7169 | DAG.getConstantFP(1.0, VT.getScalarType()); |
| 7170 | if (VT.isVector()) { |
| 7171 | assert(VT.getVectorNumElements() == 4 && |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7172 | "Unknown vector type"); |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7173 | FPOne = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7174 | FPOne, FPOne, FPOne, FPOne); |
| 7175 | } |
| 7176 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7177 | SDValue Est = DAG.getNode(PPCISD::FRE, dl, VT, Op); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7178 | DCI.AddToWorklist(Est.getNode()); |
| 7179 | |
| 7180 | // Newton iterations: Est = Est + Est (1 - Arg * Est) |
| 7181 | for (int i = 0; i < Iterations; ++i) { |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7182 | SDValue NewEst = DAG.getNode(ISD::FMUL, dl, VT, Op, Est); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7183 | DCI.AddToWorklist(NewEst.getNode()); |
| 7184 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7185 | NewEst = DAG.getNode(ISD::FSUB, dl, VT, FPOne, NewEst); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7186 | DCI.AddToWorklist(NewEst.getNode()); |
| 7187 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7188 | NewEst = DAG.getNode(ISD::FMUL, dl, VT, Est, NewEst); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7189 | DCI.AddToWorklist(NewEst.getNode()); |
| 7190 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7191 | Est = DAG.getNode(ISD::FADD, dl, VT, Est, NewEst); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7192 | DCI.AddToWorklist(Est.getNode()); |
| 7193 | } |
| 7194 | |
| 7195 | return Est; |
| 7196 | } |
| 7197 | |
| 7198 | return SDValue(); |
| 7199 | } |
| 7200 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7201 | SDValue PPCTargetLowering::DAGCombineFastRecipFSQRT(SDValue Op, |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7202 | DAGCombinerInfo &DCI) const { |
| 7203 | if (DCI.isAfterLegalizeVectorOps()) |
| 7204 | return SDValue(); |
| 7205 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7206 | EVT VT = Op.getValueType(); |
| 7207 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 7208 | if ((VT == MVT::f32 && Subtarget.hasFRSQRTES()) || |
| 7209 | (VT == MVT::f64 && Subtarget.hasFRSQRTE()) || |
| 7210 | (VT == MVT::v4f32 && Subtarget.hasAltivec()) || |
| 7211 | (VT == MVT::v2f64 && Subtarget.hasVSX())) { |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7212 | |
| 7213 | // Newton iteration for a function: F(X) is X_{i+1} = X_i - F(X_i)/F'(X_i) |
| 7214 | // For the reciprocal sqrt, we need to find the zero of the function: |
| 7215 | // F(X) = 1/X^2 - A [which has a zero at X = 1/sqrt(A)] |
| 7216 | // => |
| 7217 | // X_{i+1} = X_i (1.5 - A X_i^2 / 2) |
| 7218 | // As a result, we precompute A/2 prior to the iteration loop. |
| 7219 | |
| 7220 | // Convergence is quadratic, so we essentially double the number of digits |
| 7221 | // correct after every iteration. The minimum architected relative |
| 7222 | // accuracy is 2^-5. When hasRecipPrec(), this is 2^-14. IEEE float has |
| 7223 | // 23 digits and double has 52 digits. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 7224 | int Iterations = Subtarget.hasRecipPrec() ? 1 : 3; |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7225 | if (VT.getScalarType() == MVT::f64) |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7226 | ++Iterations; |
| 7227 | |
| 7228 | SelectionDAG &DAG = DCI.DAG; |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 7229 | SDLoc dl(Op); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7230 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7231 | SDValue FPThreeHalves = |
| 7232 | DAG.getConstantFP(1.5, VT.getScalarType()); |
| 7233 | if (VT.isVector()) { |
| 7234 | assert(VT.getVectorNumElements() == 4 && |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7235 | "Unknown vector type"); |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7236 | FPThreeHalves = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, |
| 7237 | FPThreeHalves, FPThreeHalves, |
| 7238 | FPThreeHalves, FPThreeHalves); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7239 | } |
| 7240 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7241 | SDValue Est = DAG.getNode(PPCISD::FRSQRTE, dl, VT, Op); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7242 | DCI.AddToWorklist(Est.getNode()); |
| 7243 | |
| 7244 | // We now need 0.5*Arg which we can write as (1.5*Arg - Arg) so that |
| 7245 | // this entire sequence requires only one FP constant. |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7246 | SDValue HalfArg = DAG.getNode(ISD::FMUL, dl, VT, FPThreeHalves, Op); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7247 | DCI.AddToWorklist(HalfArg.getNode()); |
| 7248 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7249 | HalfArg = DAG.getNode(ISD::FSUB, dl, VT, HalfArg, Op); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7250 | DCI.AddToWorklist(HalfArg.getNode()); |
| 7251 | |
| 7252 | // Newton iterations: Est = Est * (1.5 - HalfArg * Est * Est) |
| 7253 | for (int i = 0; i < Iterations; ++i) { |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7254 | SDValue NewEst = DAG.getNode(ISD::FMUL, dl, VT, Est, Est); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7255 | DCI.AddToWorklist(NewEst.getNode()); |
| 7256 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7257 | NewEst = DAG.getNode(ISD::FMUL, dl, VT, HalfArg, NewEst); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7258 | DCI.AddToWorklist(NewEst.getNode()); |
| 7259 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7260 | NewEst = DAG.getNode(ISD::FSUB, dl, VT, FPThreeHalves, NewEst); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7261 | DCI.AddToWorklist(NewEst.getNode()); |
| 7262 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7263 | Est = DAG.getNode(ISD::FMUL, dl, VT, Est, NewEst); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7264 | DCI.AddToWorklist(Est.getNode()); |
| 7265 | } |
| 7266 | |
| 7267 | return Est; |
| 7268 | } |
| 7269 | |
| 7270 | return SDValue(); |
| 7271 | } |
| 7272 | |
Hal Finkel | 8ebfe6c | 2013-05-27 02:06:39 +0000 | [diff] [blame] | 7273 | // Like SelectionDAG::isConsecutiveLoad, but also works for stores, and does |
| 7274 | // not enforce equality of the chain operands. |
| 7275 | static bool isConsecutiveLS(LSBaseSDNode *LS, LSBaseSDNode *Base, |
| 7276 | unsigned Bytes, int Dist, |
| 7277 | SelectionDAG &DAG) { |
| 7278 | EVT VT = LS->getMemoryVT(); |
| 7279 | if (VT.getSizeInBits() / 8 != Bytes) |
| 7280 | return false; |
| 7281 | |
| 7282 | SDValue Loc = LS->getBasePtr(); |
| 7283 | SDValue BaseLoc = Base->getBasePtr(); |
| 7284 | if (Loc.getOpcode() == ISD::FrameIndex) { |
| 7285 | if (BaseLoc.getOpcode() != ISD::FrameIndex) |
| 7286 | return false; |
| 7287 | const MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); |
| 7288 | int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); |
| 7289 | int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); |
| 7290 | int FS = MFI->getObjectSize(FI); |
| 7291 | int BFS = MFI->getObjectSize(BFI); |
| 7292 | if (FS != BFS || FS != (int)Bytes) return false; |
| 7293 | return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); |
| 7294 | } |
| 7295 | |
| 7296 | // Handle X+C |
| 7297 | if (DAG.isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && |
| 7298 | cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) |
| 7299 | return true; |
| 7300 | |
| 7301 | const TargetLowering &TLI = DAG.getTargetLoweringInfo(); |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 7302 | const GlobalValue *GV1 = nullptr; |
| 7303 | const GlobalValue *GV2 = nullptr; |
Hal Finkel | 8ebfe6c | 2013-05-27 02:06:39 +0000 | [diff] [blame] | 7304 | int64_t Offset1 = 0; |
| 7305 | int64_t Offset2 = 0; |
| 7306 | bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); |
| 7307 | bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); |
| 7308 | if (isGA1 && isGA2 && GV1 == GV2) |
| 7309 | return Offset1 == (Offset2 + Dist*Bytes); |
| 7310 | return false; |
| 7311 | } |
| 7312 | |
Hal Finkel | 7d8a691 | 2013-05-26 18:08:30 +0000 | [diff] [blame] | 7313 | // Return true is there is a nearyby consecutive load to the one provided |
| 7314 | // (regardless of alignment). We search up and down the chain, looking though |
| 7315 | // token factors and other loads (but nothing else). As a result, a true |
| 7316 | // results indicates that it is safe to create a new consecutive load adjacent |
| 7317 | // to the load provided. |
| 7318 | static bool findConsecutiveLoad(LoadSDNode *LD, SelectionDAG &DAG) { |
| 7319 | SDValue Chain = LD->getChain(); |
| 7320 | EVT VT = LD->getMemoryVT(); |
| 7321 | |
| 7322 | SmallSet<SDNode *, 16> LoadRoots; |
| 7323 | SmallVector<SDNode *, 8> Queue(1, Chain.getNode()); |
| 7324 | SmallSet<SDNode *, 16> Visited; |
| 7325 | |
| 7326 | // First, search up the chain, branching to follow all token-factor operands. |
| 7327 | // If we find a consecutive load, then we're done, otherwise, record all |
| 7328 | // nodes just above the top-level loads and token factors. |
| 7329 | while (!Queue.empty()) { |
| 7330 | SDNode *ChainNext = Queue.pop_back_val(); |
| 7331 | if (!Visited.insert(ChainNext)) |
| 7332 | continue; |
| 7333 | |
| 7334 | if (LoadSDNode *ChainLD = dyn_cast<LoadSDNode>(ChainNext)) { |
Hal Finkel | 8ebfe6c | 2013-05-27 02:06:39 +0000 | [diff] [blame] | 7335 | if (isConsecutiveLS(ChainLD, LD, VT.getStoreSize(), 1, DAG)) |
Hal Finkel | 7d8a691 | 2013-05-26 18:08:30 +0000 | [diff] [blame] | 7336 | return true; |
| 7337 | |
| 7338 | if (!Visited.count(ChainLD->getChain().getNode())) |
| 7339 | Queue.push_back(ChainLD->getChain().getNode()); |
| 7340 | } else if (ChainNext->getOpcode() == ISD::TokenFactor) { |
Craig Topper | 66e588b | 2014-06-29 00:40:57 +0000 | [diff] [blame] | 7341 | for (const SDUse &O : ChainNext->ops()) |
| 7342 | if (!Visited.count(O.getNode())) |
| 7343 | Queue.push_back(O.getNode()); |
Hal Finkel | 7d8a691 | 2013-05-26 18:08:30 +0000 | [diff] [blame] | 7344 | } else |
| 7345 | LoadRoots.insert(ChainNext); |
| 7346 | } |
| 7347 | |
| 7348 | // Second, search down the chain, starting from the top-level nodes recorded |
| 7349 | // in the first phase. These top-level nodes are the nodes just above all |
| 7350 | // loads and token factors. Starting with their uses, recursively look though |
| 7351 | // all loads (just the chain uses) and token factors to find a consecutive |
| 7352 | // load. |
| 7353 | Visited.clear(); |
| 7354 | Queue.clear(); |
| 7355 | |
| 7356 | for (SmallSet<SDNode *, 16>::iterator I = LoadRoots.begin(), |
| 7357 | IE = LoadRoots.end(); I != IE; ++I) { |
| 7358 | Queue.push_back(*I); |
| 7359 | |
| 7360 | while (!Queue.empty()) { |
| 7361 | SDNode *LoadRoot = Queue.pop_back_val(); |
| 7362 | if (!Visited.insert(LoadRoot)) |
| 7363 | continue; |
| 7364 | |
| 7365 | if (LoadSDNode *ChainLD = dyn_cast<LoadSDNode>(LoadRoot)) |
Hal Finkel | 8ebfe6c | 2013-05-27 02:06:39 +0000 | [diff] [blame] | 7366 | if (isConsecutiveLS(ChainLD, LD, VT.getStoreSize(), 1, DAG)) |
Hal Finkel | 7d8a691 | 2013-05-26 18:08:30 +0000 | [diff] [blame] | 7367 | return true; |
| 7368 | |
| 7369 | for (SDNode::use_iterator UI = LoadRoot->use_begin(), |
| 7370 | UE = LoadRoot->use_end(); UI != UE; ++UI) |
| 7371 | if (((isa<LoadSDNode>(*UI) && |
| 7372 | cast<LoadSDNode>(*UI)->getChain().getNode() == LoadRoot) || |
| 7373 | UI->getOpcode() == ISD::TokenFactor) && !Visited.count(*UI)) |
| 7374 | Queue.push_back(*UI); |
| 7375 | } |
| 7376 | } |
| 7377 | |
| 7378 | return false; |
| 7379 | } |
| 7380 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7381 | SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N, |
| 7382 | DAGCombinerInfo &DCI) const { |
| 7383 | SelectionDAG &DAG = DCI.DAG; |
| 7384 | SDLoc dl(N); |
| 7385 | |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 7386 | assert(Subtarget.useCRBits() && |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7387 | "Expecting to be tracking CR bits"); |
| 7388 | // If we're tracking CR bits, we need to be careful that we don't have: |
| 7389 | // trunc(binary-ops(zext(x), zext(y))) |
| 7390 | // or |
| 7391 | // trunc(binary-ops(binary-ops(zext(x), zext(y)), ...) |
| 7392 | // such that we're unnecessarily moving things into GPRs when it would be |
| 7393 | // better to keep them in CR bits. |
| 7394 | |
| 7395 | // Note that trunc here can be an actual i1 trunc, or can be the effective |
| 7396 | // truncation that comes from a setcc or select_cc. |
| 7397 | if (N->getOpcode() == ISD::TRUNCATE && |
| 7398 | N->getValueType(0) != MVT::i1) |
| 7399 | return SDValue(); |
| 7400 | |
| 7401 | if (N->getOperand(0).getValueType() != MVT::i32 && |
| 7402 | N->getOperand(0).getValueType() != MVT::i64) |
| 7403 | return SDValue(); |
| 7404 | |
| 7405 | if (N->getOpcode() == ISD::SETCC || |
| 7406 | N->getOpcode() == ISD::SELECT_CC) { |
| 7407 | // If we're looking at a comparison, then we need to make sure that the |
| 7408 | // high bits (all except for the first) don't matter the result. |
| 7409 | ISD::CondCode CC = |
| 7410 | cast<CondCodeSDNode>(N->getOperand( |
| 7411 | N->getOpcode() == ISD::SETCC ? 2 : 4))->get(); |
| 7412 | unsigned OpBits = N->getOperand(0).getValueSizeInBits(); |
| 7413 | |
| 7414 | if (ISD::isSignedIntSetCC(CC)) { |
| 7415 | if (DAG.ComputeNumSignBits(N->getOperand(0)) != OpBits || |
| 7416 | DAG.ComputeNumSignBits(N->getOperand(1)) != OpBits) |
| 7417 | return SDValue(); |
| 7418 | } else if (ISD::isUnsignedIntSetCC(CC)) { |
| 7419 | if (!DAG.MaskedValueIsZero(N->getOperand(0), |
| 7420 | APInt::getHighBitsSet(OpBits, OpBits-1)) || |
| 7421 | !DAG.MaskedValueIsZero(N->getOperand(1), |
| 7422 | APInt::getHighBitsSet(OpBits, OpBits-1))) |
| 7423 | return SDValue(); |
| 7424 | } else { |
| 7425 | // This is neither a signed nor an unsigned comparison, just make sure |
| 7426 | // that the high bits are equal. |
| 7427 | APInt Op1Zero, Op1One; |
| 7428 | APInt Op2Zero, Op2One; |
Jay Foad | a0653a3 | 2014-05-14 21:14:37 +0000 | [diff] [blame] | 7429 | DAG.computeKnownBits(N->getOperand(0), Op1Zero, Op1One); |
| 7430 | DAG.computeKnownBits(N->getOperand(1), Op2Zero, Op2One); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7431 | |
| 7432 | // We don't really care about what is known about the first bit (if |
| 7433 | // anything), so clear it in all masks prior to comparing them. |
| 7434 | Op1Zero.clearBit(0); Op1One.clearBit(0); |
| 7435 | Op2Zero.clearBit(0); Op2One.clearBit(0); |
| 7436 | |
| 7437 | if (Op1Zero != Op2Zero || Op1One != Op2One) |
| 7438 | return SDValue(); |
| 7439 | } |
| 7440 | } |
| 7441 | |
| 7442 | // We now know that the higher-order bits are irrelevant, we just need to |
| 7443 | // make sure that all of the intermediate operations are bit operations, and |
| 7444 | // all inputs are extensions. |
| 7445 | if (N->getOperand(0).getOpcode() != ISD::AND && |
| 7446 | N->getOperand(0).getOpcode() != ISD::OR && |
| 7447 | N->getOperand(0).getOpcode() != ISD::XOR && |
| 7448 | N->getOperand(0).getOpcode() != ISD::SELECT && |
| 7449 | N->getOperand(0).getOpcode() != ISD::SELECT_CC && |
| 7450 | N->getOperand(0).getOpcode() != ISD::TRUNCATE && |
| 7451 | N->getOperand(0).getOpcode() != ISD::SIGN_EXTEND && |
| 7452 | N->getOperand(0).getOpcode() != ISD::ZERO_EXTEND && |
| 7453 | N->getOperand(0).getOpcode() != ISD::ANY_EXTEND) |
| 7454 | return SDValue(); |
| 7455 | |
| 7456 | if ((N->getOpcode() == ISD::SETCC || N->getOpcode() == ISD::SELECT_CC) && |
| 7457 | N->getOperand(1).getOpcode() != ISD::AND && |
| 7458 | N->getOperand(1).getOpcode() != ISD::OR && |
| 7459 | N->getOperand(1).getOpcode() != ISD::XOR && |
| 7460 | N->getOperand(1).getOpcode() != ISD::SELECT && |
| 7461 | N->getOperand(1).getOpcode() != ISD::SELECT_CC && |
| 7462 | N->getOperand(1).getOpcode() != ISD::TRUNCATE && |
| 7463 | N->getOperand(1).getOpcode() != ISD::SIGN_EXTEND && |
| 7464 | N->getOperand(1).getOpcode() != ISD::ZERO_EXTEND && |
| 7465 | N->getOperand(1).getOpcode() != ISD::ANY_EXTEND) |
| 7466 | return SDValue(); |
| 7467 | |
| 7468 | SmallVector<SDValue, 4> Inputs; |
| 7469 | SmallVector<SDValue, 8> BinOps, PromOps; |
| 7470 | SmallPtrSet<SDNode *, 16> Visited; |
| 7471 | |
| 7472 | for (unsigned i = 0; i < 2; ++i) { |
| 7473 | if (((N->getOperand(i).getOpcode() == ISD::SIGN_EXTEND || |
| 7474 | N->getOperand(i).getOpcode() == ISD::ZERO_EXTEND || |
| 7475 | N->getOperand(i).getOpcode() == ISD::ANY_EXTEND) && |
| 7476 | N->getOperand(i).getOperand(0).getValueType() == MVT::i1) || |
| 7477 | isa<ConstantSDNode>(N->getOperand(i))) |
| 7478 | Inputs.push_back(N->getOperand(i)); |
| 7479 | else |
| 7480 | BinOps.push_back(N->getOperand(i)); |
| 7481 | |
| 7482 | if (N->getOpcode() == ISD::TRUNCATE) |
| 7483 | break; |
| 7484 | } |
| 7485 | |
| 7486 | // Visit all inputs, collect all binary operations (and, or, xor and |
| 7487 | // select) that are all fed by extensions. |
| 7488 | while (!BinOps.empty()) { |
| 7489 | SDValue BinOp = BinOps.back(); |
| 7490 | BinOps.pop_back(); |
| 7491 | |
| 7492 | if (!Visited.insert(BinOp.getNode())) |
| 7493 | continue; |
| 7494 | |
| 7495 | PromOps.push_back(BinOp); |
| 7496 | |
| 7497 | for (unsigned i = 0, ie = BinOp.getNumOperands(); i != ie; ++i) { |
| 7498 | // The condition of the select is not promoted. |
| 7499 | if (BinOp.getOpcode() == ISD::SELECT && i == 0) |
| 7500 | continue; |
| 7501 | if (BinOp.getOpcode() == ISD::SELECT_CC && i != 2 && i != 3) |
| 7502 | continue; |
| 7503 | |
| 7504 | if (((BinOp.getOperand(i).getOpcode() == ISD::SIGN_EXTEND || |
| 7505 | BinOp.getOperand(i).getOpcode() == ISD::ZERO_EXTEND || |
| 7506 | BinOp.getOperand(i).getOpcode() == ISD::ANY_EXTEND) && |
| 7507 | BinOp.getOperand(i).getOperand(0).getValueType() == MVT::i1) || |
| 7508 | isa<ConstantSDNode>(BinOp.getOperand(i))) { |
| 7509 | Inputs.push_back(BinOp.getOperand(i)); |
| 7510 | } else if (BinOp.getOperand(i).getOpcode() == ISD::AND || |
| 7511 | BinOp.getOperand(i).getOpcode() == ISD::OR || |
| 7512 | BinOp.getOperand(i).getOpcode() == ISD::XOR || |
| 7513 | BinOp.getOperand(i).getOpcode() == ISD::SELECT || |
| 7514 | BinOp.getOperand(i).getOpcode() == ISD::SELECT_CC || |
| 7515 | BinOp.getOperand(i).getOpcode() == ISD::TRUNCATE || |
| 7516 | BinOp.getOperand(i).getOpcode() == ISD::SIGN_EXTEND || |
| 7517 | BinOp.getOperand(i).getOpcode() == ISD::ZERO_EXTEND || |
| 7518 | BinOp.getOperand(i).getOpcode() == ISD::ANY_EXTEND) { |
| 7519 | BinOps.push_back(BinOp.getOperand(i)); |
| 7520 | } else { |
| 7521 | // We have an input that is not an extension or another binary |
| 7522 | // operation; we'll abort this transformation. |
| 7523 | return SDValue(); |
| 7524 | } |
| 7525 | } |
| 7526 | } |
| 7527 | |
| 7528 | // Make sure that this is a self-contained cluster of operations (which |
| 7529 | // is not quite the same thing as saying that everything has only one |
| 7530 | // use). |
| 7531 | for (unsigned i = 0, ie = Inputs.size(); i != ie; ++i) { |
| 7532 | if (isa<ConstantSDNode>(Inputs[i])) |
| 7533 | continue; |
| 7534 | |
| 7535 | for (SDNode::use_iterator UI = Inputs[i].getNode()->use_begin(), |
| 7536 | UE = Inputs[i].getNode()->use_end(); |
| 7537 | UI != UE; ++UI) { |
| 7538 | SDNode *User = *UI; |
| 7539 | if (User != N && !Visited.count(User)) |
| 7540 | return SDValue(); |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7541 | |
| 7542 | // Make sure that we're not going to promote the non-output-value |
| 7543 | // operand(s) or SELECT or SELECT_CC. |
| 7544 | // FIXME: Although we could sometimes handle this, and it does occur in |
| 7545 | // practice that one of the condition inputs to the select is also one of |
| 7546 | // the outputs, we currently can't deal with this. |
| 7547 | if (User->getOpcode() == ISD::SELECT) { |
| 7548 | if (User->getOperand(0) == Inputs[i]) |
| 7549 | return SDValue(); |
| 7550 | } else if (User->getOpcode() == ISD::SELECT_CC) { |
| 7551 | if (User->getOperand(0) == Inputs[i] || |
| 7552 | User->getOperand(1) == Inputs[i]) |
| 7553 | return SDValue(); |
| 7554 | } |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7555 | } |
| 7556 | } |
| 7557 | |
| 7558 | for (unsigned i = 0, ie = PromOps.size(); i != ie; ++i) { |
| 7559 | for (SDNode::use_iterator UI = PromOps[i].getNode()->use_begin(), |
| 7560 | UE = PromOps[i].getNode()->use_end(); |
| 7561 | UI != UE; ++UI) { |
| 7562 | SDNode *User = *UI; |
| 7563 | if (User != N && !Visited.count(User)) |
| 7564 | return SDValue(); |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7565 | |
| 7566 | // Make sure that we're not going to promote the non-output-value |
| 7567 | // operand(s) or SELECT or SELECT_CC. |
| 7568 | // FIXME: Although we could sometimes handle this, and it does occur in |
| 7569 | // practice that one of the condition inputs to the select is also one of |
| 7570 | // the outputs, we currently can't deal with this. |
| 7571 | if (User->getOpcode() == ISD::SELECT) { |
| 7572 | if (User->getOperand(0) == PromOps[i]) |
| 7573 | return SDValue(); |
| 7574 | } else if (User->getOpcode() == ISD::SELECT_CC) { |
| 7575 | if (User->getOperand(0) == PromOps[i] || |
| 7576 | User->getOperand(1) == PromOps[i]) |
| 7577 | return SDValue(); |
| 7578 | } |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7579 | } |
| 7580 | } |
| 7581 | |
| 7582 | // Replace all inputs with the extension operand. |
| 7583 | for (unsigned i = 0, ie = Inputs.size(); i != ie; ++i) { |
| 7584 | // Constants may have users outside the cluster of to-be-promoted nodes, |
| 7585 | // and so we need to replace those as we do the promotions. |
| 7586 | if (isa<ConstantSDNode>(Inputs[i])) |
| 7587 | continue; |
| 7588 | else |
| 7589 | DAG.ReplaceAllUsesOfValueWith(Inputs[i], Inputs[i].getOperand(0)); |
| 7590 | } |
| 7591 | |
| 7592 | // Replace all operations (these are all the same, but have a different |
| 7593 | // (i1) return type). DAG.getNode will validate that the types of |
| 7594 | // a binary operator match, so go through the list in reverse so that |
| 7595 | // we've likely promoted both operands first. Any intermediate truncations or |
| 7596 | // extensions disappear. |
| 7597 | while (!PromOps.empty()) { |
| 7598 | SDValue PromOp = PromOps.back(); |
| 7599 | PromOps.pop_back(); |
| 7600 | |
| 7601 | if (PromOp.getOpcode() == ISD::TRUNCATE || |
| 7602 | PromOp.getOpcode() == ISD::SIGN_EXTEND || |
| 7603 | PromOp.getOpcode() == ISD::ZERO_EXTEND || |
| 7604 | PromOp.getOpcode() == ISD::ANY_EXTEND) { |
| 7605 | if (!isa<ConstantSDNode>(PromOp.getOperand(0)) && |
| 7606 | PromOp.getOperand(0).getValueType() != MVT::i1) { |
| 7607 | // The operand is not yet ready (see comment below). |
| 7608 | PromOps.insert(PromOps.begin(), PromOp); |
| 7609 | continue; |
| 7610 | } |
| 7611 | |
| 7612 | SDValue RepValue = PromOp.getOperand(0); |
| 7613 | if (isa<ConstantSDNode>(RepValue)) |
| 7614 | RepValue = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, RepValue); |
| 7615 | |
| 7616 | DAG.ReplaceAllUsesOfValueWith(PromOp, RepValue); |
| 7617 | continue; |
| 7618 | } |
| 7619 | |
| 7620 | unsigned C; |
| 7621 | switch (PromOp.getOpcode()) { |
| 7622 | default: C = 0; break; |
| 7623 | case ISD::SELECT: C = 1; break; |
| 7624 | case ISD::SELECT_CC: C = 2; break; |
| 7625 | } |
| 7626 | |
| 7627 | if ((!isa<ConstantSDNode>(PromOp.getOperand(C)) && |
| 7628 | PromOp.getOperand(C).getValueType() != MVT::i1) || |
| 7629 | (!isa<ConstantSDNode>(PromOp.getOperand(C+1)) && |
| 7630 | PromOp.getOperand(C+1).getValueType() != MVT::i1)) { |
| 7631 | // The to-be-promoted operands of this node have not yet been |
| 7632 | // promoted (this should be rare because we're going through the |
| 7633 | // list backward, but if one of the operands has several users in |
| 7634 | // this cluster of to-be-promoted nodes, it is possible). |
| 7635 | PromOps.insert(PromOps.begin(), PromOp); |
| 7636 | continue; |
| 7637 | } |
| 7638 | |
| 7639 | SmallVector<SDValue, 3> Ops(PromOp.getNode()->op_begin(), |
| 7640 | PromOp.getNode()->op_end()); |
| 7641 | |
| 7642 | // If there are any constant inputs, make sure they're replaced now. |
| 7643 | for (unsigned i = 0; i < 2; ++i) |
| 7644 | if (isa<ConstantSDNode>(Ops[C+i])) |
| 7645 | Ops[C+i] = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, Ops[C+i]); |
| 7646 | |
| 7647 | DAG.ReplaceAllUsesOfValueWith(PromOp, |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 7648 | DAG.getNode(PromOp.getOpcode(), dl, MVT::i1, Ops)); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7649 | } |
| 7650 | |
| 7651 | // Now we're left with the initial truncation itself. |
| 7652 | if (N->getOpcode() == ISD::TRUNCATE) |
| 7653 | return N->getOperand(0); |
| 7654 | |
| 7655 | // Otherwise, this is a comparison. The operands to be compared have just |
| 7656 | // changed type (to i1), but everything else is the same. |
| 7657 | return SDValue(N, 0); |
| 7658 | } |
| 7659 | |
| 7660 | SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N, |
| 7661 | DAGCombinerInfo &DCI) const { |
| 7662 | SelectionDAG &DAG = DCI.DAG; |
| 7663 | SDLoc dl(N); |
| 7664 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7665 | // If we're tracking CR bits, we need to be careful that we don't have: |
| 7666 | // zext(binary-ops(trunc(x), trunc(y))) |
| 7667 | // or |
| 7668 | // zext(binary-ops(binary-ops(trunc(x), trunc(y)), ...) |
| 7669 | // such that we're unnecessarily moving things into CR bits that can more |
| 7670 | // efficiently stay in GPRs. Note that if we're not certain that the high |
| 7671 | // bits are set as required by the final extension, we still may need to do |
| 7672 | // some masking to get the proper behavior. |
| 7673 | |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7674 | // This same functionality is important on PPC64 when dealing with |
| 7675 | // 32-to-64-bit extensions; these occur often when 32-bit values are used as |
| 7676 | // the return values of functions. Because it is so similar, it is handled |
| 7677 | // here as well. |
| 7678 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7679 | if (N->getValueType(0) != MVT::i32 && |
| 7680 | N->getValueType(0) != MVT::i64) |
| 7681 | return SDValue(); |
| 7682 | |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7683 | if (!((N->getOperand(0).getValueType() == MVT::i1 && |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 7684 | Subtarget.useCRBits()) || |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7685 | (N->getOperand(0).getValueType() == MVT::i32 && |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 7686 | Subtarget.isPPC64()))) |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7687 | return SDValue(); |
| 7688 | |
| 7689 | if (N->getOperand(0).getOpcode() != ISD::AND && |
| 7690 | N->getOperand(0).getOpcode() != ISD::OR && |
| 7691 | N->getOperand(0).getOpcode() != ISD::XOR && |
| 7692 | N->getOperand(0).getOpcode() != ISD::SELECT && |
| 7693 | N->getOperand(0).getOpcode() != ISD::SELECT_CC) |
| 7694 | return SDValue(); |
| 7695 | |
| 7696 | SmallVector<SDValue, 4> Inputs; |
| 7697 | SmallVector<SDValue, 8> BinOps(1, N->getOperand(0)), PromOps; |
| 7698 | SmallPtrSet<SDNode *, 16> Visited; |
| 7699 | |
| 7700 | // Visit all inputs, collect all binary operations (and, or, xor and |
| 7701 | // select) that are all fed by truncations. |
| 7702 | while (!BinOps.empty()) { |
| 7703 | SDValue BinOp = BinOps.back(); |
| 7704 | BinOps.pop_back(); |
| 7705 | |
| 7706 | if (!Visited.insert(BinOp.getNode())) |
| 7707 | continue; |
| 7708 | |
| 7709 | PromOps.push_back(BinOp); |
| 7710 | |
| 7711 | for (unsigned i = 0, ie = BinOp.getNumOperands(); i != ie; ++i) { |
| 7712 | // The condition of the select is not promoted. |
| 7713 | if (BinOp.getOpcode() == ISD::SELECT && i == 0) |
| 7714 | continue; |
| 7715 | if (BinOp.getOpcode() == ISD::SELECT_CC && i != 2 && i != 3) |
| 7716 | continue; |
| 7717 | |
| 7718 | if (BinOp.getOperand(i).getOpcode() == ISD::TRUNCATE || |
| 7719 | isa<ConstantSDNode>(BinOp.getOperand(i))) { |
| 7720 | Inputs.push_back(BinOp.getOperand(i)); |
| 7721 | } else if (BinOp.getOperand(i).getOpcode() == ISD::AND || |
| 7722 | BinOp.getOperand(i).getOpcode() == ISD::OR || |
| 7723 | BinOp.getOperand(i).getOpcode() == ISD::XOR || |
| 7724 | BinOp.getOperand(i).getOpcode() == ISD::SELECT || |
| 7725 | BinOp.getOperand(i).getOpcode() == ISD::SELECT_CC) { |
| 7726 | BinOps.push_back(BinOp.getOperand(i)); |
| 7727 | } else { |
| 7728 | // We have an input that is not a truncation or another binary |
| 7729 | // operation; we'll abort this transformation. |
| 7730 | return SDValue(); |
| 7731 | } |
| 7732 | } |
| 7733 | } |
| 7734 | |
| 7735 | // Make sure that this is a self-contained cluster of operations (which |
| 7736 | // is not quite the same thing as saying that everything has only one |
| 7737 | // use). |
| 7738 | for (unsigned i = 0, ie = Inputs.size(); i != ie; ++i) { |
| 7739 | if (isa<ConstantSDNode>(Inputs[i])) |
| 7740 | continue; |
| 7741 | |
| 7742 | for (SDNode::use_iterator UI = Inputs[i].getNode()->use_begin(), |
| 7743 | UE = Inputs[i].getNode()->use_end(); |
| 7744 | UI != UE; ++UI) { |
| 7745 | SDNode *User = *UI; |
| 7746 | if (User != N && !Visited.count(User)) |
| 7747 | return SDValue(); |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7748 | |
| 7749 | // Make sure that we're not going to promote the non-output-value |
| 7750 | // operand(s) or SELECT or SELECT_CC. |
| 7751 | // FIXME: Although we could sometimes handle this, and it does occur in |
| 7752 | // practice that one of the condition inputs to the select is also one of |
| 7753 | // the outputs, we currently can't deal with this. |
| 7754 | if (User->getOpcode() == ISD::SELECT) { |
| 7755 | if (User->getOperand(0) == Inputs[i]) |
| 7756 | return SDValue(); |
| 7757 | } else if (User->getOpcode() == ISD::SELECT_CC) { |
| 7758 | if (User->getOperand(0) == Inputs[i] || |
| 7759 | User->getOperand(1) == Inputs[i]) |
| 7760 | return SDValue(); |
| 7761 | } |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7762 | } |
| 7763 | } |
| 7764 | |
| 7765 | for (unsigned i = 0, ie = PromOps.size(); i != ie; ++i) { |
| 7766 | for (SDNode::use_iterator UI = PromOps[i].getNode()->use_begin(), |
| 7767 | UE = PromOps[i].getNode()->use_end(); |
| 7768 | UI != UE; ++UI) { |
| 7769 | SDNode *User = *UI; |
| 7770 | if (User != N && !Visited.count(User)) |
| 7771 | return SDValue(); |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7772 | |
| 7773 | // Make sure that we're not going to promote the non-output-value |
| 7774 | // operand(s) or SELECT or SELECT_CC. |
| 7775 | // FIXME: Although we could sometimes handle this, and it does occur in |
| 7776 | // practice that one of the condition inputs to the select is also one of |
| 7777 | // the outputs, we currently can't deal with this. |
| 7778 | if (User->getOpcode() == ISD::SELECT) { |
| 7779 | if (User->getOperand(0) == PromOps[i]) |
| 7780 | return SDValue(); |
| 7781 | } else if (User->getOpcode() == ISD::SELECT_CC) { |
| 7782 | if (User->getOperand(0) == PromOps[i] || |
| 7783 | User->getOperand(1) == PromOps[i]) |
| 7784 | return SDValue(); |
| 7785 | } |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7786 | } |
| 7787 | } |
| 7788 | |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7789 | unsigned PromBits = N->getOperand(0).getValueSizeInBits(); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7790 | bool ReallyNeedsExt = false; |
| 7791 | if (N->getOpcode() != ISD::ANY_EXTEND) { |
| 7792 | // If all of the inputs are not already sign/zero extended, then |
| 7793 | // we'll still need to do that at the end. |
| 7794 | for (unsigned i = 0, ie = Inputs.size(); i != ie; ++i) { |
| 7795 | if (isa<ConstantSDNode>(Inputs[i])) |
| 7796 | continue; |
| 7797 | |
| 7798 | unsigned OpBits = |
| 7799 | Inputs[i].getOperand(0).getValueSizeInBits(); |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7800 | assert(PromBits < OpBits && "Truncation not to a smaller bit count?"); |
| 7801 | |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7802 | if ((N->getOpcode() == ISD::ZERO_EXTEND && |
| 7803 | !DAG.MaskedValueIsZero(Inputs[i].getOperand(0), |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7804 | APInt::getHighBitsSet(OpBits, |
| 7805 | OpBits-PromBits))) || |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7806 | (N->getOpcode() == ISD::SIGN_EXTEND && |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7807 | DAG.ComputeNumSignBits(Inputs[i].getOperand(0)) < |
| 7808 | (OpBits-(PromBits-1)))) { |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7809 | ReallyNeedsExt = true; |
| 7810 | break; |
| 7811 | } |
| 7812 | } |
| 7813 | } |
| 7814 | |
| 7815 | // Replace all inputs, either with the truncation operand, or a |
| 7816 | // truncation or extension to the final output type. |
| 7817 | for (unsigned i = 0, ie = Inputs.size(); i != ie; ++i) { |
| 7818 | // Constant inputs need to be replaced with the to-be-promoted nodes that |
| 7819 | // use them because they might have users outside of the cluster of |
| 7820 | // promoted nodes. |
| 7821 | if (isa<ConstantSDNode>(Inputs[i])) |
| 7822 | continue; |
| 7823 | |
| 7824 | SDValue InSrc = Inputs[i].getOperand(0); |
| 7825 | if (Inputs[i].getValueType() == N->getValueType(0)) |
| 7826 | DAG.ReplaceAllUsesOfValueWith(Inputs[i], InSrc); |
| 7827 | else if (N->getOpcode() == ISD::SIGN_EXTEND) |
| 7828 | DAG.ReplaceAllUsesOfValueWith(Inputs[i], |
| 7829 | DAG.getSExtOrTrunc(InSrc, dl, N->getValueType(0))); |
| 7830 | else if (N->getOpcode() == ISD::ZERO_EXTEND) |
| 7831 | DAG.ReplaceAllUsesOfValueWith(Inputs[i], |
| 7832 | DAG.getZExtOrTrunc(InSrc, dl, N->getValueType(0))); |
| 7833 | else |
| 7834 | DAG.ReplaceAllUsesOfValueWith(Inputs[i], |
| 7835 | DAG.getAnyExtOrTrunc(InSrc, dl, N->getValueType(0))); |
| 7836 | } |
| 7837 | |
| 7838 | // Replace all operations (these are all the same, but have a different |
| 7839 | // (promoted) return type). DAG.getNode will validate that the types of |
| 7840 | // a binary operator match, so go through the list in reverse so that |
| 7841 | // we've likely promoted both operands first. |
| 7842 | while (!PromOps.empty()) { |
| 7843 | SDValue PromOp = PromOps.back(); |
| 7844 | PromOps.pop_back(); |
| 7845 | |
| 7846 | unsigned C; |
| 7847 | switch (PromOp.getOpcode()) { |
| 7848 | default: C = 0; break; |
| 7849 | case ISD::SELECT: C = 1; break; |
| 7850 | case ISD::SELECT_CC: C = 2; break; |
| 7851 | } |
| 7852 | |
| 7853 | if ((!isa<ConstantSDNode>(PromOp.getOperand(C)) && |
| 7854 | PromOp.getOperand(C).getValueType() != N->getValueType(0)) || |
| 7855 | (!isa<ConstantSDNode>(PromOp.getOperand(C+1)) && |
| 7856 | PromOp.getOperand(C+1).getValueType() != N->getValueType(0))) { |
| 7857 | // The to-be-promoted operands of this node have not yet been |
| 7858 | // promoted (this should be rare because we're going through the |
| 7859 | // list backward, but if one of the operands has several users in |
| 7860 | // this cluster of to-be-promoted nodes, it is possible). |
| 7861 | PromOps.insert(PromOps.begin(), PromOp); |
| 7862 | continue; |
| 7863 | } |
| 7864 | |
| 7865 | SmallVector<SDValue, 3> Ops(PromOp.getNode()->op_begin(), |
| 7866 | PromOp.getNode()->op_end()); |
| 7867 | |
| 7868 | // If this node has constant inputs, then they'll need to be promoted here. |
| 7869 | for (unsigned i = 0; i < 2; ++i) { |
| 7870 | if (!isa<ConstantSDNode>(Ops[C+i])) |
| 7871 | continue; |
| 7872 | if (Ops[C+i].getValueType() == N->getValueType(0)) |
| 7873 | continue; |
| 7874 | |
| 7875 | if (N->getOpcode() == ISD::SIGN_EXTEND) |
| 7876 | Ops[C+i] = DAG.getSExtOrTrunc(Ops[C+i], dl, N->getValueType(0)); |
| 7877 | else if (N->getOpcode() == ISD::ZERO_EXTEND) |
| 7878 | Ops[C+i] = DAG.getZExtOrTrunc(Ops[C+i], dl, N->getValueType(0)); |
| 7879 | else |
| 7880 | Ops[C+i] = DAG.getAnyExtOrTrunc(Ops[C+i], dl, N->getValueType(0)); |
| 7881 | } |
| 7882 | |
| 7883 | DAG.ReplaceAllUsesOfValueWith(PromOp, |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 7884 | DAG.getNode(PromOp.getOpcode(), dl, N->getValueType(0), Ops)); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7885 | } |
| 7886 | |
| 7887 | // Now we're left with the initial extension itself. |
| 7888 | if (!ReallyNeedsExt) |
| 7889 | return N->getOperand(0); |
| 7890 | |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7891 | // To zero extend, just mask off everything except for the first bit (in the |
| 7892 | // i1 case). |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7893 | if (N->getOpcode() == ISD::ZERO_EXTEND) |
| 7894 | return DAG.getNode(ISD::AND, dl, N->getValueType(0), N->getOperand(0), |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7895 | DAG.getConstant(APInt::getLowBitsSet( |
| 7896 | N->getValueSizeInBits(0), PromBits), |
| 7897 | N->getValueType(0))); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7898 | |
| 7899 | assert(N->getOpcode() == ISD::SIGN_EXTEND && |
| 7900 | "Invalid extension type"); |
| 7901 | EVT ShiftAmountTy = getShiftAmountTy(N->getValueType(0)); |
| 7902 | SDValue ShiftCst = |
Hal Finkel | 46043ed | 2014-03-01 21:36:57 +0000 | [diff] [blame] | 7903 | DAG.getConstant(N->getValueSizeInBits(0)-PromBits, ShiftAmountTy); |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7904 | return DAG.getNode(ISD::SRA, dl, N->getValueType(0), |
| 7905 | DAG.getNode(ISD::SHL, dl, N->getValueType(0), |
| 7906 | N->getOperand(0), ShiftCst), ShiftCst); |
| 7907 | } |
| 7908 | |
Duncan Sands | dc2dac1 | 2008-11-24 14:53:14 +0000 | [diff] [blame] | 7909 | SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N, |
| 7910 | DAGCombinerInfo &DCI) const { |
Dan Gohman | 57c732b | 2010-04-21 01:34:56 +0000 | [diff] [blame] | 7911 | const TargetMachine &TM = getTargetMachine(); |
Chris Lattner | f418435 | 2006-03-01 04:57:39 +0000 | [diff] [blame] | 7912 | SelectionDAG &DAG = DCI.DAG; |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 7913 | SDLoc dl(N); |
Chris Lattner | f418435 | 2006-03-01 04:57:39 +0000 | [diff] [blame] | 7914 | switch (N->getOpcode()) { |
| 7915 | default: break; |
Chris Lattner | 3c48ea5 | 2006-09-19 05:22:59 +0000 | [diff] [blame] | 7916 | case PPCISD::SHL: |
| 7917 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(0))) { |
Dan Gohman | f1d8304 | 2010-06-18 14:22:04 +0000 | [diff] [blame] | 7918 | if (C->isNullValue()) // 0 << V -> 0. |
Chris Lattner | 3c48ea5 | 2006-09-19 05:22:59 +0000 | [diff] [blame] | 7919 | return N->getOperand(0); |
| 7920 | } |
| 7921 | break; |
| 7922 | case PPCISD::SRL: |
| 7923 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(0))) { |
Dan Gohman | f1d8304 | 2010-06-18 14:22:04 +0000 | [diff] [blame] | 7924 | if (C->isNullValue()) // 0 >>u V -> 0. |
Chris Lattner | 3c48ea5 | 2006-09-19 05:22:59 +0000 | [diff] [blame] | 7925 | return N->getOperand(0); |
| 7926 | } |
| 7927 | break; |
| 7928 | case PPCISD::SRA: |
| 7929 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(0))) { |
Dan Gohman | f1d8304 | 2010-06-18 14:22:04 +0000 | [diff] [blame] | 7930 | if (C->isNullValue() || // 0 >>s V -> 0. |
Chris Lattner | 3c48ea5 | 2006-09-19 05:22:59 +0000 | [diff] [blame] | 7931 | C->isAllOnesValue()) // -1 >>s V -> -1. |
| 7932 | return N->getOperand(0); |
| 7933 | } |
| 7934 | break; |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 7935 | case ISD::SIGN_EXTEND: |
| 7936 | case ISD::ZERO_EXTEND: |
| 7937 | case ISD::ANY_EXTEND: |
| 7938 | return DAGCombineExtBoolTrunc(N, DCI); |
| 7939 | case ISD::TRUNCATE: |
| 7940 | case ISD::SETCC: |
| 7941 | case ISD::SELECT_CC: |
| 7942 | return DAGCombineTruncBoolExt(N, DCI); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7943 | case ISD::FDIV: { |
| 7944 | assert(TM.Options.UnsafeFPMath && |
| 7945 | "Reciprocal estimates require UnsafeFPMath"); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 7946 | |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7947 | if (N->getOperand(1).getOpcode() == ISD::FSQRT) { |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7948 | SDValue RV = |
| 7949 | DAGCombineFastRecipFSQRT(N->getOperand(1).getOperand(0), DCI); |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 7950 | if (RV.getNode()) { |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7951 | DCI.AddToWorklist(RV.getNode()); |
| 7952 | return DAG.getNode(ISD::FMUL, dl, N->getValueType(0), |
| 7953 | N->getOperand(0), RV); |
| 7954 | } |
Hal Finkel | f96c18e | 2013-04-04 22:44:12 +0000 | [diff] [blame] | 7955 | } else if (N->getOperand(1).getOpcode() == ISD::FP_EXTEND && |
| 7956 | N->getOperand(1).getOperand(0).getOpcode() == ISD::FSQRT) { |
| 7957 | SDValue RV = |
| 7958 | DAGCombineFastRecipFSQRT(N->getOperand(1).getOperand(0).getOperand(0), |
| 7959 | DCI); |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 7960 | if (RV.getNode()) { |
Hal Finkel | f96c18e | 2013-04-04 22:44:12 +0000 | [diff] [blame] | 7961 | DCI.AddToWorklist(RV.getNode()); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 7962 | RV = DAG.getNode(ISD::FP_EXTEND, SDLoc(N->getOperand(1)), |
Hal Finkel | f96c18e | 2013-04-04 22:44:12 +0000 | [diff] [blame] | 7963 | N->getValueType(0), RV); |
| 7964 | DCI.AddToWorklist(RV.getNode()); |
| 7965 | return DAG.getNode(ISD::FMUL, dl, N->getValueType(0), |
| 7966 | N->getOperand(0), RV); |
| 7967 | } |
| 7968 | } else if (N->getOperand(1).getOpcode() == ISD::FP_ROUND && |
| 7969 | N->getOperand(1).getOperand(0).getOpcode() == ISD::FSQRT) { |
| 7970 | SDValue RV = |
| 7971 | DAGCombineFastRecipFSQRT(N->getOperand(1).getOperand(0).getOperand(0), |
| 7972 | DCI); |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 7973 | if (RV.getNode()) { |
Hal Finkel | f96c18e | 2013-04-04 22:44:12 +0000 | [diff] [blame] | 7974 | DCI.AddToWorklist(RV.getNode()); |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 7975 | RV = DAG.getNode(ISD::FP_ROUND, SDLoc(N->getOperand(1)), |
Hal Finkel | f96c18e | 2013-04-04 22:44:12 +0000 | [diff] [blame] | 7976 | N->getValueType(0), RV, |
| 7977 | N->getOperand(1).getOperand(1)); |
| 7978 | DCI.AddToWorklist(RV.getNode()); |
| 7979 | return DAG.getNode(ISD::FMUL, dl, N->getValueType(0), |
| 7980 | N->getOperand(0), RV); |
| 7981 | } |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7982 | } |
| 7983 | |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7984 | SDValue RV = DAGCombineFastRecip(N->getOperand(1), DCI); |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 7985 | if (RV.getNode()) { |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 7986 | DCI.AddToWorklist(RV.getNode()); |
| 7987 | return DAG.getNode(ISD::FMUL, dl, N->getValueType(0), |
| 7988 | N->getOperand(0), RV); |
| 7989 | } |
| 7990 | |
| 7991 | } |
| 7992 | break; |
| 7993 | case ISD::FSQRT: { |
| 7994 | assert(TM.Options.UnsafeFPMath && |
| 7995 | "Reciprocal estimates require UnsafeFPMath"); |
| 7996 | |
| 7997 | // Compute this as 1/(1/sqrt(X)), which is the reciprocal of the |
| 7998 | // reciprocal sqrt. |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 7999 | SDValue RV = DAGCombineFastRecipFSQRT(N->getOperand(0), DCI); |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 8000 | if (RV.getNode()) { |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 8001 | DCI.AddToWorklist(RV.getNode()); |
Hal Finkel | b0c810f | 2013-04-03 17:44:56 +0000 | [diff] [blame] | 8002 | RV = DAGCombineFastRecip(RV, DCI); |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 8003 | if (RV.getNode()) { |
Eric Christopher | 174c662 | 2014-05-30 22:47:48 +0000 | [diff] [blame] | 8004 | // Unfortunately, RV is now NaN if the input was exactly 0. Select out |
| 8005 | // this case and force the answer to 0. |
Hal Finkel | 1e2e3ea | 2013-09-12 19:04:12 +0000 | [diff] [blame] | 8006 | |
| 8007 | EVT VT = RV.getValueType(); |
| 8008 | |
| 8009 | SDValue Zero = DAG.getConstantFP(0.0, VT.getScalarType()); |
| 8010 | if (VT.isVector()) { |
| 8011 | assert(VT.getVectorNumElements() == 4 && "Unknown vector type"); |
| 8012 | Zero = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Zero, Zero, Zero, Zero); |
| 8013 | } |
| 8014 | |
| 8015 | SDValue ZeroCmp = |
| 8016 | DAG.getSetCC(dl, getSetCCResultType(*DAG.getContext(), VT), |
| 8017 | N->getOperand(0), Zero, ISD::SETEQ); |
| 8018 | DCI.AddToWorklist(ZeroCmp.getNode()); |
| 8019 | DCI.AddToWorklist(RV.getNode()); |
| 8020 | |
| 8021 | RV = DAG.getNode(VT.isVector() ? ISD::VSELECT : ISD::SELECT, dl, VT, |
| 8022 | ZeroCmp, Zero, RV); |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 8023 | return RV; |
Hal Finkel | 1e2e3ea | 2013-09-12 19:04:12 +0000 | [diff] [blame] | 8024 | } |
Hal Finkel | 2e10331 | 2013-04-03 04:01:11 +0000 | [diff] [blame] | 8025 | } |
| 8026 | |
| 8027 | } |
| 8028 | break; |
Chris Lattner | f418435 | 2006-03-01 04:57:39 +0000 | [diff] [blame] | 8029 | case ISD::SINT_TO_FP: |
Chris Lattner | a35f306 | 2006-06-16 17:34:12 +0000 | [diff] [blame] | 8030 | if (TM.getSubtarget<PPCSubtarget>().has64BitSupport()) { |
Chris Lattner | 4a66d69 | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 8031 | if (N->getOperand(0).getOpcode() == ISD::FP_TO_SINT) { |
| 8032 | // Turn (sint_to_fp (fp_to_sint X)) -> fctidz/fcfid without load/stores. |
| 8033 | // We allow the src/dst to be either f32/f64, but the intermediate |
| 8034 | // type must be i64. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8035 | if (N->getOperand(0).getValueType() == MVT::i64 && |
| 8036 | N->getOperand(0).getOperand(0).getValueType() != MVT::ppcf128) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8037 | SDValue Val = N->getOperand(0).getOperand(0); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8038 | if (Val.getValueType() == MVT::f32) { |
| 8039 | Val = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Val); |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8040 | DCI.AddToWorklist(Val.getNode()); |
Chris Lattner | 4a66d69 | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 8041 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8042 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8043 | Val = DAG.getNode(PPCISD::FCTIDZ, dl, MVT::f64, Val); |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8044 | DCI.AddToWorklist(Val.getNode()); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8045 | Val = DAG.getNode(PPCISD::FCFID, dl, MVT::f64, Val); |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8046 | DCI.AddToWorklist(Val.getNode()); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8047 | if (N->getValueType(0) == MVT::f32) { |
| 8048 | Val = DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, Val, |
Chris Lattner | 72733e5 | 2008-01-17 07:00:52 +0000 | [diff] [blame] | 8049 | DAG.getIntPtrConstant(0)); |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8050 | DCI.AddToWorklist(Val.getNode()); |
Chris Lattner | 4a66d69 | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 8051 | } |
| 8052 | return Val; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8053 | } else if (N->getOperand(0).getValueType() == MVT::i32) { |
Chris Lattner | 4a66d69 | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 8054 | // If the intermediate type is i32, we can avoid the load/store here |
| 8055 | // too. |
Chris Lattner | f418435 | 2006-03-01 04:57:39 +0000 | [diff] [blame] | 8056 | } |
Chris Lattner | f418435 | 2006-03-01 04:57:39 +0000 | [diff] [blame] | 8057 | } |
| 8058 | } |
| 8059 | break; |
Chris Lattner | 27f5345 | 2006-03-01 05:50:56 +0000 | [diff] [blame] | 8060 | case ISD::STORE: |
| 8061 | // Turn STORE (FP_TO_SINT F) -> STFIWX(FCTIWZ(F)). |
| 8062 | if (TM.getSubtarget<PPCSubtarget>().hasSTFIWX() && |
Chris Lattner | f5b46f7 | 2008-01-18 16:54:56 +0000 | [diff] [blame] | 8063 | !cast<StoreSDNode>(N)->isTruncatingStore() && |
Chris Lattner | 27f5345 | 2006-03-01 05:50:56 +0000 | [diff] [blame] | 8064 | N->getOperand(1).getOpcode() == ISD::FP_TO_SINT && |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8065 | N->getOperand(1).getValueType() == MVT::i32 && |
| 8066 | N->getOperand(1).getOperand(0).getValueType() != MVT::ppcf128) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8067 | SDValue Val = N->getOperand(1).getOperand(0); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8068 | if (Val.getValueType() == MVT::f32) { |
| 8069 | Val = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Val); |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8070 | DCI.AddToWorklist(Val.getNode()); |
Chris Lattner | 27f5345 | 2006-03-01 05:50:56 +0000 | [diff] [blame] | 8071 | } |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8072 | Val = DAG.getNode(PPCISD::FCTIWZ, dl, MVT::f64, Val); |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8073 | DCI.AddToWorklist(Val.getNode()); |
Chris Lattner | 27f5345 | 2006-03-01 05:50:56 +0000 | [diff] [blame] | 8074 | |
Hal Finkel | 60c7510 | 2013-04-01 15:37:53 +0000 | [diff] [blame] | 8075 | SDValue Ops[] = { |
| 8076 | N->getOperand(0), Val, N->getOperand(2), |
| 8077 | DAG.getValueType(N->getOperand(1).getValueType()) |
| 8078 | }; |
| 8079 | |
| 8080 | Val = DAG.getMemIntrinsicNode(PPCISD::STFIWX, dl, |
Craig Topper | 206fcd4 | 2014-04-26 19:29:41 +0000 | [diff] [blame] | 8081 | DAG.getVTList(MVT::Other), Ops, |
Hal Finkel | 60c7510 | 2013-04-01 15:37:53 +0000 | [diff] [blame] | 8082 | cast<StoreSDNode>(N)->getMemoryVT(), |
| 8083 | cast<StoreSDNode>(N)->getMemOperand()); |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8084 | DCI.AddToWorklist(Val.getNode()); |
Chris Lattner | 27f5345 | 2006-03-01 05:50:56 +0000 | [diff] [blame] | 8085 | return Val; |
| 8086 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8087 | |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8088 | // Turn STORE (BSWAP) -> sthbrx/stwbrx. |
Dan Gohman | 28328db | 2009-09-25 00:57:30 +0000 | [diff] [blame] | 8089 | if (cast<StoreSDNode>(N)->isUnindexed() && |
| 8090 | N->getOperand(1).getOpcode() == ISD::BSWAP && |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8091 | N->getOperand(1).getNode()->hasOneUse() && |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8092 | (N->getOperand(1).getValueType() == MVT::i32 || |
Hal Finkel | 31d2956 | 2013-03-28 19:25:55 +0000 | [diff] [blame] | 8093 | N->getOperand(1).getValueType() == MVT::i16 || |
| 8094 | (TM.getSubtarget<PPCSubtarget>().hasLDBRX() && |
Hal Finkel | 22e41c4 | 2013-03-28 20:23:46 +0000 | [diff] [blame] | 8095 | TM.getSubtarget<PPCSubtarget>().isPPC64() && |
Hal Finkel | 31d2956 | 2013-03-28 19:25:55 +0000 | [diff] [blame] | 8096 | N->getOperand(1).getValueType() == MVT::i64))) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8097 | SDValue BSwapOp = N->getOperand(1).getOperand(0); |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8098 | // Do an any-extend to 32-bits if this is a half-word input. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8099 | if (BSwapOp.getValueType() == MVT::i16) |
| 8100 | BSwapOp = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, BSwapOp); |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8101 | |
Dan Gohman | 48b185d | 2009-09-25 20:36:54 +0000 | [diff] [blame] | 8102 | SDValue Ops[] = { |
| 8103 | N->getOperand(0), BSwapOp, N->getOperand(2), |
| 8104 | DAG.getValueType(N->getOperand(1).getValueType()) |
| 8105 | }; |
| 8106 | return |
| 8107 | DAG.getMemIntrinsicNode(PPCISD::STBRX, dl, DAG.getVTList(MVT::Other), |
Craig Topper | 206fcd4 | 2014-04-26 19:29:41 +0000 | [diff] [blame] | 8108 | Ops, cast<StoreSDNode>(N)->getMemoryVT(), |
Dan Gohman | 48b185d | 2009-09-25 20:36:54 +0000 | [diff] [blame] | 8109 | cast<StoreSDNode>(N)->getMemOperand()); |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8110 | } |
| 8111 | break; |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8112 | case ISD::LOAD: { |
| 8113 | LoadSDNode *LD = cast<LoadSDNode>(N); |
| 8114 | EVT VT = LD->getValueType(0); |
| 8115 | Type *Ty = LD->getMemoryVT().getTypeForEVT(*DAG.getContext()); |
| 8116 | unsigned ABIAlignment = getDataLayout()->getABITypeAlignment(Ty); |
| 8117 | if (ISD::isNON_EXTLoad(N) && VT.isVector() && |
| 8118 | TM.getSubtarget<PPCSubtarget>().hasAltivec() && |
Hal Finkel | 40c3478 | 2013-09-15 22:09:58 +0000 | [diff] [blame] | 8119 | (VT == MVT::v16i8 || VT == MVT::v8i16 || |
| 8120 | VT == MVT::v4i32 || VT == MVT::v4f32) && |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8121 | LD->getAlignment() < ABIAlignment) { |
| 8122 | // This is a type-legal unaligned Altivec load. |
| 8123 | SDValue Chain = LD->getChain(); |
| 8124 | SDValue Ptr = LD->getBasePtr(); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 8125 | bool isLittleEndian = Subtarget.isLittleEndian(); |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8126 | |
| 8127 | // This implements the loading of unaligned vectors as described in |
| 8128 | // the venerable Apple Velocity Engine overview. Specifically: |
| 8129 | // https://developer.apple.com/hardwaredrivers/ve/alignment.html |
| 8130 | // https://developer.apple.com/hardwaredrivers/ve/code_optimization.html |
| 8131 | // |
| 8132 | // The general idea is to expand a sequence of one or more unaligned |
Bill Schmidt | 6b5a7df | 2014-06-09 22:00:52 +0000 | [diff] [blame] | 8133 | // loads into an alignment-based permutation-control instruction (lvsl |
| 8134 | // or lvsr), a series of regular vector loads (which always truncate |
| 8135 | // their input address to an aligned address), and a series of |
| 8136 | // permutations. The results of these permutations are the requested |
| 8137 | // loaded values. The trick is that the last "extra" load is not taken |
| 8138 | // from the address you might suspect (sizeof(vector) bytes after the |
| 8139 | // last requested load), but rather sizeof(vector) - 1 bytes after the |
| 8140 | // last requested vector. The point of this is to avoid a page fault if |
| 8141 | // the base address happened to be aligned. This works because if the |
| 8142 | // base address is aligned, then adding less than a full vector length |
| 8143 | // will cause the last vector in the sequence to be (re)loaded. |
| 8144 | // Otherwise, the next vector will be fetched as you might suspect was |
| 8145 | // necessary. |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8146 | |
Hal Finkel | bc2ee4c | 2013-05-25 04:05:05 +0000 | [diff] [blame] | 8147 | // We might be able to reuse the permutation generation from |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8148 | // a different base address offset from this one by an aligned amount. |
Hal Finkel | bc2ee4c | 2013-05-25 04:05:05 +0000 | [diff] [blame] | 8149 | // The INTRINSIC_WO_CHAIN DAG combine will attempt to perform this |
| 8150 | // optimization later. |
Bill Schmidt | 6b5a7df | 2014-06-09 22:00:52 +0000 | [diff] [blame] | 8151 | Intrinsic::ID Intr = (isLittleEndian ? |
| 8152 | Intrinsic::ppc_altivec_lvsr : |
| 8153 | Intrinsic::ppc_altivec_lvsl); |
| 8154 | SDValue PermCntl = BuildIntrinsicOp(Intr, Ptr, DAG, dl, MVT::v16i8); |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8155 | |
| 8156 | // Refine the alignment of the original load (a "new" load created here |
| 8157 | // which was identical to the first except for the alignment would be |
| 8158 | // merged with the existing node regardless). |
| 8159 | MachineFunction &MF = DAG.getMachineFunction(); |
| 8160 | MachineMemOperand *MMO = |
| 8161 | MF.getMachineMemOperand(LD->getPointerInfo(), |
| 8162 | LD->getMemOperand()->getFlags(), |
| 8163 | LD->getMemoryVT().getStoreSize(), |
| 8164 | ABIAlignment); |
| 8165 | LD->refineAlignment(MMO); |
| 8166 | SDValue BaseLoad = SDValue(LD, 0); |
| 8167 | |
| 8168 | // Note that the value of IncOffset (which is provided to the next |
| 8169 | // load's pointer info offset value, and thus used to calculate the |
| 8170 | // alignment), and the value of IncValue (which is actually used to |
| 8171 | // increment the pointer value) are different! This is because we |
| 8172 | // require the next load to appear to be aligned, even though it |
| 8173 | // is actually offset from the base pointer by a lesser amount. |
| 8174 | int IncOffset = VT.getSizeInBits() / 8; |
Hal Finkel | 7d8a691 | 2013-05-26 18:08:30 +0000 | [diff] [blame] | 8175 | int IncValue = IncOffset; |
| 8176 | |
| 8177 | // Walk (both up and down) the chain looking for another load at the real |
| 8178 | // (aligned) offset (the alignment of the other load does not matter in |
| 8179 | // this case). If found, then do not use the offset reduction trick, as |
| 8180 | // that will prevent the loads from being later combined (as they would |
| 8181 | // otherwise be duplicates). |
| 8182 | if (!findConsecutiveLoad(LD, DAG)) |
| 8183 | --IncValue; |
| 8184 | |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8185 | SDValue Increment = DAG.getConstant(IncValue, getPointerTy()); |
| 8186 | Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment); |
| 8187 | |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8188 | SDValue ExtraLoad = |
| 8189 | DAG.getLoad(VT, dl, Chain, Ptr, |
| 8190 | LD->getPointerInfo().getWithOffset(IncOffset), |
| 8191 | LD->isVolatile(), LD->isNonTemporal(), |
| 8192 | LD->isInvariant(), ABIAlignment); |
| 8193 | |
| 8194 | SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, |
| 8195 | BaseLoad.getValue(1), ExtraLoad.getValue(1)); |
| 8196 | |
| 8197 | if (BaseLoad.getValueType() != MVT::v4i32) |
| 8198 | BaseLoad = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, BaseLoad); |
| 8199 | |
| 8200 | if (ExtraLoad.getValueType() != MVT::v4i32) |
| 8201 | ExtraLoad = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, ExtraLoad); |
| 8202 | |
Bill Schmidt | 6b5a7df | 2014-06-09 22:00:52 +0000 | [diff] [blame] | 8203 | // Because vperm has a big-endian bias, we must reverse the order |
| 8204 | // of the input vectors and complement the permute control vector |
| 8205 | // when generating little endian code. We have already handled the |
| 8206 | // latter by using lvsr instead of lvsl, so just reverse BaseLoad |
| 8207 | // and ExtraLoad here. |
| 8208 | SDValue Perm; |
| 8209 | if (isLittleEndian) |
| 8210 | Perm = BuildIntrinsicOp(Intrinsic::ppc_altivec_vperm, |
| 8211 | ExtraLoad, BaseLoad, PermCntl, DAG, dl); |
| 8212 | else |
| 8213 | Perm = BuildIntrinsicOp(Intrinsic::ppc_altivec_vperm, |
| 8214 | BaseLoad, ExtraLoad, PermCntl, DAG, dl); |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8215 | |
| 8216 | if (VT != MVT::v4i32) |
| 8217 | Perm = DAG.getNode(ISD::BITCAST, dl, VT, Perm); |
| 8218 | |
| 8219 | // Now we need to be really careful about how we update the users of the |
| 8220 | // original load. We cannot just call DCI.CombineTo (or |
| 8221 | // DAG.ReplaceAllUsesWith for that matter), because the load still has |
| 8222 | // uses created here (the permutation for example) that need to stay. |
| 8223 | SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); |
| 8224 | while (UI != UE) { |
| 8225 | SDUse &Use = UI.getUse(); |
| 8226 | SDNode *User = *UI; |
| 8227 | // Note: BaseLoad is checked here because it might not be N, but a |
| 8228 | // bitcast of N. |
| 8229 | if (User == Perm.getNode() || User == BaseLoad.getNode() || |
| 8230 | User == TF.getNode() || Use.getResNo() > 1) { |
| 8231 | ++UI; |
| 8232 | continue; |
| 8233 | } |
| 8234 | |
| 8235 | SDValue To = Use.getResNo() ? TF : Perm; |
| 8236 | ++UI; |
| 8237 | |
| 8238 | SmallVector<SDValue, 8> Ops; |
Craig Topper | 66e588b | 2014-06-29 00:40:57 +0000 | [diff] [blame] | 8239 | for (const SDUse &O : User->ops()) { |
| 8240 | if (O == Use) |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8241 | Ops.push_back(To); |
| 8242 | else |
Craig Topper | 66e588b | 2014-06-29 00:40:57 +0000 | [diff] [blame] | 8243 | Ops.push_back(O); |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8244 | } |
| 8245 | |
Craig Topper | 8c0b4d0 | 2014-04-28 05:57:50 +0000 | [diff] [blame] | 8246 | DAG.UpdateNodeOperands(User, Ops); |
Hal Finkel | cf2e908 | 2013-05-24 23:00:14 +0000 | [diff] [blame] | 8247 | } |
| 8248 | |
| 8249 | return SDValue(N, 0); |
| 8250 | } |
| 8251 | } |
| 8252 | break; |
Bill Schmidt | 6b5a7df | 2014-06-09 22:00:52 +0000 | [diff] [blame] | 8253 | case ISD::INTRINSIC_WO_CHAIN: { |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 8254 | bool isLittleEndian = Subtarget.isLittleEndian(); |
Bill Schmidt | 6b5a7df | 2014-06-09 22:00:52 +0000 | [diff] [blame] | 8255 | Intrinsic::ID Intr = (isLittleEndian ? |
| 8256 | Intrinsic::ppc_altivec_lvsr : |
| 8257 | Intrinsic::ppc_altivec_lvsl); |
| 8258 | if (cast<ConstantSDNode>(N->getOperand(0))->getZExtValue() == Intr && |
Hal Finkel | bc2ee4c | 2013-05-25 04:05:05 +0000 | [diff] [blame] | 8259 | N->getOperand(1)->getOpcode() == ISD::ADD) { |
| 8260 | SDValue Add = N->getOperand(1); |
| 8261 | |
| 8262 | if (DAG.MaskedValueIsZero(Add->getOperand(1), |
| 8263 | APInt::getAllOnesValue(4 /* 16 byte alignment */).zext( |
| 8264 | Add.getValueType().getScalarType().getSizeInBits()))) { |
| 8265 | SDNode *BasePtr = Add->getOperand(0).getNode(); |
| 8266 | for (SDNode::use_iterator UI = BasePtr->use_begin(), |
| 8267 | UE = BasePtr->use_end(); UI != UE; ++UI) { |
| 8268 | if (UI->getOpcode() == ISD::INTRINSIC_WO_CHAIN && |
| 8269 | cast<ConstantSDNode>(UI->getOperand(0))->getZExtValue() == |
Bill Schmidt | 6b5a7df | 2014-06-09 22:00:52 +0000 | [diff] [blame] | 8270 | Intr) { |
| 8271 | // We've found another LVSL/LVSR, and this address is an aligned |
Hal Finkel | bc2ee4c | 2013-05-25 04:05:05 +0000 | [diff] [blame] | 8272 | // multiple of that one. The results will be the same, so use the |
| 8273 | // one we've just found instead. |
| 8274 | |
| 8275 | return SDValue(*UI, 0); |
| 8276 | } |
| 8277 | } |
| 8278 | } |
| 8279 | } |
Bill Schmidt | 6b5a7df | 2014-06-09 22:00:52 +0000 | [diff] [blame] | 8280 | } |
Hal Finkel | c3cfbf8 | 2013-09-13 20:09:02 +0000 | [diff] [blame] | 8281 | |
| 8282 | break; |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8283 | case ISD::BSWAP: |
| 8284 | // Turn BSWAP (LOAD) -> lhbrx/lwbrx. |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8285 | if (ISD::isNON_EXTLoad(N->getOperand(0).getNode()) && |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8286 | N->getOperand(0).hasOneUse() && |
Hal Finkel | 31d2956 | 2013-03-28 19:25:55 +0000 | [diff] [blame] | 8287 | (N->getValueType(0) == MVT::i32 || N->getValueType(0) == MVT::i16 || |
| 8288 | (TM.getSubtarget<PPCSubtarget>().hasLDBRX() && |
Hal Finkel | 22e41c4 | 2013-03-28 20:23:46 +0000 | [diff] [blame] | 8289 | TM.getSubtarget<PPCSubtarget>().isPPC64() && |
Hal Finkel | 31d2956 | 2013-03-28 19:25:55 +0000 | [diff] [blame] | 8290 | N->getValueType(0) == MVT::i64))) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8291 | SDValue Load = N->getOperand(0); |
Evan Cheng | e71fe34d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 8292 | LoadSDNode *LD = cast<LoadSDNode>(Load); |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8293 | // Create the byte-swapping load. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8294 | SDValue Ops[] = { |
Evan Cheng | e71fe34d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 8295 | LD->getChain(), // Chain |
| 8296 | LD->getBasePtr(), // Ptr |
Chris Lattner | d66f14e | 2006-08-11 17:18:05 +0000 | [diff] [blame] | 8297 | DAG.getValueType(N->getValueType(0)) // VT |
| 8298 | }; |
Dan Gohman | 48b185d | 2009-09-25 20:36:54 +0000 | [diff] [blame] | 8299 | SDValue BSLoad = |
| 8300 | DAG.getMemIntrinsicNode(PPCISD::LBRX, dl, |
Hal Finkel | 31d2956 | 2013-03-28 19:25:55 +0000 | [diff] [blame] | 8301 | DAG.getVTList(N->getValueType(0) == MVT::i64 ? |
| 8302 | MVT::i64 : MVT::i32, MVT::Other), |
Craig Topper | 206fcd4 | 2014-04-26 19:29:41 +0000 | [diff] [blame] | 8303 | Ops, LD->getMemoryVT(), LD->getMemOperand()); |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8304 | |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8305 | // If this is an i16 load, insert the truncate. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8306 | SDValue ResVal = BSLoad; |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8307 | if (N->getValueType(0) == MVT::i16) |
| 8308 | ResVal = DAG.getNode(ISD::TRUNCATE, dl, MVT::i16, BSLoad); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8309 | |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8310 | // First, combine the bswap away. This makes the value produced by the |
| 8311 | // load dead. |
| 8312 | DCI.CombineTo(N, ResVal); |
| 8313 | |
| 8314 | // Next, combine the load away, we give it a bogus result value but a real |
| 8315 | // chain result. The result value is dead because the bswap is dead. |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8316 | DCI.CombineTo(Load.getNode(), ResVal, BSLoad.getValue(1)); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8317 | |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8318 | // Return N so it doesn't get rechecked! |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8319 | return SDValue(N, 0); |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8320 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8321 | |
Chris Lattner | 27f5345 | 2006-03-01 05:50:56 +0000 | [diff] [blame] | 8322 | break; |
Chris Lattner | d4058a5 | 2006-03-31 06:02:07 +0000 | [diff] [blame] | 8323 | case PPCISD::VCMP: { |
| 8324 | // If a VCMPo node already exists with exactly the same operands as this |
| 8325 | // node, use its result instead of this node (VCMPo computes both a CR6 and |
| 8326 | // a normal output). |
| 8327 | // |
| 8328 | if (!N->getOperand(0).hasOneUse() && |
| 8329 | !N->getOperand(1).hasOneUse() && |
| 8330 | !N->getOperand(2).hasOneUse()) { |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8331 | |
Chris Lattner | d4058a5 | 2006-03-31 06:02:07 +0000 | [diff] [blame] | 8332 | // Scan all of the users of the LHS, looking for VCMPo's that match. |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 8333 | SDNode *VCMPoNode = nullptr; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8334 | |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8335 | SDNode *LHSN = N->getOperand(0).getNode(); |
Chris Lattner | d4058a5 | 2006-03-31 06:02:07 +0000 | [diff] [blame] | 8336 | for (SDNode::use_iterator UI = LHSN->use_begin(), E = LHSN->use_end(); |
| 8337 | UI != E; ++UI) |
Dan Gohman | 91e5dcb | 2008-07-27 20:43:25 +0000 | [diff] [blame] | 8338 | if (UI->getOpcode() == PPCISD::VCMPo && |
| 8339 | UI->getOperand(1) == N->getOperand(1) && |
| 8340 | UI->getOperand(2) == N->getOperand(2) && |
| 8341 | UI->getOperand(0) == N->getOperand(0)) { |
| 8342 | VCMPoNode = *UI; |
Chris Lattner | d4058a5 | 2006-03-31 06:02:07 +0000 | [diff] [blame] | 8343 | break; |
| 8344 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8345 | |
Chris Lattner | 518834c | 2006-04-18 18:28:22 +0000 | [diff] [blame] | 8346 | // If there is no VCMPo node, or if the flag value has a single use, don't |
| 8347 | // transform this. |
| 8348 | if (!VCMPoNode || VCMPoNode->hasNUsesOfValue(0, 1)) |
| 8349 | break; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8350 | |
| 8351 | // Look at the (necessarily single) use of the flag value. If it has a |
Chris Lattner | 518834c | 2006-04-18 18:28:22 +0000 | [diff] [blame] | 8352 | // chain, this transformation is more complex. Note that multiple things |
| 8353 | // could use the value result, which we should ignore. |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 8354 | SDNode *FlagUser = nullptr; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8355 | for (SDNode::use_iterator UI = VCMPoNode->use_begin(); |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 8356 | FlagUser == nullptr; ++UI) { |
Chris Lattner | 518834c | 2006-04-18 18:28:22 +0000 | [diff] [blame] | 8357 | assert(UI != VCMPoNode->use_end() && "Didn't find user!"); |
Dan Gohman | 91e5dcb | 2008-07-27 20:43:25 +0000 | [diff] [blame] | 8358 | SDNode *User = *UI; |
Chris Lattner | 518834c | 2006-04-18 18:28:22 +0000 | [diff] [blame] | 8359 | for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) { |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8360 | if (User->getOperand(i) == SDValue(VCMPoNode, 1)) { |
Chris Lattner | 518834c | 2006-04-18 18:28:22 +0000 | [diff] [blame] | 8361 | FlagUser = User; |
| 8362 | break; |
| 8363 | } |
| 8364 | } |
| 8365 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8366 | |
Ulrich Weigand | d5ebc62 | 2013-07-03 17:05:42 +0000 | [diff] [blame] | 8367 | // If the user is a MFOCRF instruction, we know this is safe. |
| 8368 | // Otherwise we give up for right now. |
| 8369 | if (FlagUser->getOpcode() == PPCISD::MFOCRF) |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8370 | return SDValue(VCMPoNode, 0); |
Chris Lattner | d4058a5 | 2006-03-31 06:02:07 +0000 | [diff] [blame] | 8371 | } |
| 8372 | break; |
| 8373 | } |
Hal Finkel | 940ab93 | 2014-02-28 00:27:01 +0000 | [diff] [blame] | 8374 | case ISD::BRCOND: { |
| 8375 | SDValue Cond = N->getOperand(1); |
| 8376 | SDValue Target = N->getOperand(2); |
| 8377 | |
| 8378 | if (Cond.getOpcode() == ISD::INTRINSIC_W_CHAIN && |
| 8379 | cast<ConstantSDNode>(Cond.getOperand(1))->getZExtValue() == |
| 8380 | Intrinsic::ppc_is_decremented_ctr_nonzero) { |
| 8381 | |
| 8382 | // We now need to make the intrinsic dead (it cannot be instruction |
| 8383 | // selected). |
| 8384 | DAG.ReplaceAllUsesOfValueWith(Cond.getValue(1), Cond.getOperand(0)); |
| 8385 | assert(Cond.getNode()->hasOneUse() && |
| 8386 | "Counter decrement has more than one use"); |
| 8387 | |
| 8388 | return DAG.getNode(PPCISD::BDNZ, dl, MVT::Other, |
| 8389 | N->getOperand(0), Target); |
| 8390 | } |
| 8391 | } |
| 8392 | break; |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8393 | case ISD::BR_CC: { |
| 8394 | // If this is a branch on an altivec predicate comparison, lower this so |
Ulrich Weigand | d5ebc62 | 2013-07-03 17:05:42 +0000 | [diff] [blame] | 8395 | // that we don't have to do a MFOCRF: instead, branch directly on CR6. This |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8396 | // lowering is done pre-legalize, because the legalizer lowers the predicate |
| 8397 | // compare down to code that is difficult to reassemble. |
| 8398 | ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get(); |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8399 | SDValue LHS = N->getOperand(2), RHS = N->getOperand(3); |
Hal Finkel | 25c1992 | 2013-05-15 21:37:41 +0000 | [diff] [blame] | 8400 | |
| 8401 | // Sometimes the promoted value of the intrinsic is ANDed by some non-zero |
| 8402 | // value. If so, pass-through the AND to get to the intrinsic. |
| 8403 | if (LHS.getOpcode() == ISD::AND && |
| 8404 | LHS.getOperand(0).getOpcode() == ISD::INTRINSIC_W_CHAIN && |
| 8405 | cast<ConstantSDNode>(LHS.getOperand(0).getOperand(1))->getZExtValue() == |
| 8406 | Intrinsic::ppc_is_decremented_ctr_nonzero && |
| 8407 | isa<ConstantSDNode>(LHS.getOperand(1)) && |
| 8408 | !cast<ConstantSDNode>(LHS.getOperand(1))->getConstantIntValue()-> |
| 8409 | isZero()) |
| 8410 | LHS = LHS.getOperand(0); |
| 8411 | |
| 8412 | if (LHS.getOpcode() == ISD::INTRINSIC_W_CHAIN && |
| 8413 | cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue() == |
| 8414 | Intrinsic::ppc_is_decremented_ctr_nonzero && |
| 8415 | isa<ConstantSDNode>(RHS)) { |
| 8416 | assert((CC == ISD::SETEQ || CC == ISD::SETNE) && |
| 8417 | "Counter decrement comparison is not EQ or NE"); |
| 8418 | |
| 8419 | unsigned Val = cast<ConstantSDNode>(RHS)->getZExtValue(); |
| 8420 | bool isBDNZ = (CC == ISD::SETEQ && Val) || |
| 8421 | (CC == ISD::SETNE && !Val); |
| 8422 | |
| 8423 | // We now need to make the intrinsic dead (it cannot be instruction |
| 8424 | // selected). |
| 8425 | DAG.ReplaceAllUsesOfValueWith(LHS.getValue(1), LHS.getOperand(0)); |
| 8426 | assert(LHS.getNode()->hasOneUse() && |
| 8427 | "Counter decrement has more than one use"); |
| 8428 | |
| 8429 | return DAG.getNode(isBDNZ ? PPCISD::BDNZ : PPCISD::BDZ, dl, MVT::Other, |
| 8430 | N->getOperand(0), N->getOperand(4)); |
| 8431 | } |
| 8432 | |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8433 | int CompareOpc; |
| 8434 | bool isDot; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8435 | |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8436 | if (LHS.getOpcode() == ISD::INTRINSIC_WO_CHAIN && |
| 8437 | isa<ConstantSDNode>(RHS) && (CC == ISD::SETEQ || CC == ISD::SETNE) && |
| 8438 | getAltivecCompareInfo(LHS, CompareOpc, isDot)) { |
| 8439 | assert(isDot && "Can't compare against a vector result!"); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8440 | |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8441 | // If this is a comparison against something other than 0/1, then we know |
| 8442 | // that the condition is never/always true. |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 8443 | unsigned Val = cast<ConstantSDNode>(RHS)->getZExtValue(); |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8444 | if (Val != 0 && Val != 1) { |
| 8445 | if (CC == ISD::SETEQ) // Cond never true, remove branch. |
| 8446 | return N->getOperand(0); |
| 8447 | // Always !=, turn it into an unconditional branch. |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8448 | return DAG.getNode(ISD::BR, dl, MVT::Other, |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8449 | N->getOperand(0), N->getOperand(4)); |
| 8450 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8451 | |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8452 | bool BranchOnWhenPredTrue = (CC == ISD::SETEQ) ^ (Val == 0); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8453 | |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8454 | // Create the PPCISD altivec 'dot' comparison node. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8455 | SDValue Ops[] = { |
Chris Lattner | d66f14e | 2006-08-11 17:18:05 +0000 | [diff] [blame] | 8456 | LHS.getOperand(2), // LHS of compare |
| 8457 | LHS.getOperand(3), // RHS of compare |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8458 | DAG.getConstant(CompareOpc, MVT::i32) |
Chris Lattner | d66f14e | 2006-08-11 17:18:05 +0000 | [diff] [blame] | 8459 | }; |
Benjamin Kramer | fdf362b | 2013-03-07 20:33:29 +0000 | [diff] [blame] | 8460 | EVT VTs[] = { LHS.getOperand(2).getValueType(), MVT::Glue }; |
Craig Topper | 48d114b | 2014-04-26 18:35:24 +0000 | [diff] [blame] | 8461 | SDValue CompNode = DAG.getNode(PPCISD::VCMPo, dl, VTs, Ops); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8462 | |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8463 | // Unpack the result based on how the target uses it. |
Chris Lattner | 8c6a41e | 2006-11-17 22:10:59 +0000 | [diff] [blame] | 8464 | PPC::Predicate CompOpc; |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 8465 | switch (cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue()) { |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8466 | default: // Can't happen, don't crash on invalid number though. |
| 8467 | case 0: // Branch on the value of the EQ bit of CR6. |
Chris Lattner | 8c6a41e | 2006-11-17 22:10:59 +0000 | [diff] [blame] | 8468 | CompOpc = BranchOnWhenPredTrue ? PPC::PRED_EQ : PPC::PRED_NE; |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8469 | break; |
| 8470 | case 1: // Branch on the inverted value of the EQ bit of CR6. |
Chris Lattner | 8c6a41e | 2006-11-17 22:10:59 +0000 | [diff] [blame] | 8471 | CompOpc = BranchOnWhenPredTrue ? PPC::PRED_NE : PPC::PRED_EQ; |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8472 | break; |
| 8473 | case 2: // Branch on the value of the LT bit of CR6. |
Chris Lattner | 8c6a41e | 2006-11-17 22:10:59 +0000 | [diff] [blame] | 8474 | CompOpc = BranchOnWhenPredTrue ? PPC::PRED_LT : PPC::PRED_GE; |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8475 | break; |
| 8476 | case 3: // Branch on the inverted value of the LT bit of CR6. |
Chris Lattner | 8c6a41e | 2006-11-17 22:10:59 +0000 | [diff] [blame] | 8477 | CompOpc = BranchOnWhenPredTrue ? PPC::PRED_GE : PPC::PRED_LT; |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8478 | break; |
| 8479 | } |
| 8480 | |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8481 | return DAG.getNode(PPCISD::COND_BRANCH, dl, MVT::Other, N->getOperand(0), |
| 8482 | DAG.getConstant(CompOpc, MVT::i32), |
| 8483 | DAG.getRegister(PPC::CR6, MVT::i32), |
Chris Lattner | 9754d14 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 8484 | N->getOperand(4), CompNode.getValue(1)); |
| 8485 | } |
| 8486 | break; |
| 8487 | } |
Chris Lattner | f418435 | 2006-03-01 04:57:39 +0000 | [diff] [blame] | 8488 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8489 | |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8490 | return SDValue(); |
Chris Lattner | f418435 | 2006-03-01 04:57:39 +0000 | [diff] [blame] | 8491 | } |
| 8492 | |
Chris Lattner | 4211ca9 | 2006-04-14 06:01:58 +0000 | [diff] [blame] | 8493 | //===----------------------------------------------------------------------===// |
| 8494 | // Inline Assembly Support |
| 8495 | //===----------------------------------------------------------------------===// |
| 8496 | |
Jay Foad | a0653a3 | 2014-05-14 21:14:37 +0000 | [diff] [blame] | 8497 | void PPCTargetLowering::computeKnownBitsForTargetNode(const SDValue Op, |
| 8498 | APInt &KnownZero, |
| 8499 | APInt &KnownOne, |
| 8500 | const SelectionDAG &DAG, |
| 8501 | unsigned Depth) const { |
Rafael Espindola | ba0a6ca | 2012-04-04 12:51:34 +0000 | [diff] [blame] | 8502 | KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0); |
Chris Lattner | c5287c0 | 2006-04-02 06:26:07 +0000 | [diff] [blame] | 8503 | switch (Op.getOpcode()) { |
| 8504 | default: break; |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8505 | case PPCISD::LBRX: { |
| 8506 | // lhbrx is known to have the top bits cleared out. |
Dan Gohman | a5fc035 | 2009-09-27 23:17:47 +0000 | [diff] [blame] | 8507 | if (cast<VTSDNode>(Op.getOperand(2))->getVT() == MVT::i16) |
Chris Lattner | a7976d3 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 8508 | KnownZero = 0xFFFF0000; |
| 8509 | break; |
| 8510 | } |
Chris Lattner | c5287c0 | 2006-04-02 06:26:07 +0000 | [diff] [blame] | 8511 | case ISD::INTRINSIC_WO_CHAIN: { |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 8512 | switch (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue()) { |
Chris Lattner | c5287c0 | 2006-04-02 06:26:07 +0000 | [diff] [blame] | 8513 | default: break; |
| 8514 | case Intrinsic::ppc_altivec_vcmpbfp_p: |
| 8515 | case Intrinsic::ppc_altivec_vcmpeqfp_p: |
| 8516 | case Intrinsic::ppc_altivec_vcmpequb_p: |
| 8517 | case Intrinsic::ppc_altivec_vcmpequh_p: |
| 8518 | case Intrinsic::ppc_altivec_vcmpequw_p: |
| 8519 | case Intrinsic::ppc_altivec_vcmpgefp_p: |
| 8520 | case Intrinsic::ppc_altivec_vcmpgtfp_p: |
| 8521 | case Intrinsic::ppc_altivec_vcmpgtsb_p: |
| 8522 | case Intrinsic::ppc_altivec_vcmpgtsh_p: |
| 8523 | case Intrinsic::ppc_altivec_vcmpgtsw_p: |
| 8524 | case Intrinsic::ppc_altivec_vcmpgtub_p: |
| 8525 | case Intrinsic::ppc_altivec_vcmpgtuh_p: |
| 8526 | case Intrinsic::ppc_altivec_vcmpgtuw_p: |
| 8527 | KnownZero = ~1U; // All bits but the low one are known to be zero. |
| 8528 | break; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8529 | } |
Chris Lattner | c5287c0 | 2006-04-02 06:26:07 +0000 | [diff] [blame] | 8530 | } |
| 8531 | } |
| 8532 | } |
| 8533 | |
| 8534 | |
Chris Lattner | d685514 | 2007-03-25 02:14:49 +0000 | [diff] [blame] | 8535 | /// getConstraintType - Given a constraint, return the type of |
Chris Lattner | 203b2f1 | 2006-02-07 20:16:30 +0000 | [diff] [blame] | 8536 | /// constraint it is for this target. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8537 | PPCTargetLowering::ConstraintType |
Chris Lattner | d685514 | 2007-03-25 02:14:49 +0000 | [diff] [blame] | 8538 | PPCTargetLowering::getConstraintType(const std::string &Constraint) const { |
| 8539 | if (Constraint.size() == 1) { |
| 8540 | switch (Constraint[0]) { |
| 8541 | default: break; |
| 8542 | case 'b': |
| 8543 | case 'r': |
| 8544 | case 'f': |
| 8545 | case 'v': |
| 8546 | case 'y': |
| 8547 | return C_RegisterClass; |
Hal Finkel | 4f24c62 | 2012-11-05 18:18:42 +0000 | [diff] [blame] | 8548 | case 'Z': |
| 8549 | // FIXME: While Z does indicate a memory constraint, it specifically |
| 8550 | // indicates an r+r address (used in conjunction with the 'y' modifier |
| 8551 | // in the replacement string). Currently, we're forcing the base |
| 8552 | // register to be r0 in the asm printer (which is interpreted as zero) |
| 8553 | // and forming the complete address in the second register. This is |
| 8554 | // suboptimal. |
| 8555 | return C_Memory; |
Chris Lattner | d685514 | 2007-03-25 02:14:49 +0000 | [diff] [blame] | 8556 | } |
Hal Finkel | 6aca237 | 2014-03-02 18:23:39 +0000 | [diff] [blame] | 8557 | } else if (Constraint == "wc") { // individual CR bits. |
| 8558 | return C_RegisterClass; |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 8559 | } else if (Constraint == "wa" || Constraint == "wd" || |
| 8560 | Constraint == "wf" || Constraint == "ws") { |
| 8561 | return C_RegisterClass; // VSX registers. |
Chris Lattner | d685514 | 2007-03-25 02:14:49 +0000 | [diff] [blame] | 8562 | } |
| 8563 | return TargetLowering::getConstraintType(Constraint); |
Chris Lattner | 203b2f1 | 2006-02-07 20:16:30 +0000 | [diff] [blame] | 8564 | } |
| 8565 | |
John Thompson | e8360b7 | 2010-10-29 17:29:13 +0000 | [diff] [blame] | 8566 | /// Examine constraint type and operand type and determine a weight value. |
| 8567 | /// This object must already have been set up with the operand type |
| 8568 | /// and the current alternative constraint selected. |
| 8569 | TargetLowering::ConstraintWeight |
| 8570 | PPCTargetLowering::getSingleConstraintMatchWeight( |
| 8571 | AsmOperandInfo &info, const char *constraint) const { |
| 8572 | ConstraintWeight weight = CW_Invalid; |
| 8573 | Value *CallOperandVal = info.CallOperandVal; |
| 8574 | // If we don't have a value, we can't do a match, |
| 8575 | // but allow it at the lowest weight. |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 8576 | if (!CallOperandVal) |
John Thompson | e8360b7 | 2010-10-29 17:29:13 +0000 | [diff] [blame] | 8577 | return CW_Default; |
Chris Lattner | 229907c | 2011-07-18 04:54:35 +0000 | [diff] [blame] | 8578 | Type *type = CallOperandVal->getType(); |
Hal Finkel | 6aca237 | 2014-03-02 18:23:39 +0000 | [diff] [blame] | 8579 | |
John Thompson | e8360b7 | 2010-10-29 17:29:13 +0000 | [diff] [blame] | 8580 | // Look at the constraint type. |
Hal Finkel | 6aca237 | 2014-03-02 18:23:39 +0000 | [diff] [blame] | 8581 | if (StringRef(constraint) == "wc" && type->isIntegerTy(1)) |
| 8582 | return CW_Register; // an individual CR bit. |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 8583 | else if ((StringRef(constraint) == "wa" || |
| 8584 | StringRef(constraint) == "wd" || |
| 8585 | StringRef(constraint) == "wf") && |
| 8586 | type->isVectorTy()) |
| 8587 | return CW_Register; |
| 8588 | else if (StringRef(constraint) == "ws" && type->isDoubleTy()) |
| 8589 | return CW_Register; |
Hal Finkel | 6aca237 | 2014-03-02 18:23:39 +0000 | [diff] [blame] | 8590 | |
John Thompson | e8360b7 | 2010-10-29 17:29:13 +0000 | [diff] [blame] | 8591 | switch (*constraint) { |
| 8592 | default: |
| 8593 | weight = TargetLowering::getSingleConstraintMatchWeight(info, constraint); |
| 8594 | break; |
| 8595 | case 'b': |
| 8596 | if (type->isIntegerTy()) |
| 8597 | weight = CW_Register; |
| 8598 | break; |
| 8599 | case 'f': |
| 8600 | if (type->isFloatTy()) |
| 8601 | weight = CW_Register; |
| 8602 | break; |
| 8603 | case 'd': |
| 8604 | if (type->isDoubleTy()) |
| 8605 | weight = CW_Register; |
| 8606 | break; |
| 8607 | case 'v': |
| 8608 | if (type->isVectorTy()) |
| 8609 | weight = CW_Register; |
| 8610 | break; |
| 8611 | case 'y': |
| 8612 | weight = CW_Register; |
| 8613 | break; |
Hal Finkel | 4f24c62 | 2012-11-05 18:18:42 +0000 | [diff] [blame] | 8614 | case 'Z': |
| 8615 | weight = CW_Memory; |
| 8616 | break; |
John Thompson | e8360b7 | 2010-10-29 17:29:13 +0000 | [diff] [blame] | 8617 | } |
| 8618 | return weight; |
| 8619 | } |
| 8620 | |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8621 | std::pair<unsigned, const TargetRegisterClass*> |
Chris Lattner | 584a11a | 2006-11-02 01:44:04 +0000 | [diff] [blame] | 8622 | PPCTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, |
Chad Rosier | 295bd43 | 2013-06-22 18:37:38 +0000 | [diff] [blame] | 8623 | MVT VT) const { |
Chris Lattner | 0151361 | 2006-01-31 19:20:21 +0000 | [diff] [blame] | 8624 | if (Constraint.size() == 1) { |
Chris Lattner | 584a11a | 2006-11-02 01:44:04 +0000 | [diff] [blame] | 8625 | // GCC RS6000 Constraint Letters |
| 8626 | switch (Constraint[0]) { |
| 8627 | case 'b': // R1-R31 |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 8628 | if (VT == MVT::i64 && Subtarget.isPPC64()) |
Hal Finkel | 638a9fa | 2013-03-19 18:51:05 +0000 | [diff] [blame] | 8629 | return std::make_pair(0U, &PPC::G8RC_NOX0RegClass); |
| 8630 | return std::make_pair(0U, &PPC::GPRC_NOR0RegClass); |
Chris Lattner | 584a11a | 2006-11-02 01:44:04 +0000 | [diff] [blame] | 8631 | case 'r': // R0-R31 |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 8632 | if (VT == MVT::i64 && Subtarget.isPPC64()) |
Craig Topper | abadc66 | 2012-04-20 06:31:50 +0000 | [diff] [blame] | 8633 | return std::make_pair(0U, &PPC::G8RCRegClass); |
| 8634 | return std::make_pair(0U, &PPC::GPRCRegClass); |
Chris Lattner | 584a11a | 2006-11-02 01:44:04 +0000 | [diff] [blame] | 8635 | case 'f': |
Ulrich Weigand | 0de4a1e | 2012-10-29 17:49:34 +0000 | [diff] [blame] | 8636 | if (VT == MVT::f32 || VT == MVT::i32) |
Craig Topper | abadc66 | 2012-04-20 06:31:50 +0000 | [diff] [blame] | 8637 | return std::make_pair(0U, &PPC::F4RCRegClass); |
Ulrich Weigand | 0de4a1e | 2012-10-29 17:49:34 +0000 | [diff] [blame] | 8638 | if (VT == MVT::f64 || VT == MVT::i64) |
Craig Topper | abadc66 | 2012-04-20 06:31:50 +0000 | [diff] [blame] | 8639 | return std::make_pair(0U, &PPC::F8RCRegClass); |
Chris Lattner | 584a11a | 2006-11-02 01:44:04 +0000 | [diff] [blame] | 8640 | break; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8641 | case 'v': |
Craig Topper | abadc66 | 2012-04-20 06:31:50 +0000 | [diff] [blame] | 8642 | return std::make_pair(0U, &PPC::VRRCRegClass); |
Chris Lattner | 584a11a | 2006-11-02 01:44:04 +0000 | [diff] [blame] | 8643 | case 'y': // crrc |
Craig Topper | abadc66 | 2012-04-20 06:31:50 +0000 | [diff] [blame] | 8644 | return std::make_pair(0U, &PPC::CRRCRegClass); |
Chris Lattner | 0151361 | 2006-01-31 19:20:21 +0000 | [diff] [blame] | 8645 | } |
Hal Finkel | 6aca237 | 2014-03-02 18:23:39 +0000 | [diff] [blame] | 8646 | } else if (Constraint == "wc") { // an individual CR bit. |
| 8647 | return std::make_pair(0U, &PPC::CRBITRCRegClass); |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 8648 | } else if (Constraint == "wa" || Constraint == "wd" || |
Hal Finkel | 19be506 | 2014-03-29 05:29:01 +0000 | [diff] [blame] | 8649 | Constraint == "wf") { |
Hal Finkel | 27774d9 | 2014-03-13 07:58:58 +0000 | [diff] [blame] | 8650 | return std::make_pair(0U, &PPC::VSRCRegClass); |
Hal Finkel | 19be506 | 2014-03-29 05:29:01 +0000 | [diff] [blame] | 8651 | } else if (Constraint == "ws") { |
| 8652 | return std::make_pair(0U, &PPC::VSFRCRegClass); |
Chris Lattner | 0151361 | 2006-01-31 19:20:21 +0000 | [diff] [blame] | 8653 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8654 | |
Hal Finkel | b176acb | 2013-08-03 12:25:10 +0000 | [diff] [blame] | 8655 | std::pair<unsigned, const TargetRegisterClass*> R = |
| 8656 | TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); |
| 8657 | |
| 8658 | // r[0-9]+ are used, on PPC64, to refer to the corresponding 64-bit registers |
| 8659 | // (which we call X[0-9]+). If a 64-bit value has been requested, and a |
| 8660 | // 32-bit GPR has been selected, then 'upgrade' it to the 64-bit parent |
| 8661 | // register. |
| 8662 | // FIXME: If TargetLowering::getRegForInlineAsmConstraint could somehow use |
| 8663 | // the AsmName field from *RegisterInfo.td, then this would not be necessary. |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 8664 | if (R.first && VT == MVT::i64 && Subtarget.isPPC64() && |
Hal Finkel | b176acb | 2013-08-03 12:25:10 +0000 | [diff] [blame] | 8665 | PPC::GPRCRegClass.contains(R.first)) { |
| 8666 | const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); |
| 8667 | return std::make_pair(TRI->getMatchingSuperReg(R.first, |
Hal Finkel | b3ca00d | 2013-08-14 20:05:04 +0000 | [diff] [blame] | 8668 | PPC::sub_32, &PPC::G8RCRegClass), |
Hal Finkel | b176acb | 2013-08-03 12:25:10 +0000 | [diff] [blame] | 8669 | &PPC::G8RCRegClass); |
| 8670 | } |
| 8671 | |
| 8672 | return R; |
Chris Lattner | 0151361 | 2006-01-31 19:20:21 +0000 | [diff] [blame] | 8673 | } |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8674 | |
Chris Lattner | 584a11a | 2006-11-02 01:44:04 +0000 | [diff] [blame] | 8675 | |
Chris Lattner | d8c9cb9 | 2007-08-25 00:47:38 +0000 | [diff] [blame] | 8676 | /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops |
Dale Johannesen | ce97d55 | 2010-06-25 21:55:36 +0000 | [diff] [blame] | 8677 | /// vector. If it is invalid, don't add anything to Ops. |
Eric Christopher | 0713a9d | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 8678 | void PPCTargetLowering::LowerAsmOperandForConstraint(SDValue Op, |
Eric Christopher | de9399b | 2011-06-02 23:16:42 +0000 | [diff] [blame] | 8679 | std::string &Constraint, |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8680 | std::vector<SDValue>&Ops, |
Chris Lattner | 724539c | 2008-04-26 23:02:14 +0000 | [diff] [blame] | 8681 | SelectionDAG &DAG) const { |
Craig Topper | 062a2ba | 2014-04-25 05:30:21 +0000 | [diff] [blame] | 8682 | SDValue Result; |
Eric Christopher | 0713a9d | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 8683 | |
Eric Christopher | de9399b | 2011-06-02 23:16:42 +0000 | [diff] [blame] | 8684 | // Only support length 1 constraints. |
| 8685 | if (Constraint.length() > 1) return; |
Eric Christopher | 0713a9d | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 8686 | |
Eric Christopher | de9399b | 2011-06-02 23:16:42 +0000 | [diff] [blame] | 8687 | char Letter = Constraint[0]; |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8688 | switch (Letter) { |
| 8689 | default: break; |
| 8690 | case 'I': |
| 8691 | case 'J': |
| 8692 | case 'K': |
| 8693 | case 'L': |
| 8694 | case 'M': |
| 8695 | case 'N': |
| 8696 | case 'O': |
| 8697 | case 'P': { |
Chris Lattner | 0b7472d | 2007-05-15 01:31:05 +0000 | [diff] [blame] | 8698 | ConstantSDNode *CST = dyn_cast<ConstantSDNode>(Op); |
Chris Lattner | d8c9cb9 | 2007-08-25 00:47:38 +0000 | [diff] [blame] | 8699 | if (!CST) return; // Must be an immediate to match. |
Dan Gohman | effb894 | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 8700 | unsigned Value = CST->getZExtValue(); |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8701 | switch (Letter) { |
Torok Edwin | fbcc663 | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 8702 | default: llvm_unreachable("Unknown constraint letter!"); |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8703 | case 'I': // "I" is a signed 16-bit constant. |
Chris Lattner | 0b7472d | 2007-05-15 01:31:05 +0000 | [diff] [blame] | 8704 | if ((short)Value == (int)Value) |
Chris Lattner | d8c9cb9 | 2007-08-25 00:47:38 +0000 | [diff] [blame] | 8705 | Result = DAG.getTargetConstant(Value, Op.getValueType()); |
Chris Lattner | 8c6949e | 2006-10-31 19:40:43 +0000 | [diff] [blame] | 8706 | break; |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8707 | case 'J': // "J" is a constant with only the high-order 16 bits nonzero. |
| 8708 | case 'L': // "L" is a signed 16-bit constant shifted left 16 bits. |
Chris Lattner | 0b7472d | 2007-05-15 01:31:05 +0000 | [diff] [blame] | 8709 | if ((short)Value == 0) |
Chris Lattner | d8c9cb9 | 2007-08-25 00:47:38 +0000 | [diff] [blame] | 8710 | Result = DAG.getTargetConstant(Value, Op.getValueType()); |
Chris Lattner | 8c6949e | 2006-10-31 19:40:43 +0000 | [diff] [blame] | 8711 | break; |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8712 | case 'K': // "K" is a constant with only the low-order 16 bits nonzero. |
Chris Lattner | 0b7472d | 2007-05-15 01:31:05 +0000 | [diff] [blame] | 8713 | if ((Value >> 16) == 0) |
Chris Lattner | d8c9cb9 | 2007-08-25 00:47:38 +0000 | [diff] [blame] | 8714 | Result = DAG.getTargetConstant(Value, Op.getValueType()); |
Chris Lattner | 8c6949e | 2006-10-31 19:40:43 +0000 | [diff] [blame] | 8715 | break; |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8716 | case 'M': // "M" is a constant that is greater than 31. |
Chris Lattner | 0b7472d | 2007-05-15 01:31:05 +0000 | [diff] [blame] | 8717 | if (Value > 31) |
Chris Lattner | d8c9cb9 | 2007-08-25 00:47:38 +0000 | [diff] [blame] | 8718 | Result = DAG.getTargetConstant(Value, Op.getValueType()); |
Chris Lattner | 8c6949e | 2006-10-31 19:40:43 +0000 | [diff] [blame] | 8719 | break; |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8720 | case 'N': // "N" is a positive constant that is an exact power of two. |
Chris Lattner | 0b7472d | 2007-05-15 01:31:05 +0000 | [diff] [blame] | 8721 | if ((int)Value > 0 && isPowerOf2_32(Value)) |
Chris Lattner | d8c9cb9 | 2007-08-25 00:47:38 +0000 | [diff] [blame] | 8722 | Result = DAG.getTargetConstant(Value, Op.getValueType()); |
Chris Lattner | 8c6949e | 2006-10-31 19:40:43 +0000 | [diff] [blame] | 8723 | break; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8724 | case 'O': // "O" is the constant zero. |
Chris Lattner | 0b7472d | 2007-05-15 01:31:05 +0000 | [diff] [blame] | 8725 | if (Value == 0) |
Chris Lattner | d8c9cb9 | 2007-08-25 00:47:38 +0000 | [diff] [blame] | 8726 | Result = DAG.getTargetConstant(Value, Op.getValueType()); |
Chris Lattner | 8c6949e | 2006-10-31 19:40:43 +0000 | [diff] [blame] | 8727 | break; |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8728 | case 'P': // "P" is a constant whose negation is a signed 16-bit constant. |
Chris Lattner | 0b7472d | 2007-05-15 01:31:05 +0000 | [diff] [blame] | 8729 | if ((short)-Value == (int)-Value) |
Chris Lattner | d8c9cb9 | 2007-08-25 00:47:38 +0000 | [diff] [blame] | 8730 | Result = DAG.getTargetConstant(Value, Op.getValueType()); |
Chris Lattner | 8c6949e | 2006-10-31 19:40:43 +0000 | [diff] [blame] | 8731 | break; |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8732 | } |
| 8733 | break; |
| 8734 | } |
| 8735 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8736 | |
Gabor Greif | f304a7a | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 8737 | if (Result.getNode()) { |
Chris Lattner | d8c9cb9 | 2007-08-25 00:47:38 +0000 | [diff] [blame] | 8738 | Ops.push_back(Result); |
| 8739 | return; |
| 8740 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8741 | |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8742 | // Handle standard constraint letters. |
Eric Christopher | de9399b | 2011-06-02 23:16:42 +0000 | [diff] [blame] | 8743 | TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG); |
Chris Lattner | 15a6c4c | 2006-02-07 00:47:13 +0000 | [diff] [blame] | 8744 | } |
Evan Cheng | 2dd2c65 | 2006-03-13 23:20:37 +0000 | [diff] [blame] | 8745 | |
Chris Lattner | 1eb94d9 | 2007-03-30 23:15:24 +0000 | [diff] [blame] | 8746 | // isLegalAddressingMode - Return true if the addressing mode represented |
| 8747 | // by AM is legal for this target, for a load/store of the specified type. |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8748 | bool PPCTargetLowering::isLegalAddressingMode(const AddrMode &AM, |
Chris Lattner | 229907c | 2011-07-18 04:54:35 +0000 | [diff] [blame] | 8749 | Type *Ty) const { |
Chris Lattner | 1eb94d9 | 2007-03-30 23:15:24 +0000 | [diff] [blame] | 8750 | // FIXME: PPC does not allow r+i addressing modes for vectors! |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8751 | |
Chris Lattner | 1eb94d9 | 2007-03-30 23:15:24 +0000 | [diff] [blame] | 8752 | // PPC allows a sign-extended 16-bit immediate field. |
| 8753 | if (AM.BaseOffs <= -(1LL << 16) || AM.BaseOffs >= (1LL << 16)-1) |
| 8754 | return false; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8755 | |
Chris Lattner | 1eb94d9 | 2007-03-30 23:15:24 +0000 | [diff] [blame] | 8756 | // No global is ever allowed as a base. |
| 8757 | if (AM.BaseGV) |
| 8758 | return false; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8759 | |
| 8760 | // PPC only support r+r, |
Chris Lattner | 1eb94d9 | 2007-03-30 23:15:24 +0000 | [diff] [blame] | 8761 | switch (AM.Scale) { |
| 8762 | case 0: // "r+i" or just "i", depending on HasBaseReg. |
| 8763 | break; |
| 8764 | case 1: |
| 8765 | if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed. |
| 8766 | return false; |
| 8767 | // Otherwise we have r+r or r+i. |
| 8768 | break; |
| 8769 | case 2: |
| 8770 | if (AM.HasBaseReg || AM.BaseOffs) // 2*r+r or 2*r+i is not allowed. |
| 8771 | return false; |
| 8772 | // Allow 2*r as r+r. |
| 8773 | break; |
Chris Lattner | 19ccd62 | 2007-04-09 22:10:05 +0000 | [diff] [blame] | 8774 | default: |
| 8775 | // No other scales are supported. |
| 8776 | return false; |
Chris Lattner | 1eb94d9 | 2007-03-30 23:15:24 +0000 | [diff] [blame] | 8777 | } |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8778 | |
Chris Lattner | 1eb94d9 | 2007-03-30 23:15:24 +0000 | [diff] [blame] | 8779 | return true; |
| 8780 | } |
| 8781 | |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 8782 | SDValue PPCTargetLowering::LowerRETURNADDR(SDValue Op, |
| 8783 | SelectionDAG &DAG) const { |
Evan Cheng | 168ced9 | 2010-05-22 01:47:14 +0000 | [diff] [blame] | 8784 | MachineFunction &MF = DAG.getMachineFunction(); |
| 8785 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 8786 | MFI->setReturnAddressIsTaken(true); |
| 8787 | |
Bill Wendling | 908bf81 | 2014-01-06 00:43:20 +0000 | [diff] [blame] | 8788 | if (verifyReturnAddressArgumentIsConstant(Op, DAG)) |
Bill Wendling | df7dd28 | 2014-01-05 01:47:20 +0000 | [diff] [blame] | 8789 | return SDValue(); |
Bill Wendling | df7dd28 | 2014-01-05 01:47:20 +0000 | [diff] [blame] | 8790 | |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 8791 | SDLoc dl(Op); |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8792 | unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); |
Chris Lattner | f6a8156 | 2007-12-08 06:59:59 +0000 | [diff] [blame] | 8793 | |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8794 | // Make sure the function does not optimize away the store of the RA to |
| 8795 | // the stack. |
Chris Lattner | f6a8156 | 2007-12-08 06:59:59 +0000 | [diff] [blame] | 8796 | PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8797 | FuncInfo->setLRStoreRequired(); |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 8798 | bool isPPC64 = Subtarget.isPPC64(); |
| 8799 | bool isDarwinABI = Subtarget.isDarwinABI(); |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8800 | |
| 8801 | if (Depth > 0) { |
| 8802 | SDValue FrameAddr = LowerFRAMEADDR(Op, DAG); |
| 8803 | SDValue Offset = |
Wesley Peck | 527da1b | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 8804 | |
Anton Korobeynikov | 2f93128 | 2011-01-10 12:39:04 +0000 | [diff] [blame] | 8805 | DAG.getConstant(PPCFrameLowering::getReturnSaveOffset(isPPC64, isDarwinABI), |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8806 | isPPC64? MVT::i64 : MVT::i32); |
| 8807 | return DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), |
| 8808 | DAG.getNode(ISD::ADD, dl, getPointerTy(), |
| 8809 | FrameAddr, Offset), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 8810 | MachinePointerInfo(), false, false, false, 0); |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8811 | } |
Chris Lattner | f6a8156 | 2007-12-08 06:59:59 +0000 | [diff] [blame] | 8812 | |
Chris Lattner | f6a8156 | 2007-12-08 06:59:59 +0000 | [diff] [blame] | 8813 | // Just load the return address off the stack. |
Dan Gohman | 2ce6f2a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 8814 | SDValue RetAddrFI = getReturnAddrFrameIndex(DAG); |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8815 | return DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 8816 | RetAddrFI, MachinePointerInfo(), false, false, false, 0); |
Chris Lattner | f6a8156 | 2007-12-08 06:59:59 +0000 | [diff] [blame] | 8817 | } |
| 8818 | |
Dan Gohman | 21cea8a | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 8819 | SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op, |
| 8820 | SelectionDAG &DAG) const { |
Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame] | 8821 | SDLoc dl(Op); |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8822 | unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8823 | |
Owen Anderson | 53aa7a9 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 8824 | EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8825 | bool isPPC64 = PtrVT == MVT::i64; |
Scott Michel | cf0da6c | 2009-02-17 22:15:04 +0000 | [diff] [blame] | 8826 | |
Nicolas Geoffray | 75ab979 | 2007-03-01 13:11:38 +0000 | [diff] [blame] | 8827 | MachineFunction &MF = DAG.getMachineFunction(); |
| 8828 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8829 | MFI->setFrameAddressIsTaken(true); |
Hal Finkel | aa03c03 | 2013-03-21 19:03:19 +0000 | [diff] [blame] | 8830 | |
| 8831 | // Naked functions never have a frame pointer, and so we use r1. For all |
| 8832 | // other functions, this decision must be delayed until during PEI. |
| 8833 | unsigned FrameReg; |
| 8834 | if (MF.getFunction()->getAttributes().hasAttribute( |
| 8835 | AttributeSet::FunctionIndex, Attribute::Naked)) |
| 8836 | FrameReg = isPPC64 ? PPC::X1 : PPC::R1; |
| 8837 | else |
| 8838 | FrameReg = isPPC64 ? PPC::FP8 : PPC::FP; |
| 8839 | |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8840 | SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, FrameReg, |
| 8841 | PtrVT); |
| 8842 | while (Depth--) |
| 8843 | FrameAddr = DAG.getLoad(Op.getValueType(), dl, DAG.getEntryNode(), |
Pete Cooper | 82cd9e8 | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 8844 | FrameAddr, MachinePointerInfo(), false, false, |
| 8845 | false, 0); |
Dale Johannesen | 81bfca7 | 2010-05-03 22:59:34 +0000 | [diff] [blame] | 8846 | return FrameAddr; |
Nicolas Geoffray | 75ab979 | 2007-03-01 13:11:38 +0000 | [diff] [blame] | 8847 | } |
Dan Gohman | c14e522 | 2008-10-21 03:41:46 +0000 | [diff] [blame] | 8848 | |
Hal Finkel | 0d8db46 | 2014-05-11 19:29:11 +0000 | [diff] [blame] | 8849 | // FIXME? Maybe this could be a TableGen attribute on some registers and |
| 8850 | // this table could be generated automatically from RegInfo. |
| 8851 | unsigned PPCTargetLowering::getRegisterByName(const char* RegName, |
| 8852 | EVT VT) const { |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 8853 | bool isPPC64 = Subtarget.isPPC64(); |
| 8854 | bool isDarwinABI = Subtarget.isDarwinABI(); |
Hal Finkel | 0d8db46 | 2014-05-11 19:29:11 +0000 | [diff] [blame] | 8855 | |
| 8856 | if ((isPPC64 && VT != MVT::i64 && VT != MVT::i32) || |
| 8857 | (!isPPC64 && VT != MVT::i32)) |
| 8858 | report_fatal_error("Invalid register global variable type"); |
| 8859 | |
| 8860 | bool is64Bit = isPPC64 && VT == MVT::i64; |
| 8861 | unsigned Reg = StringSwitch<unsigned>(RegName) |
| 8862 | .Case("r1", is64Bit ? PPC::X1 : PPC::R1) |
| 8863 | .Case("r2", isDarwinABI ? 0 : (is64Bit ? PPC::X2 : PPC::R2)) |
| 8864 | .Case("r13", (!isPPC64 && isDarwinABI) ? 0 : |
| 8865 | (is64Bit ? PPC::X13 : PPC::R13)) |
| 8866 | .Default(0); |
| 8867 | |
| 8868 | if (Reg) |
| 8869 | return Reg; |
| 8870 | report_fatal_error("Invalid register name global variable"); |
| 8871 | } |
| 8872 | |
Dan Gohman | c14e522 | 2008-10-21 03:41:46 +0000 | [diff] [blame] | 8873 | bool |
| 8874 | PPCTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const { |
| 8875 | // The PowerPC target isn't yet aware of offsets. |
| 8876 | return false; |
| 8877 | } |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 8878 | |
Evan Cheng | d9929f0 | 2010-04-01 20:10:42 +0000 | [diff] [blame] | 8879 | /// getOptimalMemOpType - Returns the target specific optimal type for load |
Evan Cheng | 6139937 | 2010-04-02 19:36:14 +0000 | [diff] [blame] | 8880 | /// and store operations as a result of memset, memcpy, and memmove |
| 8881 | /// lowering. If DstAlign is zero that means it's safe to destination |
| 8882 | /// alignment can satisfy any constraint. Similarly if SrcAlign is zero it |
| 8883 | /// means there isn't a need to check it against alignment requirement, |
Evan Cheng | 962711e | 2012-12-12 02:34:41 +0000 | [diff] [blame] | 8884 | /// probably because the source does not need to be loaded. If 'IsMemset' is |
| 8885 | /// true, that means it's expanding a memset. If 'ZeroMemset' is true, that |
| 8886 | /// means it's a memset of zero. 'MemcpyStrSrc' indicates whether the memcpy |
| 8887 | /// source is constant so it does not need to be loaded. |
Dan Gohman | 148c69a | 2010-04-16 20:11:05 +0000 | [diff] [blame] | 8888 | /// It returns EVT::Other if the type should be determined using generic |
| 8889 | /// target-independent logic. |
Evan Cheng | 43cd9e3 | 2010-04-01 06:04:33 +0000 | [diff] [blame] | 8890 | EVT PPCTargetLowering::getOptimalMemOpType(uint64_t Size, |
| 8891 | unsigned DstAlign, unsigned SrcAlign, |
Evan Cheng | 962711e | 2012-12-12 02:34:41 +0000 | [diff] [blame] | 8892 | bool IsMemset, bool ZeroMemset, |
Evan Cheng | ebe47c8 | 2010-04-08 07:37:57 +0000 | [diff] [blame] | 8893 | bool MemcpyStrSrc, |
Dan Gohman | 148c69a | 2010-04-16 20:11:05 +0000 | [diff] [blame] | 8894 | MachineFunction &MF) const { |
Eric Christopher | d90a874 | 2014-06-12 22:38:20 +0000 | [diff] [blame] | 8895 | if (Subtarget.isPPC64()) { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8896 | return MVT::i64; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 8897 | } else { |
Owen Anderson | 9f94459 | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 8898 | return MVT::i32; |
Tilmann Scheller | b93960d | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 8899 | } |
| 8900 | } |
Hal Finkel | 88ed4e3 | 2012-04-01 19:23:08 +0000 | [diff] [blame] | 8901 | |
Hal Finkel | 34974ed | 2014-04-12 21:52:38 +0000 | [diff] [blame] | 8902 | /// \brief Returns true if it is beneficial to convert a load of a constant |
| 8903 | /// to just the constant itself. |
| 8904 | bool PPCTargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm, |
| 8905 | Type *Ty) const { |
| 8906 | assert(Ty->isIntegerTy()); |
| 8907 | |
| 8908 | unsigned BitSize = Ty->getPrimitiveSizeInBits(); |
| 8909 | if (BitSize == 0 || BitSize > 64) |
| 8910 | return false; |
| 8911 | return true; |
| 8912 | } |
| 8913 | |
| 8914 | bool PPCTargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const { |
| 8915 | if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy()) |
| 8916 | return false; |
| 8917 | unsigned NumBits1 = Ty1->getPrimitiveSizeInBits(); |
| 8918 | unsigned NumBits2 = Ty2->getPrimitiveSizeInBits(); |
| 8919 | return NumBits1 == 64 && NumBits2 == 32; |
| 8920 | } |
| 8921 | |
| 8922 | bool PPCTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { |
| 8923 | if (!VT1.isInteger() || !VT2.isInteger()) |
| 8924 | return false; |
| 8925 | unsigned NumBits1 = VT1.getSizeInBits(); |
| 8926 | unsigned NumBits2 = VT2.getSizeInBits(); |
| 8927 | return NumBits1 == 64 && NumBits2 == 32; |
| 8928 | } |
| 8929 | |
| 8930 | bool PPCTargetLowering::isLegalICmpImmediate(int64_t Imm) const { |
| 8931 | return isInt<16>(Imm) || isUInt<16>(Imm); |
| 8932 | } |
| 8933 | |
| 8934 | bool PPCTargetLowering::isLegalAddImmediate(int64_t Imm) const { |
| 8935 | return isInt<16>(Imm) || isUInt<16>(Imm); |
| 8936 | } |
| 8937 | |
Hal Finkel | 8d7fbc9 | 2013-03-15 15:27:13 +0000 | [diff] [blame] | 8938 | bool PPCTargetLowering::allowsUnalignedMemoryAccesses(EVT VT, |
Matt Arsenault | 25793a3 | 2014-02-05 23:15:53 +0000 | [diff] [blame] | 8939 | unsigned, |
Hal Finkel | 8d7fbc9 | 2013-03-15 15:27:13 +0000 | [diff] [blame] | 8940 | bool *Fast) const { |
| 8941 | if (DisablePPCUnaligned) |
| 8942 | return false; |
| 8943 | |
| 8944 | // PowerPC supports unaligned memory access for simple non-vector types. |
| 8945 | // Although accessing unaligned addresses is not as efficient as accessing |
| 8946 | // aligned addresses, it is generally more efficient than manual expansion, |
| 8947 | // and generally only traps for software emulation when crossing page |
| 8948 | // boundaries. |
| 8949 | |
| 8950 | if (!VT.isSimple()) |
| 8951 | return false; |
| 8952 | |
Hal Finkel | 6e28e6a | 2014-03-26 19:39:09 +0000 | [diff] [blame] | 8953 | if (VT.getSimpleVT().isVector()) { |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 8954 | if (Subtarget.hasVSX()) { |
Hal Finkel | 6e28e6a | 2014-03-26 19:39:09 +0000 | [diff] [blame] | 8955 | if (VT != MVT::v2f64 && VT != MVT::v2i64) |
| 8956 | return false; |
| 8957 | } else { |
| 8958 | return false; |
| 8959 | } |
| 8960 | } |
Hal Finkel | 8d7fbc9 | 2013-03-15 15:27:13 +0000 | [diff] [blame] | 8961 | |
| 8962 | if (VT == MVT::ppcf128) |
| 8963 | return false; |
| 8964 | |
| 8965 | if (Fast) |
| 8966 | *Fast = true; |
| 8967 | |
| 8968 | return true; |
| 8969 | } |
| 8970 | |
Stephen Lin | 73de7bf | 2013-07-09 18:16:56 +0000 | [diff] [blame] | 8971 | bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(EVT VT) const { |
| 8972 | VT = VT.getScalarType(); |
| 8973 | |
Hal Finkel | 0a479ae | 2012-06-22 00:49:52 +0000 | [diff] [blame] | 8974 | if (!VT.isSimple()) |
| 8975 | return false; |
| 8976 | |
| 8977 | switch (VT.getSimpleVT().SimpleTy) { |
| 8978 | case MVT::f32: |
| 8979 | case MVT::f64: |
Hal Finkel | 0a479ae | 2012-06-22 00:49:52 +0000 | [diff] [blame] | 8980 | return true; |
| 8981 | default: |
| 8982 | break; |
| 8983 | } |
| 8984 | |
| 8985 | return false; |
| 8986 | } |
| 8987 | |
Hal Finkel | b4240ca | 2014-03-31 17:48:16 +0000 | [diff] [blame] | 8988 | bool |
| 8989 | PPCTargetLowering::shouldExpandBuildVectorWithShuffles( |
| 8990 | EVT VT , unsigned DefinedValues) const { |
| 8991 | if (VT == MVT::v2i64) |
| 8992 | return false; |
| 8993 | |
| 8994 | return TargetLowering::shouldExpandBuildVectorWithShuffles(VT, DefinedValues); |
| 8995 | } |
| 8996 | |
Hal Finkel | 88ed4e3 | 2012-04-01 19:23:08 +0000 | [diff] [blame] | 8997 | Sched::Preference PPCTargetLowering::getSchedulingPreference(SDNode *N) const { |
Eric Christopher | b1aaebe | 2014-06-12 22:38:18 +0000 | [diff] [blame] | 8998 | if (DisableILPPref || Subtarget.enableMachineScheduler()) |
Hal Finkel | 4e9f1a8 | 2012-06-10 19:32:29 +0000 | [diff] [blame] | 8999 | return TargetLowering::getSchedulingPreference(N); |
Hal Finkel | 88ed4e3 | 2012-04-01 19:23:08 +0000 | [diff] [blame] | 9000 | |
Hal Finkel | 4e9f1a8 | 2012-06-10 19:32:29 +0000 | [diff] [blame] | 9001 | return Sched::ILP; |
Hal Finkel | 88ed4e3 | 2012-04-01 19:23:08 +0000 | [diff] [blame] | 9002 | } |
| 9003 | |
Bill Schmidt | 0cf702f | 2013-07-30 00:50:39 +0000 | [diff] [blame] | 9004 | // Create a fast isel object. |
| 9005 | FastISel * |
| 9006 | PPCTargetLowering::createFastISel(FunctionLoweringInfo &FuncInfo, |
| 9007 | const TargetLibraryInfo *LibInfo) const { |
| 9008 | return PPC::createFastISel(FuncInfo, LibInfo); |
| 9009 | } |