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gerrit-public.fairphone.software / toolchain / llvm-project / 6e557165097e442c95ad7cc38f1fda113f45c79b / . / llvm / test / CodeGen / X86 / vec_minmax_uint.ll
blob: 63afd777abb6211277df09b045f8ecc5c51b203f [file] [log] [blame]
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE42
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
8
9;
10; Unsigned Maximum (GT)
11;
12
13define <2 x i64> @max_gt_v2i64(<2 x i64> %a, <2 x i64> %b) {
14; SSE2-LABEL: max_gt_v2i64:
15; SSE2: # BB#0:
16; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
17; SSE2-NEXT: movdqa %xmm1, %xmm3
18; SSE2-NEXT: pxor %xmm2, %xmm3
19; SSE2-NEXT: pxor %xmm0, %xmm2
20; SSE2-NEXT: movdqa %xmm2, %xmm4
21; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
22; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
23; SSE2-NEXT: pcmpeqd %xmm3, %xmm2
24; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
25; SSE2-NEXT: pand %xmm5, %xmm2
26; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
27; SSE2-NEXT: por %xmm2, %xmm3
28; SSE2-NEXT: pand %xmm3, %xmm0
29; SSE2-NEXT: pandn %xmm1, %xmm3
30; SSE2-NEXT: por %xmm3, %xmm0
31; SSE2-NEXT: retq
32;
33; SSE41-LABEL: max_gt_v2i64:
34; SSE41: # BB#0:
35; SSE41-NEXT: movdqa %xmm0, %xmm2
36; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
37; SSE41-NEXT: movdqa %xmm1, %xmm3
38; SSE41-NEXT: pxor %xmm0, %xmm3
39; SSE41-NEXT: pxor %xmm2, %xmm0
40; SSE41-NEXT: movdqa %xmm0, %xmm4
41; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
42; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
43; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
44; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
45; SSE41-NEXT: pand %xmm5, %xmm3
46; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
47; SSE41-NEXT: por %xmm3, %xmm0
48; SSE41-NEXT: blendvpd %xmm2, %xmm1
49; SSE41-NEXT: movapd %xmm1, %xmm0
50; SSE41-NEXT: retq
51;
52; SSE42-LABEL: max_gt_v2i64:
53; SSE42: # BB#0:
54; SSE42-NEXT: movdqa %xmm0, %xmm2
55; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808]
56; SSE42-NEXT: movdqa %xmm1, %xmm3
57; SSE42-NEXT: pxor %xmm0, %xmm3
58; SSE42-NEXT: pxor %xmm2, %xmm0
59; SSE42-NEXT: pcmpgtq %xmm3, %xmm0
60; SSE42-NEXT: blendvpd %xmm2, %xmm1
61; SSE42-NEXT: movapd %xmm1, %xmm0
62; SSE42-NEXT: retq
63;
64; AVX-LABEL: max_gt_v2i64:
65; AVX: # BB#0:
66; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
67; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm3
68; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm2
69; AVX-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2
70; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
71; AVX-NEXT: retq
72 %1 = icmp ugt <2 x i64> %a, %b
73 %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b
74 ret <2 x i64> %2
75}
76
77define <4 x i64> @max_gt_v4i64(<4 x i64> %a, <4 x i64> %b) {
78; SSE2-LABEL: max_gt_v4i64:
79; SSE2: # BB#0:
80; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]
81; SSE2-NEXT: movdqa %xmm3, %xmm5
82; SSE2-NEXT: pxor %xmm4, %xmm5
83; SSE2-NEXT: movdqa %xmm1, %xmm6
84; SSE2-NEXT: pxor %xmm4, %xmm6
85; SSE2-NEXT: movdqa %xmm6, %xmm7
86; SSE2-NEXT: pcmpgtd %xmm5, %xmm7
87; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2]
88; SSE2-NEXT: pcmpeqd %xmm5, %xmm6
89; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
90; SSE2-NEXT: pand %xmm8, %xmm5
91; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
92; SSE2-NEXT: por %xmm5, %xmm6
93; SSE2-NEXT: movdqa %xmm2, %xmm5
94; SSE2-NEXT: pxor %xmm4, %xmm5
95; SSE2-NEXT: pxor %xmm0, %xmm4
96; SSE2-NEXT: movdqa %xmm4, %xmm7
97; SSE2-NEXT: pcmpgtd %xmm5, %xmm7
98; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2]
99; SSE2-NEXT: pcmpeqd %xmm5, %xmm4
100; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
101; SSE2-NEXT: pand %xmm8, %xmm4
102; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3]
103; SSE2-NEXT: por %xmm4, %xmm5
104; SSE2-NEXT: pand %xmm5, %xmm0
105; SSE2-NEXT: pandn %xmm2, %xmm5
106; SSE2-NEXT: por %xmm5, %xmm0
107; SSE2-NEXT: pand %xmm6, %xmm1
108; SSE2-NEXT: pandn %xmm3, %xmm6
109; SSE2-NEXT: por %xmm6, %xmm1
110; SSE2-NEXT: retq
111;
112; SSE41-LABEL: max_gt_v4i64:
113; SSE41: # BB#0:
114; SSE41-NEXT: movdqa %xmm0, %xmm8
115; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
116; SSE41-NEXT: movdqa %xmm3, %xmm5
117; SSE41-NEXT: pxor %xmm0, %xmm5
118; SSE41-NEXT: movdqa %xmm1, %xmm6
119; SSE41-NEXT: pxor %xmm0, %xmm6
120; SSE41-NEXT: movdqa %xmm6, %xmm7
121; SSE41-NEXT: pcmpgtd %xmm5, %xmm7
122; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
123; SSE41-NEXT: pcmpeqd %xmm5, %xmm6
124; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
125; SSE41-NEXT: pand %xmm4, %xmm6
126; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3]
127; SSE41-NEXT: por %xmm6, %xmm5
128; SSE41-NEXT: movdqa %xmm2, %xmm4
129; SSE41-NEXT: pxor %xmm0, %xmm4
130; SSE41-NEXT: pxor %xmm8, %xmm0
131; SSE41-NEXT: movdqa %xmm0, %xmm6
132; SSE41-NEXT: pcmpgtd %xmm4, %xmm6
133; SSE41-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
134; SSE41-NEXT: pcmpeqd %xmm4, %xmm0
135; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
136; SSE41-NEXT: pand %xmm7, %xmm4
137; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
138; SSE41-NEXT: por %xmm4, %xmm0
139; SSE41-NEXT: blendvpd %xmm8, %xmm2
140; SSE41-NEXT: movdqa %xmm5, %xmm0
141; SSE41-NEXT: blendvpd %xmm1, %xmm3
142; SSE41-NEXT: movapd %xmm2, %xmm0
143; SSE41-NEXT: movapd %xmm3, %xmm1
144; SSE41-NEXT: retq
145;
146; SSE42-LABEL: max_gt_v4i64:
147; SSE42: # BB#0:
148; SSE42-NEXT: movdqa %xmm0, %xmm4
149; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808]
150; SSE42-NEXT: movdqa %xmm3, %xmm6
151; SSE42-NEXT: pxor %xmm0, %xmm6
152; SSE42-NEXT: movdqa %xmm1, %xmm5
153; SSE42-NEXT: pxor %xmm0, %xmm5
154; SSE42-NEXT: pcmpgtq %xmm6, %xmm5
155; SSE42-NEXT: movdqa %xmm2, %xmm6
156; SSE42-NEXT: pxor %xmm0, %xmm6
157; SSE42-NEXT: pxor %xmm4, %xmm0
158; SSE42-NEXT: pcmpgtq %xmm6, %xmm0
159; SSE42-NEXT: blendvpd %xmm4, %xmm2
160; SSE42-NEXT: movdqa %xmm5, %xmm0
161; SSE42-NEXT: blendvpd %xmm1, %xmm3
162; SSE42-NEXT: movapd %xmm2, %xmm0
163; SSE42-NEXT: movapd %xmm3, %xmm1
164; SSE42-NEXT: retq
165;
166; AVX1-LABEL: max_gt_v4i64:
167; AVX1: # BB#0:
168; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
169; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
170; AVX1-NEXT: vxorps %xmm3, %xmm2, %xmm2
171; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4
172; AVX1-NEXT: vxorps %xmm3, %xmm4, %xmm4
173; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm2
174; AVX1-NEXT: vxorps %xmm3, %xmm1, %xmm4
175; AVX1-NEXT: vxorps %xmm3, %xmm0, %xmm3
176; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3
177; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2
178; AVX1-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
179; AVX1-NEXT: retq
180;
181; AVX2-LABEL: max_gt_v4i64:
182; AVX2: # BB#0:
183; AVX2-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
184; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3
185; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm2
186; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2
187; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
188; AVX2-NEXT: retq
189;
190; AVX512-LABEL: max_gt_v4i64:
191; AVX512: # BB#0:
192; AVX512-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
193; AVX512-NEXT: vpxor %ymm2, %ymm1, %ymm3
194; AVX512-NEXT: vpxor %ymm2, %ymm0, %ymm2
195; AVX512-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2
196; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
197; AVX512-NEXT: retq
198 %1 = icmp ugt <4 x i64> %a, %b
199 %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b
200 ret <4 x i64> %2
201}
202
203define <4 x i32> @max_gt_v4i32(<4 x i32> %a, <4 x i32> %b) {
204; SSE2-LABEL: max_gt_v4i32:
205; SSE2: # BB#0:
206; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
207; SSE2-NEXT: movdqa %xmm1, %xmm3
208; SSE2-NEXT: pxor %xmm2, %xmm3
209; SSE2-NEXT: pxor %xmm0, %xmm2
210; SSE2-NEXT: pcmpgtd %xmm3, %xmm2
211; SSE2-NEXT: pand %xmm2, %xmm0
212; SSE2-NEXT: pandn %xmm1, %xmm2
213; SSE2-NEXT: por %xmm2, %xmm0
214; SSE2-NEXT: retq
215;
216; SSE41-LABEL: max_gt_v4i32:
217; SSE41: # BB#0:
218; SSE41-NEXT: pmaxud %xmm1, %xmm0
219; SSE41-NEXT: retq
220;
221; SSE42-LABEL: max_gt_v4i32:
222; SSE42: # BB#0:
223; SSE42-NEXT: pmaxud %xmm1, %xmm0
224; SSE42-NEXT: retq
225;
226; AVX-LABEL: max_gt_v4i32:
227; AVX: # BB#0:
228; AVX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0
229; AVX-NEXT: retq
230 %1 = icmp ugt <4 x i32> %a, %b
231 %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b
232 ret <4 x i32> %2
233}
234
235define <8 x i32> @max_gt_v8i32(<8 x i32> %a, <8 x i32> %b) {
236; SSE2-LABEL: max_gt_v8i32:
237; SSE2: # BB#0:
238; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648]
239; SSE2-NEXT: movdqa %xmm3, %xmm6
240; SSE2-NEXT: pxor %xmm5, %xmm6
241; SSE2-NEXT: movdqa %xmm1, %xmm4
242; SSE2-NEXT: pxor %xmm5, %xmm4
243; SSE2-NEXT: pcmpgtd %xmm6, %xmm4
244; SSE2-NEXT: movdqa %xmm2, %xmm6
245; SSE2-NEXT: pxor %xmm5, %xmm6
246; SSE2-NEXT: pxor %xmm0, %xmm5
247; SSE2-NEXT: pcmpgtd %xmm6, %xmm5
248; SSE2-NEXT: pand %xmm5, %xmm0
249; SSE2-NEXT: pandn %xmm2, %xmm5
250; SSE2-NEXT: por %xmm5, %xmm0
251; SSE2-NEXT: pand %xmm4, %xmm1
252; SSE2-NEXT: pandn %xmm3, %xmm4
253; SSE2-NEXT: por %xmm1, %xmm4
254; SSE2-NEXT: movdqa %xmm4, %xmm1
255; SSE2-NEXT: retq
256;
257; SSE41-LABEL: max_gt_v8i32:
258; SSE41: # BB#0:
259; SSE41-NEXT: pmaxud %xmm2, %xmm0
260; SSE41-NEXT: pmaxud %xmm3, %xmm1
261; SSE41-NEXT: retq
262;
263; SSE42-LABEL: max_gt_v8i32:
264; SSE42: # BB#0:
265; SSE42-NEXT: pmaxud %xmm2, %xmm0
266; SSE42-NEXT: pmaxud %xmm3, %xmm1
267; SSE42-NEXT: retq
268;
269; AVX1-LABEL: max_gt_v8i32:
270; AVX1: # BB#0:
271; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
272; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
273; AVX1-NEXT: vpmaxud %xmm2, %xmm3, %xmm2
274; AVX1-NEXT: vpmaxud %xmm1, %xmm0, %xmm0
275; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
276; AVX1-NEXT: retq
277;
278; AVX2-LABEL: max_gt_v8i32:
279; AVX2: # BB#0:
280; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
281; AVX2-NEXT: retq
282;
283; AVX512-LABEL: max_gt_v8i32:
284; AVX512: # BB#0:
285; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
286; AVX512-NEXT: retq
287 %1 = icmp ugt <8 x i32> %a, %b
288 %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b
289 ret <8 x i32> %2
290}
291
292define <8 x i16> @max_gt_v8i16(<8 x i16> %a, <8 x i16> %b) {
293; SSE2-LABEL: max_gt_v8i16:
294; SSE2: # BB#0:
295; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
296; SSE2-NEXT: movdqa %xmm1, %xmm3
297; SSE2-NEXT: pxor %xmm2, %xmm3
298; SSE2-NEXT: pxor %xmm0, %xmm2
299; SSE2-NEXT: pcmpgtw %xmm3, %xmm2
300; SSE2-NEXT: pand %xmm2, %xmm0
301; SSE2-NEXT: pandn %xmm1, %xmm2
302; SSE2-NEXT: por %xmm2, %xmm0
303; SSE2-NEXT: retq
304;
305; SSE41-LABEL: max_gt_v8i16:
306; SSE41: # BB#0:
307; SSE41-NEXT: pmaxuw %xmm1, %xmm0
308; SSE41-NEXT: retq
309;
310; SSE42-LABEL: max_gt_v8i16:
311; SSE42: # BB#0:
312; SSE42-NEXT: pmaxuw %xmm1, %xmm0
313; SSE42-NEXT: retq
314;
315; AVX-LABEL: max_gt_v8i16:
316; AVX: # BB#0:
317; AVX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0
318; AVX-NEXT: retq
319 %1 = icmp ugt <8 x i16> %a, %b
320 %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b
321 ret <8 x i16> %2
322}
323
324define <16 x i16> @max_gt_v16i16(<16 x i16> %a, <16 x i16> %b) {
325; SSE2-LABEL: max_gt_v16i16:
326; SSE2: # BB#0:
327; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [32768,32768,32768,32768,32768,32768,32768,32768]
328; SSE2-NEXT: movdqa %xmm3, %xmm6
329; SSE2-NEXT: pxor %xmm5, %xmm6
330; SSE2-NEXT: movdqa %xmm1, %xmm4
331; SSE2-NEXT: pxor %xmm5, %xmm4
332; SSE2-NEXT: pcmpgtw %xmm6, %xmm4
333; SSE2-NEXT: movdqa %xmm2, %xmm6
334; SSE2-NEXT: pxor %xmm5, %xmm6
335; SSE2-NEXT: pxor %xmm0, %xmm5
336; SSE2-NEXT: pcmpgtw %xmm6, %xmm5
337; SSE2-NEXT: pand %xmm5, %xmm0
338; SSE2-NEXT: pandn %xmm2, %xmm5
339; SSE2-NEXT: por %xmm5, %xmm0
340; SSE2-NEXT: pand %xmm4, %xmm1
341; SSE2-NEXT: pandn %xmm3, %xmm4
342; SSE2-NEXT: por %xmm1, %xmm4
343; SSE2-NEXT: movdqa %xmm4, %xmm1
344; SSE2-NEXT: retq
345;
346; SSE41-LABEL: max_gt_v16i16:
347; SSE41: # BB#0:
348; SSE41-NEXT: pmaxuw %xmm2, %xmm0
349; SSE41-NEXT: pmaxuw %xmm3, %xmm1
350; SSE41-NEXT: retq
351;
352; SSE42-LABEL: max_gt_v16i16:
353; SSE42: # BB#0:
354; SSE42-NEXT: pmaxuw %xmm2, %xmm0
355; SSE42-NEXT: pmaxuw %xmm3, %xmm1
356; SSE42-NEXT: retq
357;
358; AVX1-LABEL: max_gt_v16i16:
359; AVX1: # BB#0:
360; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
361; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
362; AVX1-NEXT: vpmaxuw %xmm2, %xmm3, %xmm2
363; AVX1-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0
364; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
365; AVX1-NEXT: retq
366;
367; AVX2-LABEL: max_gt_v16i16:
368; AVX2: # BB#0:
369; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
370; AVX2-NEXT: retq
371;
372; AVX512-LABEL: max_gt_v16i16:
373; AVX512: # BB#0:
374; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
375; AVX512-NEXT: retq
376 %1 = icmp ugt <16 x i16> %a, %b
377 %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b
378 ret <16 x i16> %2
379}
380
381define <16 x i8> @max_gt_v16i8(<16 x i8> %a, <16 x i8> %b) {
382; SSE-LABEL: max_gt_v16i8:
383; SSE: # BB#0:
384; SSE-NEXT: pmaxub %xmm1, %xmm0
385; SSE-NEXT: retq
386;
387; AVX-LABEL: max_gt_v16i8:
388; AVX: # BB#0:
389; AVX-NEXT: vpmaxub %xmm1, %xmm0, %xmm0
390; AVX-NEXT: retq
391 %1 = icmp ugt <16 x i8> %a, %b
392 %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b
393 ret <16 x i8> %2
394}
395
396define <32 x i8> @max_gt_v32i8(<32 x i8> %a, <32 x i8> %b) {
397; SSE-LABEL: max_gt_v32i8:
398; SSE: # BB#0:
399; SSE-NEXT: pmaxub %xmm2, %xmm0
400; SSE-NEXT: pmaxub %xmm3, %xmm1
401; SSE-NEXT: retq
402;
403; AVX1-LABEL: max_gt_v32i8:
404; AVX1: # BB#0:
405; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
406; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
407; AVX1-NEXT: vpmaxub %xmm2, %xmm3, %xmm2
408; AVX1-NEXT: vpmaxub %xmm1, %xmm0, %xmm0
409; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
410; AVX1-NEXT: retq
411;
412; AVX2-LABEL: max_gt_v32i8:
413; AVX2: # BB#0:
414; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
415; AVX2-NEXT: retq
416;
417; AVX512-LABEL: max_gt_v32i8:
418; AVX512: # BB#0:
419; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
420; AVX512-NEXT: retq
421 %1 = icmp ugt <32 x i8> %a, %b
422 %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b
423 ret <32 x i8> %2
424}
425
426;
427; Unsigned Maximum (GE)
428;
429
430define <2 x i64> @max_ge_v2i64(<2 x i64> %a, <2 x i64> %b) {
431; SSE2-LABEL: max_ge_v2i64:
432; SSE2: # BB#0:
433; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
434; SSE2-NEXT: movdqa %xmm0, %xmm3
435; SSE2-NEXT: pxor %xmm2, %xmm3
436; SSE2-NEXT: pxor %xmm1, %xmm2
437; SSE2-NEXT: movdqa %xmm2, %xmm4
438; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
439; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
440; SSE2-NEXT: pcmpeqd %xmm3, %xmm2
441; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
442; SSE2-NEXT: pand %xmm5, %xmm2
443; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
444; SSE2-NEXT: por %xmm2, %xmm3
445; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
446; SSE2-NEXT: pxor %xmm3, %xmm2
447; SSE2-NEXT: pandn %xmm0, %xmm3
448; SSE2-NEXT: pandn %xmm1, %xmm2
449; SSE2-NEXT: por %xmm3, %xmm2
450; SSE2-NEXT: movdqa %xmm2, %xmm0
451; SSE2-NEXT: retq
452;
453; SSE41-LABEL: max_ge_v2i64:
454; SSE41: # BB#0:
455; SSE41-NEXT: movdqa %xmm0, %xmm2
456; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
457; SSE41-NEXT: movdqa %xmm2, %xmm3
458; SSE41-NEXT: pxor %xmm0, %xmm3
459; SSE41-NEXT: pxor %xmm1, %xmm0
460; SSE41-NEXT: movdqa %xmm0, %xmm4
461; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
462; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
463; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
464; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
465; SSE41-NEXT: pand %xmm5, %xmm0
466; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
467; SSE41-NEXT: por %xmm0, %xmm3
468; SSE41-NEXT: pcmpeqd %xmm0, %xmm0
469; SSE41-NEXT: pxor %xmm3, %xmm0
470; SSE41-NEXT: blendvpd %xmm2, %xmm1
471; SSE41-NEXT: movapd %xmm1, %xmm0
472; SSE41-NEXT: retq
473;
474; SSE42-LABEL: max_ge_v2i64:
475; SSE42: # BB#0:
476; SSE42-NEXT: movdqa %xmm0, %xmm2
477; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
478; SSE42-NEXT: pxor %xmm3, %xmm0
479; SSE42-NEXT: pxor %xmm1, %xmm3
480; SSE42-NEXT: pcmpgtq %xmm0, %xmm3
481; SSE42-NEXT: pcmpeqd %xmm0, %xmm0
482; SSE42-NEXT: pxor %xmm3, %xmm0
483; SSE42-NEXT: blendvpd %xmm2, %xmm1
484; SSE42-NEXT: movapd %xmm1, %xmm0
485; SSE42-NEXT: retq
486;
487; AVX-LABEL: max_ge_v2i64:
488; AVX: # BB#0:
489; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
490; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm3
491; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm2
492; AVX-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2
493; AVX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
494; AVX-NEXT: vpxor %xmm3, %xmm2, %xmm2
495; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
496; AVX-NEXT: retq
497 %1 = icmp uge <2 x i64> %a, %b
498 %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b
499 ret <2 x i64> %2
500}
501
502define <4 x i64> @max_ge_v4i64(<4 x i64> %a, <4 x i64> %b) {
503; SSE2-LABEL: max_ge_v4i64:
504; SSE2: # BB#0:
505; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,2147483648,2147483648,2147483648]
506; SSE2-NEXT: movdqa %xmm1, %xmm4
507; SSE2-NEXT: pxor %xmm7, %xmm4
508; SSE2-NEXT: movdqa %xmm3, %xmm5
509; SSE2-NEXT: pxor %xmm7, %xmm5
510; SSE2-NEXT: movdqa %xmm5, %xmm6
511; SSE2-NEXT: pcmpgtd %xmm4, %xmm6
512; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm6[0,0,2,2]
513; SSE2-NEXT: pcmpeqd %xmm4, %xmm5
514; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
515; SSE2-NEXT: pand %xmm8, %xmm4
516; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm6[1,1,3,3]
517; SSE2-NEXT: por %xmm4, %xmm8
518; SSE2-NEXT: pcmpeqd %xmm4, %xmm4
519; SSE2-NEXT: movdqa %xmm8, %xmm9
520; SSE2-NEXT: pxor %xmm4, %xmm9
521; SSE2-NEXT: movdqa %xmm0, %xmm6
522; SSE2-NEXT: pxor %xmm7, %xmm6
523; SSE2-NEXT: pxor %xmm2, %xmm7
524; SSE2-NEXT: movdqa %xmm7, %xmm5
525; SSE2-NEXT: pcmpgtd %xmm6, %xmm5
526; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm5[0,0,2,2]
527; SSE2-NEXT: pcmpeqd %xmm6, %xmm7
528; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
529; SSE2-NEXT: pand %xmm10, %xmm6
530; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
531; SSE2-NEXT: por %xmm6, %xmm5
532; SSE2-NEXT: pxor %xmm5, %xmm4
533; SSE2-NEXT: pandn %xmm0, %xmm5
534; SSE2-NEXT: pandn %xmm2, %xmm4
535; SSE2-NEXT: por %xmm5, %xmm4
536; SSE2-NEXT: pandn %xmm1, %xmm8
537; SSE2-NEXT: pandn %xmm3, %xmm9
538; SSE2-NEXT: por %xmm8, %xmm9
539; SSE2-NEXT: movdqa %xmm4, %xmm0
540; SSE2-NEXT: movdqa %xmm9, %xmm1
541; SSE2-NEXT: retq
542;
543; SSE41-LABEL: max_ge_v4i64:
544; SSE41: # BB#0:
545; SSE41-NEXT: movdqa %xmm0, %xmm8
546; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
547; SSE41-NEXT: movdqa %xmm1, %xmm5
548; SSE41-NEXT: pxor %xmm0, %xmm5
549; SSE41-NEXT: movdqa %xmm3, %xmm6
550; SSE41-NEXT: pxor %xmm0, %xmm6
551; SSE41-NEXT: movdqa %xmm6, %xmm7
552; SSE41-NEXT: pcmpgtd %xmm5, %xmm7
553; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
554; SSE41-NEXT: pcmpeqd %xmm5, %xmm6
555; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
556; SSE41-NEXT: pand %xmm4, %xmm6
557; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3]
558; SSE41-NEXT: por %xmm6, %xmm5
559; SSE41-NEXT: pcmpeqd %xmm9, %xmm9
560; SSE41-NEXT: pxor %xmm9, %xmm5
561; SSE41-NEXT: movdqa %xmm8, %xmm6
562; SSE41-NEXT: pxor %xmm0, %xmm6
563; SSE41-NEXT: pxor %xmm2, %xmm0
564; SSE41-NEXT: movdqa %xmm0, %xmm7
565; SSE41-NEXT: pcmpgtd %xmm6, %xmm7
566; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
567; SSE41-NEXT: pcmpeqd %xmm6, %xmm0
568; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
569; SSE41-NEXT: pand %xmm4, %xmm6
570; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
571; SSE41-NEXT: por %xmm6, %xmm0
572; SSE41-NEXT: pxor %xmm9, %xmm0
573; SSE41-NEXT: blendvpd %xmm8, %xmm2
574; SSE41-NEXT: movdqa %xmm5, %xmm0
575; SSE41-NEXT: blendvpd %xmm1, %xmm3
576; SSE41-NEXT: movapd %xmm2, %xmm0
577; SSE41-NEXT: movapd %xmm3, %xmm1
578; SSE41-NEXT: retq
579;
580; SSE42-LABEL: max_ge_v4i64:
581; SSE42: # BB#0:
582; SSE42-NEXT: movdqa %xmm0, %xmm4
583; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808]
584; SSE42-NEXT: movdqa %xmm1, %xmm6
585; SSE42-NEXT: pxor %xmm0, %xmm6
586; SSE42-NEXT: movdqa %xmm3, %xmm5
587; SSE42-NEXT: pxor %xmm0, %xmm5
588; SSE42-NEXT: pcmpgtq %xmm6, %xmm5
589; SSE42-NEXT: pcmpeqd %xmm6, %xmm6
590; SSE42-NEXT: pxor %xmm6, %xmm5
591; SSE42-NEXT: movdqa %xmm4, %xmm7
592; SSE42-NEXT: pxor %xmm0, %xmm7
593; SSE42-NEXT: pxor %xmm2, %xmm0
594; SSE42-NEXT: pcmpgtq %xmm7, %xmm0
595; SSE42-NEXT: pxor %xmm6, %xmm0
596; SSE42-NEXT: blendvpd %xmm4, %xmm2
597; SSE42-NEXT: movdqa %xmm5, %xmm0
598; SSE42-NEXT: blendvpd %xmm1, %xmm3
599; SSE42-NEXT: movapd %xmm2, %xmm0
600; SSE42-NEXT: movapd %xmm3, %xmm1
601; SSE42-NEXT: retq
602;
603; AVX1-LABEL: max_ge_v4i64:
604; AVX1: # BB#0:
605; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
606; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
607; AVX1-NEXT: vxorps %xmm3, %xmm2, %xmm2
608; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
609; AVX1-NEXT: vxorps %xmm3, %xmm4, %xmm4
610; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm2
611; AVX1-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
612; AVX1-NEXT: vpxor %xmm4, %xmm2, %xmm2
613; AVX1-NEXT: vxorps %xmm3, %xmm0, %xmm5
614; AVX1-NEXT: vxorps %xmm3, %xmm1, %xmm3
615; AVX1-NEXT: vpcmpgtq %xmm5, %xmm3, %xmm3
616; AVX1-NEXT: vpxor %xmm4, %xmm3, %xmm3
617; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2
618; AVX1-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
619; AVX1-NEXT: retq
620;
621; AVX2-LABEL: max_ge_v4i64:
622; AVX2: # BB#0:
623; AVX2-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
624; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm3
625; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm2
626; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2
627; AVX2-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3
628; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
629; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
630; AVX2-NEXT: retq
631;
632; AVX512-LABEL: max_ge_v4i64:
633; AVX512: # BB#0:
634; AVX512-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
635; AVX512-NEXT: vpxor %ymm2, %ymm0, %ymm3
636; AVX512-NEXT: vpxor %ymm2, %ymm1, %ymm2
637; AVX512-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2
638; AVX512-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3
639; AVX512-NEXT: vpxor %ymm3, %ymm2, %ymm2
640; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
641; AVX512-NEXT: retq
642 %1 = icmp uge <4 x i64> %a, %b
643 %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b
644 ret <4 x i64> %2
645}
646
647define <4 x i32> @max_ge_v4i32(<4 x i32> %a, <4 x i32> %b) {
648; SSE2-LABEL: max_ge_v4i32:
649; SSE2: # BB#0:
650; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [2147483648,2147483648,2147483648,2147483648]
651; SSE2-NEXT: movdqa %xmm0, %xmm2
652; SSE2-NEXT: pxor %xmm3, %xmm2
653; SSE2-NEXT: pxor %xmm1, %xmm3
654; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
655; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
656; SSE2-NEXT: pxor %xmm3, %xmm2
657; SSE2-NEXT: pandn %xmm0, %xmm3
658; SSE2-NEXT: pandn %xmm1, %xmm2
659; SSE2-NEXT: por %xmm3, %xmm2
660; SSE2-NEXT: movdqa %xmm2, %xmm0
661; SSE2-NEXT: retq
662;
663; SSE41-LABEL: max_ge_v4i32:
664; SSE41: # BB#0:
665; SSE41-NEXT: pmaxud %xmm1, %xmm0
666; SSE41-NEXT: retq
667;
668; SSE42-LABEL: max_ge_v4i32:
669; SSE42: # BB#0:
670; SSE42-NEXT: pmaxud %xmm1, %xmm0
671; SSE42-NEXT: retq
672;
673; AVX-LABEL: max_ge_v4i32:
674; AVX: # BB#0:
675; AVX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0
676; AVX-NEXT: retq
677 %1 = icmp uge <4 x i32> %a, %b
678 %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b
679 ret <4 x i32> %2
680}
681
682define <8 x i32> @max_ge_v8i32(<8 x i32> %a, <8 x i32> %b) {
683; SSE2-LABEL: max_ge_v8i32:
684; SSE2: # BB#0:
685; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [2147483648,2147483648,2147483648,2147483648]
686; SSE2-NEXT: movdqa %xmm1, %xmm4
687; SSE2-NEXT: pxor %xmm6, %xmm4
688; SSE2-NEXT: movdqa %xmm3, %xmm7
689; SSE2-NEXT: pxor %xmm6, %xmm7
690; SSE2-NEXT: pcmpgtd %xmm4, %xmm7
691; SSE2-NEXT: pcmpeqd %xmm4, %xmm4
692; SSE2-NEXT: movdqa %xmm7, %xmm5
693; SSE2-NEXT: pxor %xmm4, %xmm5
694; SSE2-NEXT: movdqa %xmm0, %xmm8
695; SSE2-NEXT: pxor %xmm6, %xmm8
696; SSE2-NEXT: pxor %xmm2, %xmm6
697; SSE2-NEXT: pcmpgtd %xmm8, %xmm6
698; SSE2-NEXT: pxor %xmm6, %xmm4
699; SSE2-NEXT: pandn %xmm0, %xmm6
700; SSE2-NEXT: pandn %xmm2, %xmm4
701; SSE2-NEXT: por %xmm6, %xmm4
702; SSE2-NEXT: pandn %xmm1, %xmm7
703; SSE2-NEXT: pandn %xmm3, %xmm5
704; SSE2-NEXT: por %xmm7, %xmm5
705; SSE2-NEXT: movdqa %xmm4, %xmm0
706; SSE2-NEXT: movdqa %xmm5, %xmm1
707; SSE2-NEXT: retq
708;
709; SSE41-LABEL: max_ge_v8i32:
710; SSE41: # BB#0:
711; SSE41-NEXT: pmaxud %xmm2, %xmm0
712; SSE41-NEXT: pmaxud %xmm3, %xmm1
713; SSE41-NEXT: retq
714;
715; SSE42-LABEL: max_ge_v8i32:
716; SSE42: # BB#0:
717; SSE42-NEXT: pmaxud %xmm2, %xmm0
718; SSE42-NEXT: pmaxud %xmm3, %xmm1
719; SSE42-NEXT: retq
720;
721; AVX1-LABEL: max_ge_v8i32:
722; AVX1: # BB#0:
723; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
724; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
725; AVX1-NEXT: vpmaxud %xmm2, %xmm3, %xmm2
726; AVX1-NEXT: vpmaxud %xmm1, %xmm0, %xmm0
727; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
728; AVX1-NEXT: retq
729;
730; AVX2-LABEL: max_ge_v8i32:
731; AVX2: # BB#0:
732; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
733; AVX2-NEXT: retq
734;
735; AVX512-LABEL: max_ge_v8i32:
736; AVX512: # BB#0:
737; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
738; AVX512-NEXT: retq
739 %1 = icmp uge <8 x i32> %a, %b
740 %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b
741 ret <8 x i32> %2
742}
743
744define <8 x i16> @max_ge_v8i16(<8 x i16> %a, <8 x i16> %b) {
745; SSE2-LABEL: max_ge_v8i16:
746; SSE2: # BB#0:
747; SSE2-NEXT: movdqa %xmm1, %xmm2
748; SSE2-NEXT: psubusw %xmm0, %xmm2
749; SSE2-NEXT: pxor %xmm3, %xmm3
750; SSE2-NEXT: pcmpeqw %xmm2, %xmm3
751; SSE2-NEXT: pand %xmm3, %xmm0
752; SSE2-NEXT: pandn %xmm1, %xmm3
753; SSE2-NEXT: por %xmm3, %xmm0
754; SSE2-NEXT: retq
755;
756; SSE41-LABEL: max_ge_v8i16:
757; SSE41: # BB#0:
758; SSE41-NEXT: pmaxuw %xmm1, %xmm0
759; SSE41-NEXT: retq
760;
761; SSE42-LABEL: max_ge_v8i16:
762; SSE42: # BB#0:
763; SSE42-NEXT: pmaxuw %xmm1, %xmm0
764; SSE42-NEXT: retq
765;
766; AVX-LABEL: max_ge_v8i16:
767; AVX: # BB#0:
768; AVX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0
769; AVX-NEXT: retq
770 %1 = icmp uge <8 x i16> %a, %b
771 %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b
772 ret <8 x i16> %2
773}
774
775define <16 x i16> @max_ge_v16i16(<16 x i16> %a, <16 x i16> %b) {
776; SSE2-LABEL: max_ge_v16i16:
777; SSE2: # BB#0:
778; SSE2-NEXT: movdqa %xmm3, %xmm4
779; SSE2-NEXT: psubusw %xmm1, %xmm4
780; SSE2-NEXT: pxor %xmm5, %xmm5
781; SSE2-NEXT: pcmpeqw %xmm5, %xmm4
782; SSE2-NEXT: movdqa %xmm2, %xmm6
783; SSE2-NEXT: psubusw %xmm0, %xmm6
784; SSE2-NEXT: pcmpeqw %xmm5, %xmm6
785; SSE2-NEXT: pand %xmm6, %xmm0
786; SSE2-NEXT: pandn %xmm2, %xmm6
787; SSE2-NEXT: por %xmm6, %xmm0
788; SSE2-NEXT: pand %xmm4, %xmm1
789; SSE2-NEXT: pandn %xmm3, %xmm4
790; SSE2-NEXT: por %xmm4, %xmm1
791; SSE2-NEXT: retq
792;
793; SSE41-LABEL: max_ge_v16i16:
794; SSE41: # BB#0:
795; SSE41-NEXT: pmaxuw %xmm2, %xmm0
796; SSE41-NEXT: pmaxuw %xmm3, %xmm1
797; SSE41-NEXT: retq
798;
799; SSE42-LABEL: max_ge_v16i16:
800; SSE42: # BB#0:
801; SSE42-NEXT: pmaxuw %xmm2, %xmm0
802; SSE42-NEXT: pmaxuw %xmm3, %xmm1
803; SSE42-NEXT: retq
804;
805; AVX1-LABEL: max_ge_v16i16:
806; AVX1: # BB#0:
807; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
808; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
809; AVX1-NEXT: vpmaxuw %xmm2, %xmm3, %xmm2
810; AVX1-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0
811; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
812; AVX1-NEXT: retq
813;
814; AVX2-LABEL: max_ge_v16i16:
815; AVX2: # BB#0:
816; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
817; AVX2-NEXT: retq
818;
819; AVX512-LABEL: max_ge_v16i16:
820; AVX512: # BB#0:
821; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
822; AVX512-NEXT: retq
823 %1 = icmp uge <16 x i16> %a, %b
824 %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b
825 ret <16 x i16> %2
826}
827
828define <16 x i8> @max_ge_v16i8(<16 x i8> %a, <16 x i8> %b) {
829; SSE-LABEL: max_ge_v16i8:
830; SSE: # BB#0:
831; SSE-NEXT: pmaxub %xmm1, %xmm0
832; SSE-NEXT: retq
833;
834; AVX-LABEL: max_ge_v16i8:
835; AVX: # BB#0:
836; AVX-NEXT: vpmaxub %xmm1, %xmm0, %xmm0
837; AVX-NEXT: retq
838 %1 = icmp uge <16 x i8> %a, %b
839 %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b
840 ret <16 x i8> %2
841}
842
843define <32 x i8> @max_ge_v32i8(<32 x i8> %a, <32 x i8> %b) {
844; SSE-LABEL: max_ge_v32i8:
845; SSE: # BB#0:
846; SSE-NEXT: pmaxub %xmm2, %xmm0
847; SSE-NEXT: pmaxub %xmm3, %xmm1
848; SSE-NEXT: retq
849;
850; AVX1-LABEL: max_ge_v32i8:
851; AVX1: # BB#0:
852; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
853; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
854; AVX1-NEXT: vpmaxub %xmm2, %xmm3, %xmm2
855; AVX1-NEXT: vpmaxub %xmm1, %xmm0, %xmm0
856; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
857; AVX1-NEXT: retq
858;
859; AVX2-LABEL: max_ge_v32i8:
860; AVX2: # BB#0:
861; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
862; AVX2-NEXT: retq
863;
864; AVX512-LABEL: max_ge_v32i8:
865; AVX512: # BB#0:
866; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
867; AVX512-NEXT: retq
868 %1 = icmp uge <32 x i8> %a, %b
869 %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b
870 ret <32 x i8> %2
871}
872
873;
874; Unsigned Minimum (LT)
875;
876
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]877define <2 x i64> @min_lt_v2i64(<2 x i64> %a, <2 x i64> %b) {
878; SSE2-LABEL: min_lt_v2i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]879; SSE2: # BB#0:
880; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
881; SSE2-NEXT: movdqa %xmm0, %xmm3
882; SSE2-NEXT: pxor %xmm2, %xmm3
883; SSE2-NEXT: pxor %xmm1, %xmm2
884; SSE2-NEXT: movdqa %xmm2, %xmm4
885; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
886; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
887; SSE2-NEXT: pcmpeqd %xmm3, %xmm2
888; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
889; SSE2-NEXT: pand %xmm5, %xmm2
890; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
891; SSE2-NEXT: por %xmm2, %xmm3
892; SSE2-NEXT: pand %xmm3, %xmm0
893; SSE2-NEXT: pandn %xmm1, %xmm3
894; SSE2-NEXT: por %xmm3, %xmm0
895; SSE2-NEXT: retq
896;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]897; SSE41-LABEL: min_lt_v2i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]898; SSE41: # BB#0:
899; SSE41-NEXT: movdqa %xmm0, %xmm2
900; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
901; SSE41-NEXT: movdqa %xmm2, %xmm3
902; SSE41-NEXT: pxor %xmm0, %xmm3
903; SSE41-NEXT: pxor %xmm1, %xmm0
904; SSE41-NEXT: movdqa %xmm0, %xmm4
905; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
906; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
907; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
908; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
909; SSE41-NEXT: pand %xmm5, %xmm3
910; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
911; SSE41-NEXT: por %xmm3, %xmm0
912; SSE41-NEXT: blendvpd %xmm2, %xmm1
913; SSE41-NEXT: movapd %xmm1, %xmm0
914; SSE41-NEXT: retq
915;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]916; SSE42-LABEL: min_lt_v2i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]917; SSE42: # BB#0:
918; SSE42-NEXT: movdqa %xmm0, %xmm2
919; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808]
920; SSE42-NEXT: movdqa %xmm2, %xmm3
921; SSE42-NEXT: pxor %xmm0, %xmm3
922; SSE42-NEXT: pxor %xmm1, %xmm0
923; SSE42-NEXT: pcmpgtq %xmm3, %xmm0
924; SSE42-NEXT: blendvpd %xmm2, %xmm1
925; SSE42-NEXT: movapd %xmm1, %xmm0
926; SSE42-NEXT: retq
927;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]928; AVX-LABEL: min_lt_v2i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]929; AVX: # BB#0:
930; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
931; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm3
932; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm2
933; AVX-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2
934; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
935; AVX-NEXT: retq
936 %1 = icmp ult <2 x i64> %a, %b
937 %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b
938 ret <2 x i64> %2
939}
940
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]941define <4 x i64> @min_lt_v4i64(<4 x i64> %a, <4 x i64> %b) {
942; SSE2-LABEL: min_lt_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]943; SSE2: # BB#0:
944; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]
945; SSE2-NEXT: movdqa %xmm1, %xmm5
946; SSE2-NEXT: pxor %xmm4, %xmm5
947; SSE2-NEXT: movdqa %xmm3, %xmm6
948; SSE2-NEXT: pxor %xmm4, %xmm6
949; SSE2-NEXT: movdqa %xmm6, %xmm7
950; SSE2-NEXT: pcmpgtd %xmm5, %xmm7
951; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2]
952; SSE2-NEXT: pcmpeqd %xmm5, %xmm6
953; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
954; SSE2-NEXT: pand %xmm8, %xmm5
955; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
956; SSE2-NEXT: por %xmm5, %xmm6
957; SSE2-NEXT: movdqa %xmm0, %xmm5
958; SSE2-NEXT: pxor %xmm4, %xmm5
959; SSE2-NEXT: pxor %xmm2, %xmm4
960; SSE2-NEXT: movdqa %xmm4, %xmm7
961; SSE2-NEXT: pcmpgtd %xmm5, %xmm7
962; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2]
963; SSE2-NEXT: pcmpeqd %xmm5, %xmm4
964; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
965; SSE2-NEXT: pand %xmm8, %xmm4
966; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3]
967; SSE2-NEXT: por %xmm4, %xmm5
968; SSE2-NEXT: pand %xmm5, %xmm0
969; SSE2-NEXT: pandn %xmm2, %xmm5
970; SSE2-NEXT: por %xmm5, %xmm0
971; SSE2-NEXT: pand %xmm6, %xmm1
972; SSE2-NEXT: pandn %xmm3, %xmm6
973; SSE2-NEXT: por %xmm6, %xmm1
974; SSE2-NEXT: retq
975;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]976; SSE41-LABEL: min_lt_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]977; SSE41: # BB#0:
978; SSE41-NEXT: movdqa %xmm0, %xmm8
979; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
980; SSE41-NEXT: movdqa %xmm1, %xmm5
981; SSE41-NEXT: pxor %xmm0, %xmm5
982; SSE41-NEXT: movdqa %xmm3, %xmm6
983; SSE41-NEXT: pxor %xmm0, %xmm6
984; SSE41-NEXT: movdqa %xmm6, %xmm7
985; SSE41-NEXT: pcmpgtd %xmm5, %xmm7
986; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
987; SSE41-NEXT: pcmpeqd %xmm5, %xmm6
988; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
989; SSE41-NEXT: pand %xmm4, %xmm6
990; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3]
991; SSE41-NEXT: por %xmm6, %xmm5
992; SSE41-NEXT: movdqa %xmm8, %xmm4
993; SSE41-NEXT: pxor %xmm0, %xmm4
994; SSE41-NEXT: pxor %xmm2, %xmm0
995; SSE41-NEXT: movdqa %xmm0, %xmm6
996; SSE41-NEXT: pcmpgtd %xmm4, %xmm6
997; SSE41-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
998; SSE41-NEXT: pcmpeqd %xmm4, %xmm0
999; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
1000; SSE41-NEXT: pand %xmm7, %xmm4
1001; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
1002; SSE41-NEXT: por %xmm4, %xmm0
1003; SSE41-NEXT: blendvpd %xmm8, %xmm2
1004; SSE41-NEXT: movdqa %xmm5, %xmm0
1005; SSE41-NEXT: blendvpd %xmm1, %xmm3
1006; SSE41-NEXT: movapd %xmm2, %xmm0
1007; SSE41-NEXT: movapd %xmm3, %xmm1
1008; SSE41-NEXT: retq
1009;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1010; SSE42-LABEL: min_lt_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1011; SSE42: # BB#0:
1012; SSE42-NEXT: movdqa %xmm0, %xmm4
1013; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808]
1014; SSE42-NEXT: movdqa %xmm1, %xmm6
1015; SSE42-NEXT: pxor %xmm0, %xmm6
1016; SSE42-NEXT: movdqa %xmm3, %xmm5
1017; SSE42-NEXT: pxor %xmm0, %xmm5
1018; SSE42-NEXT: pcmpgtq %xmm6, %xmm5
1019; SSE42-NEXT: movdqa %xmm4, %xmm6
1020; SSE42-NEXT: pxor %xmm0, %xmm6
1021; SSE42-NEXT: pxor %xmm2, %xmm0
1022; SSE42-NEXT: pcmpgtq %xmm6, %xmm0
1023; SSE42-NEXT: blendvpd %xmm4, %xmm2
1024; SSE42-NEXT: movdqa %xmm5, %xmm0
1025; SSE42-NEXT: blendvpd %xmm1, %xmm3
1026; SSE42-NEXT: movapd %xmm2, %xmm0
1027; SSE42-NEXT: movapd %xmm3, %xmm1
1028; SSE42-NEXT: retq
1029;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1030; AVX1-LABEL: min_lt_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1031; AVX1: # BB#0:
1032; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
1033; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
1034; AVX1-NEXT: vxorps %xmm3, %xmm2, %xmm2
1035; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
1036; AVX1-NEXT: vxorps %xmm3, %xmm4, %xmm4
1037; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm2
1038; AVX1-NEXT: vxorps %xmm3, %xmm0, %xmm4
1039; AVX1-NEXT: vxorps %xmm3, %xmm1, %xmm3
1040; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3
1041; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2
1042; AVX1-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
1043; AVX1-NEXT: retq
1044;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1045; AVX2-LABEL: min_lt_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1046; AVX2: # BB#0:
1047; AVX2-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
1048; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm3
1049; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm2
1050; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2
1051; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
1052; AVX2-NEXT: retq
1053;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1054; AVX512-LABEL: min_lt_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1055; AVX512: # BB#0:
1056; AVX512-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
1057; AVX512-NEXT: vpxor %ymm2, %ymm0, %ymm3
1058; AVX512-NEXT: vpxor %ymm2, %ymm1, %ymm2
1059; AVX512-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2
1060; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
1061; AVX512-NEXT: retq
1062 %1 = icmp ult <4 x i64> %a, %b
1063 %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b
1064 ret <4 x i64> %2
1065}
1066
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1067define <4 x i32> @min_lt_v4i32(<4 x i32> %a, <4 x i32> %b) {
1068; SSE2-LABEL: min_lt_v4i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1069; SSE2: # BB#0:
1070; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
1071; SSE2-NEXT: movdqa %xmm0, %xmm3
1072; SSE2-NEXT: pxor %xmm2, %xmm3
1073; SSE2-NEXT: pxor %xmm1, %xmm2
1074; SSE2-NEXT: pcmpgtd %xmm3, %xmm2
1075; SSE2-NEXT: pand %xmm2, %xmm0
1076; SSE2-NEXT: pandn %xmm1, %xmm2
1077; SSE2-NEXT: por %xmm2, %xmm0
1078; SSE2-NEXT: retq
1079;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1080; SSE41-LABEL: min_lt_v4i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1081; SSE41: # BB#0:
1082; SSE41-NEXT: pminud %xmm1, %xmm0
1083; SSE41-NEXT: retq
1084;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1085; SSE42-LABEL: min_lt_v4i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1086; SSE42: # BB#0:
1087; SSE42-NEXT: pminud %xmm1, %xmm0
1088; SSE42-NEXT: retq
1089;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1090; AVX-LABEL: min_lt_v4i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1091; AVX: # BB#0:
1092; AVX-NEXT: vpminud %xmm1, %xmm0, %xmm0
1093; AVX-NEXT: retq
1094 %1 = icmp ult <4 x i32> %a, %b
1095 %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b
1096 ret <4 x i32> %2
1097}
1098
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1099define <8 x i32> @min_lt_v8i32(<8 x i32> %a, <8 x i32> %b) {
1100; SSE2-LABEL: min_lt_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1101; SSE2: # BB#0:
1102; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]
1103; SSE2-NEXT: movdqa %xmm1, %xmm5
1104; SSE2-NEXT: pxor %xmm4, %xmm5
1105; SSE2-NEXT: movdqa %xmm3, %xmm6
1106; SSE2-NEXT: pxor %xmm4, %xmm6
1107; SSE2-NEXT: pcmpgtd %xmm5, %xmm6
1108; SSE2-NEXT: movdqa %xmm0, %xmm5
1109; SSE2-NEXT: pxor %xmm4, %xmm5
1110; SSE2-NEXT: pxor %xmm2, %xmm4
1111; SSE2-NEXT: pcmpgtd %xmm5, %xmm4
1112; SSE2-NEXT: pand %xmm4, %xmm0
1113; SSE2-NEXT: pandn %xmm2, %xmm4
1114; SSE2-NEXT: por %xmm4, %xmm0
1115; SSE2-NEXT: pand %xmm6, %xmm1
1116; SSE2-NEXT: pandn %xmm3, %xmm6
1117; SSE2-NEXT: por %xmm6, %xmm1
1118; SSE2-NEXT: retq
1119;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1120; SSE41-LABEL: min_lt_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1121; SSE41: # BB#0:
1122; SSE41-NEXT: pminud %xmm2, %xmm0
1123; SSE41-NEXT: pminud %xmm3, %xmm1
1124; SSE41-NEXT: retq
1125;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1126; SSE42-LABEL: min_lt_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1127; SSE42: # BB#0:
1128; SSE42-NEXT: pminud %xmm2, %xmm0
1129; SSE42-NEXT: pminud %xmm3, %xmm1
1130; SSE42-NEXT: retq
1131;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1132; AVX1-LABEL: min_lt_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1133; AVX1: # BB#0:
1134; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
1135; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
1136; AVX1-NEXT: vpminud %xmm2, %xmm3, %xmm2
1137; AVX1-NEXT: vpminud %xmm1, %xmm0, %xmm0
1138; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1139; AVX1-NEXT: retq
1140;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1141; AVX2-LABEL: min_lt_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1142; AVX2: # BB#0:
1143; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0
1144; AVX2-NEXT: retq
1145;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1146; AVX512-LABEL: min_lt_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1147; AVX512: # BB#0:
1148; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm0
1149; AVX512-NEXT: retq
1150 %1 = icmp ult <8 x i32> %a, %b
1151 %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b
1152 ret <8 x i32> %2
1153}
1154
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1155define <8 x i16> @min_lt_v8i16(<8 x i16> %a, <8 x i16> %b) {
1156; SSE2-LABEL: min_lt_v8i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1157; SSE2: # BB#0:
1158; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
1159; SSE2-NEXT: movdqa %xmm0, %xmm3
1160; SSE2-NEXT: pxor %xmm2, %xmm3
1161; SSE2-NEXT: pxor %xmm1, %xmm2
1162; SSE2-NEXT: pcmpgtw %xmm3, %xmm2
1163; SSE2-NEXT: pand %xmm2, %xmm0
1164; SSE2-NEXT: pandn %xmm1, %xmm2
1165; SSE2-NEXT: por %xmm2, %xmm0
1166; SSE2-NEXT: retq
1167;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1168; SSE41-LABEL: min_lt_v8i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1169; SSE41: # BB#0:
1170; SSE41-NEXT: pminuw %xmm1, %xmm0
1171; SSE41-NEXT: retq
1172;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1173; SSE42-LABEL: min_lt_v8i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1174; SSE42: # BB#0:
1175; SSE42-NEXT: pminuw %xmm1, %xmm0
1176; SSE42-NEXT: retq
1177;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1178; AVX-LABEL: min_lt_v8i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1179; AVX: # BB#0:
1180; AVX-NEXT: vpminuw %xmm1, %xmm0, %xmm0
1181; AVX-NEXT: retq
1182 %1 = icmp ult <8 x i16> %a, %b
1183 %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b
1184 ret <8 x i16> %2
1185}
1186
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1187define <16 x i16> @min_lt_v16i16(<16 x i16> %a, <16 x i16> %b) {
1188; SSE2-LABEL: min_lt_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1189; SSE2: # BB#0:
1190; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [32768,32768,32768,32768,32768,32768,32768,32768]
1191; SSE2-NEXT: movdqa %xmm1, %xmm5
1192; SSE2-NEXT: pxor %xmm4, %xmm5
1193; SSE2-NEXT: movdqa %xmm3, %xmm6
1194; SSE2-NEXT: pxor %xmm4, %xmm6
1195; SSE2-NEXT: pcmpgtw %xmm5, %xmm6
1196; SSE2-NEXT: movdqa %xmm0, %xmm5
1197; SSE2-NEXT: pxor %xmm4, %xmm5
1198; SSE2-NEXT: pxor %xmm2, %xmm4
1199; SSE2-NEXT: pcmpgtw %xmm5, %xmm4
1200; SSE2-NEXT: pand %xmm4, %xmm0
1201; SSE2-NEXT: pandn %xmm2, %xmm4
1202; SSE2-NEXT: por %xmm4, %xmm0
1203; SSE2-NEXT: pand %xmm6, %xmm1
1204; SSE2-NEXT: pandn %xmm3, %xmm6
1205; SSE2-NEXT: por %xmm6, %xmm1
1206; SSE2-NEXT: retq
1207;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1208; SSE41-LABEL: min_lt_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1209; SSE41: # BB#0:
1210; SSE41-NEXT: pminuw %xmm2, %xmm0
1211; SSE41-NEXT: pminuw %xmm3, %xmm1
1212; SSE41-NEXT: retq
1213;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1214; SSE42-LABEL: min_lt_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1215; SSE42: # BB#0:
1216; SSE42-NEXT: pminuw %xmm2, %xmm0
1217; SSE42-NEXT: pminuw %xmm3, %xmm1
1218; SSE42-NEXT: retq
1219;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1220; AVX1-LABEL: min_lt_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1221; AVX1: # BB#0:
1222; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
1223; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
1224; AVX1-NEXT: vpminuw %xmm2, %xmm3, %xmm2
1225; AVX1-NEXT: vpminuw %xmm1, %xmm0, %xmm0
1226; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1227; AVX1-NEXT: retq
1228;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1229; AVX2-LABEL: min_lt_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1230; AVX2: # BB#0:
1231; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0
1232; AVX2-NEXT: retq
1233;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1234; AVX512-LABEL: min_lt_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1235; AVX512: # BB#0:
1236; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm0
1237; AVX512-NEXT: retq
1238 %1 = icmp ult <16 x i16> %a, %b
1239 %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b
1240 ret <16 x i16> %2
1241}
1242
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1243define <16 x i8> @min_lt_v16i8(<16 x i8> %a, <16 x i8> %b) {
1244; SSE-LABEL: min_lt_v16i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1245; SSE: # BB#0:
1246; SSE-NEXT: pminub %xmm1, %xmm0
1247; SSE-NEXT: retq
1248;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1249; AVX-LABEL: min_lt_v16i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1250; AVX: # BB#0:
1251; AVX-NEXT: vpminub %xmm1, %xmm0, %xmm0
1252; AVX-NEXT: retq
1253 %1 = icmp ult <16 x i8> %a, %b
1254 %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b
1255 ret <16 x i8> %2
1256}
1257
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1258define <32 x i8> @min_lt_v32i8(<32 x i8> %a, <32 x i8> %b) {
1259; SSE-LABEL: min_lt_v32i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1260; SSE: # BB#0:
1261; SSE-NEXT: pminub %xmm2, %xmm0
1262; SSE-NEXT: pminub %xmm3, %xmm1
1263; SSE-NEXT: retq
1264;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1265; AVX1-LABEL: min_lt_v32i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1266; AVX1: # BB#0:
1267; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
1268; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
1269; AVX1-NEXT: vpminub %xmm2, %xmm3, %xmm2
1270; AVX1-NEXT: vpminub %xmm1, %xmm0, %xmm0
1271; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1272; AVX1-NEXT: retq
1273;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1274; AVX2-LABEL: min_lt_v32i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1275; AVX2: # BB#0:
1276; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0
1277; AVX2-NEXT: retq
1278;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1279; AVX512-LABEL: min_lt_v32i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1280; AVX512: # BB#0:
1281; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm0
1282; AVX512-NEXT: retq
1283 %1 = icmp ult <32 x i8> %a, %b
1284 %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b
1285 ret <32 x i8> %2
1286}
1287
1288;
1289; Unsigned Minimum (LE)
1290;
1291
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1292define <2 x i64> @min_le_v2i64(<2 x i64> %a, <2 x i64> %b) {
1293; SSE2-LABEL: min_le_v2i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1294; SSE2: # BB#0:
1295; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
1296; SSE2-NEXT: movdqa %xmm1, %xmm3
1297; SSE2-NEXT: pxor %xmm2, %xmm3
1298; SSE2-NEXT: pxor %xmm0, %xmm2
1299; SSE2-NEXT: movdqa %xmm2, %xmm4
1300; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
1301; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
1302; SSE2-NEXT: pcmpeqd %xmm3, %xmm2
1303; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
1304; SSE2-NEXT: pand %xmm5, %xmm2
1305; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
1306; SSE2-NEXT: por %xmm2, %xmm3
1307; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
1308; SSE2-NEXT: pxor %xmm3, %xmm2
1309; SSE2-NEXT: pandn %xmm0, %xmm3
1310; SSE2-NEXT: pandn %xmm1, %xmm2
1311; SSE2-NEXT: por %xmm3, %xmm2
1312; SSE2-NEXT: movdqa %xmm2, %xmm0
1313; SSE2-NEXT: retq
1314;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1315; SSE41-LABEL: min_le_v2i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1316; SSE41: # BB#0:
1317; SSE41-NEXT: movdqa %xmm0, %xmm2
1318; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
1319; SSE41-NEXT: movdqa %xmm1, %xmm3
1320; SSE41-NEXT: pxor %xmm0, %xmm3
1321; SSE41-NEXT: pxor %xmm2, %xmm0
1322; SSE41-NEXT: movdqa %xmm0, %xmm4
1323; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
1324; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
1325; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
1326; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
1327; SSE41-NEXT: pand %xmm5, %xmm0
1328; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
1329; SSE41-NEXT: por %xmm0, %xmm3
1330; SSE41-NEXT: pcmpeqd %xmm0, %xmm0
1331; SSE41-NEXT: pxor %xmm3, %xmm0
1332; SSE41-NEXT: blendvpd %xmm2, %xmm1
1333; SSE41-NEXT: movapd %xmm1, %xmm0
1334; SSE41-NEXT: retq
1335;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1336; SSE42-LABEL: min_le_v2i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1337; SSE42: # BB#0:
1338; SSE42-NEXT: movdqa %xmm0, %xmm2
1339; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
1340; SSE42-NEXT: movdqa %xmm1, %xmm0
1341; SSE42-NEXT: pxor %xmm3, %xmm0
1342; SSE42-NEXT: pxor %xmm2, %xmm3
1343; SSE42-NEXT: pcmpgtq %xmm0, %xmm3
1344; SSE42-NEXT: pcmpeqd %xmm0, %xmm0
1345; SSE42-NEXT: pxor %xmm3, %xmm0
1346; SSE42-NEXT: blendvpd %xmm2, %xmm1
1347; SSE42-NEXT: movapd %xmm1, %xmm0
1348; SSE42-NEXT: retq
1349;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1350; AVX-LABEL: min_le_v2i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1351; AVX: # BB#0:
1352; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
1353; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm3
1354; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm2
1355; AVX-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2
1356; AVX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
1357; AVX-NEXT: vpxor %xmm3, %xmm2, %xmm2
1358; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
1359; AVX-NEXT: retq
1360 %1 = icmp ule <2 x i64> %a, %b
1361 %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b
1362 ret <2 x i64> %2
1363}
1364
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1365define <4 x i64> @min_le_v4i64(<4 x i64> %a, <4 x i64> %b) {
1366; SSE2-LABEL: min_le_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1367; SSE2: # BB#0:
1368; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,2147483648,2147483648,2147483648]
1369; SSE2-NEXT: movdqa %xmm3, %xmm4
1370; SSE2-NEXT: pxor %xmm7, %xmm4
1371; SSE2-NEXT: movdqa %xmm1, %xmm5
1372; SSE2-NEXT: pxor %xmm7, %xmm5
1373; SSE2-NEXT: movdqa %xmm5, %xmm6
1374; SSE2-NEXT: pcmpgtd %xmm4, %xmm6
1375; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm6[0,0,2,2]
1376; SSE2-NEXT: pcmpeqd %xmm4, %xmm5
1377; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
1378; SSE2-NEXT: pand %xmm8, %xmm4
1379; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm6[1,1,3,3]
1380; SSE2-NEXT: por %xmm4, %xmm8
1381; SSE2-NEXT: pcmpeqd %xmm4, %xmm4
1382; SSE2-NEXT: movdqa %xmm8, %xmm9
1383; SSE2-NEXT: pxor %xmm4, %xmm9
1384; SSE2-NEXT: movdqa %xmm2, %xmm6
1385; SSE2-NEXT: pxor %xmm7, %xmm6
1386; SSE2-NEXT: pxor %xmm0, %xmm7
1387; SSE2-NEXT: movdqa %xmm7, %xmm5
1388; SSE2-NEXT: pcmpgtd %xmm6, %xmm5
1389; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm5[0,0,2,2]
1390; SSE2-NEXT: pcmpeqd %xmm6, %xmm7
1391; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
1392; SSE2-NEXT: pand %xmm10, %xmm6
1393; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
1394; SSE2-NEXT: por %xmm6, %xmm5
1395; SSE2-NEXT: pxor %xmm5, %xmm4
1396; SSE2-NEXT: pandn %xmm0, %xmm5
1397; SSE2-NEXT: pandn %xmm2, %xmm4
1398; SSE2-NEXT: por %xmm5, %xmm4
1399; SSE2-NEXT: pandn %xmm1, %xmm8
1400; SSE2-NEXT: pandn %xmm3, %xmm9
1401; SSE2-NEXT: por %xmm8, %xmm9
1402; SSE2-NEXT: movdqa %xmm4, %xmm0
1403; SSE2-NEXT: movdqa %xmm9, %xmm1
1404; SSE2-NEXT: retq
1405;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1406; SSE41-LABEL: min_le_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1407; SSE41: # BB#0:
1408; SSE41-NEXT: movdqa %xmm0, %xmm8
1409; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
1410; SSE41-NEXT: movdqa %xmm3, %xmm5
1411; SSE41-NEXT: pxor %xmm0, %xmm5
1412; SSE41-NEXT: movdqa %xmm1, %xmm6
1413; SSE41-NEXT: pxor %xmm0, %xmm6
1414; SSE41-NEXT: movdqa %xmm6, %xmm7
1415; SSE41-NEXT: pcmpgtd %xmm5, %xmm7
1416; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
1417; SSE41-NEXT: pcmpeqd %xmm5, %xmm6
1418; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
1419; SSE41-NEXT: pand %xmm4, %xmm6
1420; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3]
1421; SSE41-NEXT: por %xmm6, %xmm5
1422; SSE41-NEXT: pcmpeqd %xmm9, %xmm9
1423; SSE41-NEXT: pxor %xmm9, %xmm5
1424; SSE41-NEXT: movdqa %xmm2, %xmm6
1425; SSE41-NEXT: pxor %xmm0, %xmm6
1426; SSE41-NEXT: pxor %xmm8, %xmm0
1427; SSE41-NEXT: movdqa %xmm0, %xmm7
1428; SSE41-NEXT: pcmpgtd %xmm6, %xmm7
1429; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
1430; SSE41-NEXT: pcmpeqd %xmm6, %xmm0
1431; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
1432; SSE41-NEXT: pand %xmm4, %xmm6
1433; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
1434; SSE41-NEXT: por %xmm6, %xmm0
1435; SSE41-NEXT: pxor %xmm9, %xmm0
1436; SSE41-NEXT: blendvpd %xmm8, %xmm2
1437; SSE41-NEXT: movdqa %xmm5, %xmm0
1438; SSE41-NEXT: blendvpd %xmm1, %xmm3
1439; SSE41-NEXT: movapd %xmm2, %xmm0
1440; SSE41-NEXT: movapd %xmm3, %xmm1
1441; SSE41-NEXT: retq
1442;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1443; SSE42-LABEL: min_le_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1444; SSE42: # BB#0:
1445; SSE42-NEXT: movdqa %xmm0, %xmm4
1446; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808]
1447; SSE42-NEXT: movdqa %xmm3, %xmm6
1448; SSE42-NEXT: pxor %xmm0, %xmm6
1449; SSE42-NEXT: movdqa %xmm1, %xmm5
1450; SSE42-NEXT: pxor %xmm0, %xmm5
1451; SSE42-NEXT: pcmpgtq %xmm6, %xmm5
1452; SSE42-NEXT: pcmpeqd %xmm6, %xmm6
1453; SSE42-NEXT: pxor %xmm6, %xmm5
1454; SSE42-NEXT: movdqa %xmm2, %xmm7
1455; SSE42-NEXT: pxor %xmm0, %xmm7
1456; SSE42-NEXT: pxor %xmm4, %xmm0
1457; SSE42-NEXT: pcmpgtq %xmm7, %xmm0
1458; SSE42-NEXT: pxor %xmm6, %xmm0
1459; SSE42-NEXT: blendvpd %xmm4, %xmm2
1460; SSE42-NEXT: movdqa %xmm5, %xmm0
1461; SSE42-NEXT: blendvpd %xmm1, %xmm3
1462; SSE42-NEXT: movapd %xmm2, %xmm0
1463; SSE42-NEXT: movapd %xmm3, %xmm1
1464; SSE42-NEXT: retq
1465;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1466; AVX1-LABEL: min_le_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1467; AVX1: # BB#0:
1468; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
1469; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
1470; AVX1-NEXT: vxorps %xmm3, %xmm2, %xmm2
1471; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4
1472; AVX1-NEXT: vxorps %xmm3, %xmm4, %xmm4
1473; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm2
1474; AVX1-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
1475; AVX1-NEXT: vpxor %xmm4, %xmm2, %xmm2
1476; AVX1-NEXT: vxorps %xmm3, %xmm1, %xmm5
1477; AVX1-NEXT: vxorps %xmm3, %xmm0, %xmm3
1478; AVX1-NEXT: vpcmpgtq %xmm5, %xmm3, %xmm3
1479; AVX1-NEXT: vpxor %xmm4, %xmm3, %xmm3
1480; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2
1481; AVX1-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
1482; AVX1-NEXT: retq
1483;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1484; AVX2-LABEL: min_le_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1485; AVX2: # BB#0:
1486; AVX2-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
1487; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3
1488; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm2
1489; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2
1490; AVX2-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3
1491; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
1492; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
1493; AVX2-NEXT: retq
1494;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1495; AVX512-LABEL: min_le_v4i64:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1496; AVX512: # BB#0:
1497; AVX512-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
1498; AVX512-NEXT: vpxor %ymm2, %ymm1, %ymm3
1499; AVX512-NEXT: vpxor %ymm2, %ymm0, %ymm2
1500; AVX512-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2
1501; AVX512-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3
1502; AVX512-NEXT: vpxor %ymm3, %ymm2, %ymm2
1503; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
1504; AVX512-NEXT: retq
1505 %1 = icmp ule <4 x i64> %a, %b
1506 %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b
1507 ret <4 x i64> %2
1508}
1509
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1510define <4 x i32> @min_le_v4i32(<4 x i32> %a, <4 x i32> %b) {
1511; SSE2-LABEL: min_le_v4i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1512; SSE2: # BB#0:
1513; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [2147483648,2147483648,2147483648,2147483648]
1514; SSE2-NEXT: movdqa %xmm1, %xmm2
1515; SSE2-NEXT: pxor %xmm3, %xmm2
1516; SSE2-NEXT: pxor %xmm0, %xmm3
1517; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
1518; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
1519; SSE2-NEXT: pxor %xmm3, %xmm2
1520; SSE2-NEXT: pandn %xmm0, %xmm3
1521; SSE2-NEXT: pandn %xmm1, %xmm2
1522; SSE2-NEXT: por %xmm3, %xmm2
1523; SSE2-NEXT: movdqa %xmm2, %xmm0
1524; SSE2-NEXT: retq
1525;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1526; SSE41-LABEL: min_le_v4i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1527; SSE41: # BB#0:
1528; SSE41-NEXT: pminud %xmm1, %xmm0
1529; SSE41-NEXT: retq
1530;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1531; SSE42-LABEL: min_le_v4i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1532; SSE42: # BB#0:
1533; SSE42-NEXT: pminud %xmm1, %xmm0
1534; SSE42-NEXT: retq
1535;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1536; AVX-LABEL: min_le_v4i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1537; AVX: # BB#0:
1538; AVX-NEXT: vpminud %xmm1, %xmm0, %xmm0
1539; AVX-NEXT: retq
1540 %1 = icmp ule <4 x i32> %a, %b
1541 %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b
1542 ret <4 x i32> %2
1543}
1544
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1545define <8 x i32> @min_le_v8i32(<8 x i32> %a, <8 x i32> %b) {
1546; SSE2-LABEL: min_le_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1547; SSE2: # BB#0:
1548; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [2147483648,2147483648,2147483648,2147483648]
1549; SSE2-NEXT: movdqa %xmm3, %xmm4
1550; SSE2-NEXT: pxor %xmm6, %xmm4
1551; SSE2-NEXT: movdqa %xmm1, %xmm7
1552; SSE2-NEXT: pxor %xmm6, %xmm7
1553; SSE2-NEXT: pcmpgtd %xmm4, %xmm7
1554; SSE2-NEXT: pcmpeqd %xmm4, %xmm4
1555; SSE2-NEXT: movdqa %xmm7, %xmm5
1556; SSE2-NEXT: pxor %xmm4, %xmm5
1557; SSE2-NEXT: movdqa %xmm2, %xmm8
1558; SSE2-NEXT: pxor %xmm6, %xmm8
1559; SSE2-NEXT: pxor %xmm0, %xmm6
1560; SSE2-NEXT: pcmpgtd %xmm8, %xmm6
1561; SSE2-NEXT: pxor %xmm6, %xmm4
1562; SSE2-NEXT: pandn %xmm0, %xmm6
1563; SSE2-NEXT: pandn %xmm2, %xmm4
1564; SSE2-NEXT: por %xmm6, %xmm4
1565; SSE2-NEXT: pandn %xmm1, %xmm7
1566; SSE2-NEXT: pandn %xmm3, %xmm5
1567; SSE2-NEXT: por %xmm7, %xmm5
1568; SSE2-NEXT: movdqa %xmm4, %xmm0
1569; SSE2-NEXT: movdqa %xmm5, %xmm1
1570; SSE2-NEXT: retq
1571;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1572; SSE41-LABEL: min_le_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1573; SSE41: # BB#0:
1574; SSE41-NEXT: pminud %xmm2, %xmm0
1575; SSE41-NEXT: pminud %xmm3, %xmm1
1576; SSE41-NEXT: retq
1577;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1578; SSE42-LABEL: min_le_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1579; SSE42: # BB#0:
1580; SSE42-NEXT: pminud %xmm2, %xmm0
1581; SSE42-NEXT: pminud %xmm3, %xmm1
1582; SSE42-NEXT: retq
1583;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1584; AVX1-LABEL: min_le_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1585; AVX1: # BB#0:
1586; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
1587; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
1588; AVX1-NEXT: vpminud %xmm2, %xmm3, %xmm2
1589; AVX1-NEXT: vpminud %xmm1, %xmm0, %xmm0
1590; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1591; AVX1-NEXT: retq
1592;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1593; AVX2-LABEL: min_le_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1594; AVX2: # BB#0:
1595; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0
1596; AVX2-NEXT: retq
1597;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1598; AVX512-LABEL: min_le_v8i32:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1599; AVX512: # BB#0:
1600; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm0
1601; AVX512-NEXT: retq
1602 %1 = icmp ule <8 x i32> %a, %b
1603 %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b
1604 ret <8 x i32> %2
1605}
1606
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1607define <8 x i16> @min_le_v8i16(<8 x i16> %a, <8 x i16> %b) {
1608; SSE2-LABEL: min_le_v8i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1609; SSE2: # BB#0:
1610; SSE2-NEXT: movdqa %xmm0, %xmm2
1611; SSE2-NEXT: psubusw %xmm1, %xmm2
1612; SSE2-NEXT: pxor %xmm3, %xmm3
1613; SSE2-NEXT: pcmpeqw %xmm2, %xmm3
1614; SSE2-NEXT: pand %xmm3, %xmm0
1615; SSE2-NEXT: pandn %xmm1, %xmm3
1616; SSE2-NEXT: por %xmm3, %xmm0
1617; SSE2-NEXT: retq
1618;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1619; SSE41-LABEL: min_le_v8i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1620; SSE41: # BB#0:
1621; SSE41-NEXT: pminuw %xmm1, %xmm0
1622; SSE41-NEXT: retq
1623;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1624; SSE42-LABEL: min_le_v8i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1625; SSE42: # BB#0:
1626; SSE42-NEXT: pminuw %xmm1, %xmm0
1627; SSE42-NEXT: retq
1628;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1629; AVX-LABEL: min_le_v8i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1630; AVX: # BB#0:
1631; AVX-NEXT: vpminuw %xmm1, %xmm0, %xmm0
1632; AVX-NEXT: retq
1633 %1 = icmp ule <8 x i16> %a, %b
1634 %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b
1635 ret <8 x i16> %2
1636}
1637
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1638define <16 x i16> @min_le_v16i16(<16 x i16> %a, <16 x i16> %b) {
1639; SSE2-LABEL: min_le_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1640; SSE2: # BB#0:
1641; SSE2-NEXT: movdqa %xmm1, %xmm4
1642; SSE2-NEXT: psubusw %xmm3, %xmm4
1643; SSE2-NEXT: pxor %xmm6, %xmm6
1644; SSE2-NEXT: pcmpeqw %xmm6, %xmm4
1645; SSE2-NEXT: movdqa %xmm0, %xmm5
1646; SSE2-NEXT: psubusw %xmm2, %xmm5
1647; SSE2-NEXT: pcmpeqw %xmm6, %xmm5
1648; SSE2-NEXT: pand %xmm5, %xmm0
1649; SSE2-NEXT: pandn %xmm2, %xmm5
1650; SSE2-NEXT: por %xmm0, %xmm5
1651; SSE2-NEXT: pand %xmm4, %xmm1
1652; SSE2-NEXT: pandn %xmm3, %xmm4
1653; SSE2-NEXT: por %xmm1, %xmm4
1654; SSE2-NEXT: movdqa %xmm5, %xmm0
1655; SSE2-NEXT: movdqa %xmm4, %xmm1
1656; SSE2-NEXT: retq
1657;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1658; SSE41-LABEL: min_le_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1659; SSE41: # BB#0:
1660; SSE41-NEXT: pminuw %xmm2, %xmm0
1661; SSE41-NEXT: pminuw %xmm3, %xmm1
1662; SSE41-NEXT: retq
1663;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1664; SSE42-LABEL: min_le_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1665; SSE42: # BB#0:
1666; SSE42-NEXT: pminuw %xmm2, %xmm0
1667; SSE42-NEXT: pminuw %xmm3, %xmm1
1668; SSE42-NEXT: retq
1669;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1670; AVX1-LABEL: min_le_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1671; AVX1: # BB#0:
1672; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
1673; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
1674; AVX1-NEXT: vpminuw %xmm2, %xmm3, %xmm2
1675; AVX1-NEXT: vpminuw %xmm1, %xmm0, %xmm0
1676; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1677; AVX1-NEXT: retq
1678;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1679; AVX2-LABEL: min_le_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1680; AVX2: # BB#0:
1681; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0
1682; AVX2-NEXT: retq
1683;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1684; AVX512-LABEL: min_le_v16i16:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1685; AVX512: # BB#0:
1686; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm0
1687; AVX512-NEXT: retq
1688 %1 = icmp ule <16 x i16> %a, %b
1689 %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b
1690 ret <16 x i16> %2
1691}
1692
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1693define <16 x i8> @min_le_v16i8(<16 x i8> %a, <16 x i8> %b) {
1694; SSE-LABEL: min_le_v16i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1695; SSE: # BB#0:
1696; SSE-NEXT: pminub %xmm1, %xmm0
1697; SSE-NEXT: retq
1698;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1699; AVX-LABEL: min_le_v16i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1700; AVX: # BB#0:
1701; AVX-NEXT: vpminub %xmm1, %xmm0, %xmm0
1702; AVX-NEXT: retq
1703 %1 = icmp ule <16 x i8> %a, %b
1704 %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b
1705 ret <16 x i8> %2
1706}
1707
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1708define <32 x i8> @min_le_v32i8(<32 x i8> %a, <32 x i8> %b) {
1709; SSE-LABEL: min_le_v32i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1710; SSE: # BB#0:
1711; SSE-NEXT: pminub %xmm2, %xmm0
1712; SSE-NEXT: pminub %xmm3, %xmm1
1713; SSE-NEXT: retq
1714;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1715; AVX1-LABEL: min_le_v32i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1716; AVX1: # BB#0:
1717; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
1718; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
1719; AVX1-NEXT: vpminub %xmm2, %xmm3, %xmm2
1720; AVX1-NEXT: vpminub %xmm1, %xmm0, %xmm0
1721; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1722; AVX1-NEXT: retq
1723;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1724; AVX2-LABEL: min_le_v32i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1725; AVX2: # BB#0:
1726; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0
1727; AVX2-NEXT: retq
1728;
Simon Pilgrim1fdc1772015-08-14 11:03:31 +0000[diff] [blame]1729; AVX512-LABEL: min_le_v32i8:
Simon Pilgrim829091e2015-08-13 20:31:03 +0000[diff] [blame]1730; AVX512: # BB#0:
1731; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm0
1732; AVX512-NEXT: retq
1733 %1 = icmp ule <32 x i8> %a, %b
1734 %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b
1735 ret <32 x i8> %2
1736}
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]1737
1738;
1739; Constant Folding
1740;
1741
1742define <2 x i64> @max_gt_v2i64c() {
1743; SSE2-LABEL: max_gt_v2i64c:
1744; SSE2: # BB#0:
1745; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
1746; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
1747; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
1748; SSE2-NEXT: movdqa %xmm0, %xmm3
1749; SSE2-NEXT: pxor %xmm2, %xmm3
1750; SSE2-NEXT: pxor %xmm1, %xmm0
1751; SSE2-NEXT: movdqa %xmm0, %xmm4
1752; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
1753; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
1754; SSE2-NEXT: pcmpeqd %xmm3, %xmm0
1755; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1756; SSE2-NEXT: pand %xmm5, %xmm3
1757; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
1758; SSE2-NEXT: por %xmm3, %xmm0
1759; SSE2-NEXT: movdqa %xmm0, %xmm3
1760; SSE2-NEXT: pandn %xmm2, %xmm3
1761; SSE2-NEXT: pand %xmm1, %xmm0
1762; SSE2-NEXT: por %xmm3, %xmm0
1763; SSE2-NEXT: retq
1764;
1765; SSE41-LABEL: max_gt_v2i64c:
1766; SSE41: # BB#0:
1767; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
1768; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
1769; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
1770; SSE41-NEXT: movdqa %xmm0, %xmm3
1771; SSE41-NEXT: pxor %xmm1, %xmm3
1772; SSE41-NEXT: pxor %xmm2, %xmm0
1773; SSE41-NEXT: movdqa %xmm0, %xmm4
1774; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
1775; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
1776; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
1777; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1778; SSE41-NEXT: pand %xmm5, %xmm3
1779; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
1780; SSE41-NEXT: por %xmm3, %xmm0
1781; SSE41-NEXT: blendvpd %xmm2, %xmm1
1782; SSE41-NEXT: movapd %xmm1, %xmm0
1783; SSE41-NEXT: retq
1784;
1785; SSE42-LABEL: max_gt_v2i64c:
1786; SSE42: # BB#0:
1787; SSE42-NEXT: movapd {{.*#+}} xmm1 = [18446744073709551615,1]
1788; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775801,9223372036854775815]
1789; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0
1790; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1
1791; SSE42-NEXT: movapd %xmm1, %xmm0
1792; SSE42-NEXT: retq
1793;
1794; AVX-LABEL: max_gt_v2i64c:
1795; AVX: # BB#0:
1796; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [18446744073709551615,1]
1797; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775801,9223372036854775815]
1798; AVX-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
1799; AVX-NEXT: vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0
1800; AVX-NEXT: retq
1801 %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
1802 %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
1803 %3 = icmp ugt <2 x i64> %1, %2
1804 %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
1805 ret <2 x i64> %4
1806}
1807
1808define <4 x i64> @max_gt_v4i64c() {
1809; SSE2-LABEL: max_gt_v4i64c:
1810; SSE2: # BB#0:
1811; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
1812; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
1813; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
1814; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [7,1]
1815; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
1816; SSE2-NEXT: movdqa %xmm0, %xmm1
1817; SSE2-NEXT: pxor %xmm3, %xmm1
1818; SSE2-NEXT: movdqa %xmm0, %xmm6
1819; SSE2-NEXT: pxor %xmm8, %xmm6
1820; SSE2-NEXT: movdqa %xmm6, %xmm7
1821; SSE2-NEXT: pcmpgtd %xmm1, %xmm7
1822; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
1823; SSE2-NEXT: pcmpeqd %xmm1, %xmm6
1824; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
1825; SSE2-NEXT: pand %xmm2, %xmm6
1826; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3]
1827; SSE2-NEXT: por %xmm6, %xmm1
1828; SSE2-NEXT: movdqa %xmm0, %xmm2
1829; SSE2-NEXT: pxor %xmm5, %xmm2
1830; SSE2-NEXT: pxor %xmm4, %xmm0
1831; SSE2-NEXT: movdqa %xmm0, %xmm6
1832; SSE2-NEXT: pcmpgtd %xmm2, %xmm6
1833; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
1834; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
1835; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1836; SSE2-NEXT: pand %xmm7, %xmm2
1837; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
1838; SSE2-NEXT: por %xmm2, %xmm0
1839; SSE2-NEXT: movdqa %xmm0, %xmm2
1840; SSE2-NEXT: pandn %xmm5, %xmm2
1841; SSE2-NEXT: pand %xmm4, %xmm0
1842; SSE2-NEXT: por %xmm2, %xmm0
1843; SSE2-NEXT: movdqa %xmm1, %xmm2
1844; SSE2-NEXT: pandn %xmm3, %xmm2
1845; SSE2-NEXT: pand %xmm8, %xmm1
1846; SSE2-NEXT: por %xmm2, %xmm1
1847; SSE2-NEXT: retq
1848;
1849; SSE41-LABEL: max_gt_v4i64c:
1850; SSE41: # BB#0:
1851; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615]
1852; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
1853; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
1854; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
1855; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
1856; SSE41-NEXT: movdqa %xmm0, %xmm3
1857; SSE41-NEXT: pxor %xmm1, %xmm3
1858; SSE41-NEXT: movdqa %xmm0, %xmm6
1859; SSE41-NEXT: pxor %xmm8, %xmm6
1860; SSE41-NEXT: movdqa %xmm6, %xmm7
1861; SSE41-NEXT: pcmpgtd %xmm3, %xmm7
1862; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
1863; SSE41-NEXT: pcmpeqd %xmm3, %xmm6
1864; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
1865; SSE41-NEXT: pand %xmm4, %xmm6
1866; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
1867; SSE41-NEXT: por %xmm6, %xmm3
1868; SSE41-NEXT: movdqa %xmm0, %xmm4
1869; SSE41-NEXT: pxor %xmm2, %xmm4
1870; SSE41-NEXT: pxor %xmm5, %xmm0
1871; SSE41-NEXT: movdqa %xmm0, %xmm6
1872; SSE41-NEXT: pcmpgtd %xmm4, %xmm6
1873; SSE41-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
1874; SSE41-NEXT: pcmpeqd %xmm4, %xmm0
1875; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
1876; SSE41-NEXT: pand %xmm7, %xmm4
1877; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
1878; SSE41-NEXT: por %xmm4, %xmm0
1879; SSE41-NEXT: blendvpd %xmm5, %xmm2
1880; SSE41-NEXT: movdqa %xmm3, %xmm0
1881; SSE41-NEXT: blendvpd %xmm8, %xmm1
1882; SSE41-NEXT: movapd %xmm2, %xmm0
1883; SSE41-NEXT: retq
1884;
1885; SSE42-LABEL: max_gt_v4i64c:
1886; SSE42: # BB#0:
1887; SSE42-NEXT: movapd {{.*#+}} xmm1 = [7,1]
1888; SSE42-NEXT: movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
1889; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775809,9223372036854775815]
1890; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm3
1891; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775801,9223372036854775807]
1892; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0
1893; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm2
1894; SSE42-NEXT: movdqa %xmm3, %xmm0
1895; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1
1896; SSE42-NEXT: movapd %xmm2, %xmm0
1897; SSE42-NEXT: retq
1898;
1899; AVX1-LABEL: max_gt_v4i64c:
1900; AVX1: # BB#0:
1901; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
1902; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775801,9223372036854775807]
1903; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
1904; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775809,9223372036854775815]
1905; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2
1906; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
1907; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
1908; AVX1-NEXT: retq
1909;
1910; AVX2-LABEL: max_gt_v4i64c:
1911; AVX2: # BB#0:
1912; AVX2-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
1913; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815]
1914; AVX2-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
1915; AVX2-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
1916; AVX2-NEXT: retq
1917;
1918; AVX512-LABEL: max_gt_v4i64c:
1919; AVX512: # BB#0:
1920; AVX512-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
1921; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815]
1922; AVX512-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
1923; AVX512-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
1924; AVX512-NEXT: retq
1925 %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
1926 %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
1927 %3 = icmp ugt <4 x i64> %1, %2
1928 %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
1929 ret <4 x i64> %4
1930}
1931
1932define <4 x i32> @max_gt_v4i32c() {
1933; SSE2-LABEL: max_gt_v4i32c:
1934; SSE2: # BB#0:
1935; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483641,2147483647,2147483649,2147483655]
1936; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
1937; SSE2-NEXT: movdqa %xmm0, %xmm1
1938; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1
1939; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
1940; SSE2-NEXT: por %xmm1, %xmm0
1941; SSE2-NEXT: retq
1942;
1943; SSE41-LABEL: max_gt_v4i32c:
1944; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]1945; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]1946; SSE41-NEXT: retq
1947;
1948; SSE42-LABEL: max_gt_v4i32c:
1949; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]1950; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]1951; SSE42-NEXT: retq
1952;
1953; AVX-LABEL: max_gt_v4i32c:
1954; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]1955; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]1956; AVX-NEXT: retq
1957 %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]1958 %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]1959 %3 = icmp ugt <4 x i32> %1, %2
1960 %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
1961 ret <4 x i32> %4
1962}
1963
1964define <8 x i32> @max_gt_v8i32c() {
1965; SSE2-LABEL: max_gt_v8i32c:
1966; SSE2: # BB#0:
1967; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483649,2147483651,2147483653,2147483655]
1968; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm1
1969; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483641,2147483643,2147483645,2147483647]
1970; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
1971; SSE2-NEXT: movdqa %xmm0, %xmm2
1972; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2
1973; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
1974; SSE2-NEXT: por %xmm2, %xmm0
1975; SSE2-NEXT: movdqa %xmm1, %xmm2
1976; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2
1977; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
1978; SSE2-NEXT: por %xmm2, %xmm1
1979; SSE2-NEXT: retq
1980;
1981; SSE41-LABEL: max_gt_v8i32c:
1982; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]1983; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
1984; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]1985; SSE41-NEXT: retq
1986;
1987; SSE42-LABEL: max_gt_v8i32c:
1988; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]1989; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
1990; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]1991; SSE42-NEXT: retq
1992;
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]1993; AVX-LABEL: max_gt_v8i32c:
1994; AVX: # BB#0:
1995; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7]
1996; AVX-NEXT: retq
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]1997 %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]1998 %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]1999 %3 = icmp ugt <8 x i32> %1, %2
2000 %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
2001 ret <8 x i32> %4
2002}
2003
2004define <8 x i16> @max_gt_v8i16c() {
2005; SSE2-LABEL: max_gt_v8i16c:
2006; SSE2: # BB#0:
2007; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [32761,32763,32765,32767,32769,32771,32773,32775]
2008; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm0
2009; SSE2-NEXT: movdqa %xmm0, %xmm1
2010; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1
2011; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
2012; SSE2-NEXT: por %xmm1, %xmm0
2013; SSE2-NEXT: retq
2014;
2015; SSE41-LABEL: max_gt_v8i16c:
2016; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2017; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2018; SSE41-NEXT: retq
2019;
2020; SSE42-LABEL: max_gt_v8i16c:
2021; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2022; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2023; SSE42-NEXT: retq
2024;
2025; AVX-LABEL: max_gt_v8i16c:
2026; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2027; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2028; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2029 %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
2030 %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2031 %3 = icmp ugt <8 x i16> %1, %2
2032 %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
2033 ret <8 x i16> %4
2034}
2035
2036define <16 x i16> @max_gt_v16i16c() {
2037; SSE2-LABEL: max_gt_v16i16c:
2038; SSE2: # BB#0:
2039; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [32769,32770,32771,32772,32773,32774,32775,32776]
2040; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm1
2041; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [32761,32762,32763,32764,32765,32766,32767,32768]
2042; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm0
2043; SSE2-NEXT: movdqa %xmm0, %xmm2
2044; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2
2045; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
2046; SSE2-NEXT: por %xmm2, %xmm0
2047; SSE2-NEXT: movdqa %xmm1, %xmm2
2048; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2
2049; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
2050; SSE2-NEXT: por %xmm2, %xmm1
2051; SSE2-NEXT: retq
2052;
2053; SSE41-LABEL: max_gt_v16i16c:
2054; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2055; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
2056; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2057; SSE41-NEXT: retq
2058;
2059; SSE42-LABEL: max_gt_v16i16c:
2060; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2061; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
2062; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2063; SSE42-NEXT: retq
2064;
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2065; AVX-LABEL: max_gt_v16i16c:
2066; AVX: # BB#0:
2067; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8]
2068; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2069 %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
2070 %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2071 %3 = icmp ugt <16 x i16> %1, %2
2072 %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
2073 ret <16 x i16> %4
2074}
2075
2076define <16 x i8> @max_gt_v16i8c() {
2077; SSE-LABEL: max_gt_v16i8c:
2078; SSE: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2079; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2080; SSE-NEXT: retq
2081;
2082; AVX-LABEL: max_gt_v16i8c:
2083; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2084; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2085; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2086 %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
2087 %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2088 %3 = icmp ugt <16 x i8> %1, %2
2089 %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
2090 ret <16 x i8> %4
2091}
2092
2093define <2 x i64> @max_ge_v2i64c() {
2094; SSE2-LABEL: max_ge_v2i64c:
2095; SSE2: # BB#0:
2096; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
2097; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
2098; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
2099; SSE2-NEXT: movdqa %xmm0, %xmm3
2100; SSE2-NEXT: pxor %xmm1, %xmm3
2101; SSE2-NEXT: pxor %xmm2, %xmm0
2102; SSE2-NEXT: movdqa %xmm0, %xmm4
2103; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
2104; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
2105; SSE2-NEXT: pcmpeqd %xmm3, %xmm0
2106; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
2107; SSE2-NEXT: pand %xmm5, %xmm0
2108; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
2109; SSE2-NEXT: por %xmm0, %xmm3
2110; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
2111; SSE2-NEXT: pxor %xmm3, %xmm0
2112; SSE2-NEXT: pandn %xmm1, %xmm3
2113; SSE2-NEXT: pandn %xmm2, %xmm0
2114; SSE2-NEXT: por %xmm3, %xmm0
2115; SSE2-NEXT: retq
2116;
2117; SSE41-LABEL: max_ge_v2i64c:
2118; SSE41: # BB#0:
2119; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
2120; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
2121; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
2122; SSE41-NEXT: movdqa %xmm0, %xmm3
2123; SSE41-NEXT: pxor %xmm2, %xmm3
2124; SSE41-NEXT: pxor %xmm1, %xmm0
2125; SSE41-NEXT: movdqa %xmm0, %xmm4
2126; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
2127; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
2128; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
2129; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
2130; SSE41-NEXT: pand %xmm5, %xmm0
2131; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
2132; SSE41-NEXT: por %xmm0, %xmm3
2133; SSE41-NEXT: pcmpeqd %xmm0, %xmm0
2134; SSE41-NEXT: pxor %xmm3, %xmm0
2135; SSE41-NEXT: blendvpd %xmm2, %xmm1
2136; SSE41-NEXT: movapd %xmm1, %xmm0
2137; SSE41-NEXT: retq
2138;
2139; SSE42-LABEL: max_ge_v2i64c:
2140; SSE42: # BB#0:
2141; SSE42-NEXT: movapd {{.*#+}} xmm1 = [18446744073709551615,1]
2142; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775807,9223372036854775809]
2143; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm2
2144; SSE42-NEXT: pcmpeqd %xmm0, %xmm0
2145; SSE42-NEXT: pxor %xmm2, %xmm0
2146; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1
2147; SSE42-NEXT: movapd %xmm1, %xmm0
2148; SSE42-NEXT: retq
2149;
2150; AVX-LABEL: max_ge_v2i64c:
2151; AVX: # BB#0:
2152; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [18446744073709551615,1]
2153; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775807,9223372036854775809]
2154; AVX-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
2155; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
2156; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1
2157; AVX-NEXT: vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0
2158; AVX-NEXT: retq
2159 %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
2160 %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
2161 %3 = icmp uge <2 x i64> %1, %2
2162 %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
2163 ret <2 x i64> %4
2164}
2165
2166define <4 x i64> @max_ge_v4i64c() {
2167; SSE2-LABEL: max_ge_v4i64c:
2168; SSE2: # BB#0:
2169; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615]
2170; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
2171; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
2172; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [7,1]
2173; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,2147483648,2147483648,2147483648]
2174; SSE2-NEXT: movdqa %xmm7, %xmm0
2175; SSE2-NEXT: pxor %xmm8, %xmm0
2176; SSE2-NEXT: movdqa %xmm7, %xmm1
2177; SSE2-NEXT: pxor %xmm9, %xmm1
2178; SSE2-NEXT: movdqa %xmm1, %xmm6
2179; SSE2-NEXT: pcmpgtd %xmm0, %xmm6
2180; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
2181; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
2182; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
2183; SSE2-NEXT: pand %xmm2, %xmm0
2184; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
2185; SSE2-NEXT: por %xmm0, %xmm6
2186; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
2187; SSE2-NEXT: movdqa %xmm6, %xmm1
2188; SSE2-NEXT: pxor %xmm0, %xmm1
2189; SSE2-NEXT: movdqa %xmm7, %xmm2
2190; SSE2-NEXT: pxor %xmm10, %xmm2
2191; SSE2-NEXT: pxor %xmm5, %xmm7
2192; SSE2-NEXT: movdqa %xmm7, %xmm3
2193; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
2194; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
2195; SSE2-NEXT: pcmpeqd %xmm2, %xmm7
2196; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3]
2197; SSE2-NEXT: pand %xmm4, %xmm2
2198; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
2199; SSE2-NEXT: por %xmm2, %xmm3
2200; SSE2-NEXT: pxor %xmm3, %xmm0
2201; SSE2-NEXT: pandn %xmm10, %xmm3
2202; SSE2-NEXT: pandn %xmm5, %xmm0
2203; SSE2-NEXT: por %xmm3, %xmm0
2204; SSE2-NEXT: pandn %xmm8, %xmm6
2205; SSE2-NEXT: pandn %xmm9, %xmm1
2206; SSE2-NEXT: por %xmm6, %xmm1
2207; SSE2-NEXT: retq
2208;
2209; SSE41-LABEL: max_ge_v4i64c:
2210; SSE41: # BB#0:
2211; SSE41-NEXT: movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615]
2212; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
2213; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
2214; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
2215; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
2216; SSE41-NEXT: movdqa %xmm0, %xmm3
2217; SSE41-NEXT: pxor %xmm8, %xmm3
2218; SSE41-NEXT: movdqa %xmm0, %xmm6
2219; SSE41-NEXT: pxor %xmm1, %xmm6
2220; SSE41-NEXT: movdqa %xmm6, %xmm7
2221; SSE41-NEXT: pcmpgtd %xmm3, %xmm7
2222; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
2223; SSE41-NEXT: pcmpeqd %xmm3, %xmm6
2224; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
2225; SSE41-NEXT: pand %xmm4, %xmm6
2226; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
2227; SSE41-NEXT: por %xmm6, %xmm3
2228; SSE41-NEXT: pcmpeqd %xmm4, %xmm4
2229; SSE41-NEXT: pxor %xmm4, %xmm3
2230; SSE41-NEXT: movdqa %xmm0, %xmm6
2231; SSE41-NEXT: pxor %xmm9, %xmm6
2232; SSE41-NEXT: pxor %xmm2, %xmm0
2233; SSE41-NEXT: movdqa %xmm0, %xmm7
2234; SSE41-NEXT: pcmpgtd %xmm6, %xmm7
2235; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2]
2236; SSE41-NEXT: pcmpeqd %xmm6, %xmm0
2237; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
2238; SSE41-NEXT: pand %xmm5, %xmm6
2239; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
2240; SSE41-NEXT: por %xmm6, %xmm0
2241; SSE41-NEXT: pxor %xmm4, %xmm0
2242; SSE41-NEXT: blendvpd %xmm9, %xmm2
2243; SSE41-NEXT: movdqa %xmm3, %xmm0
2244; SSE41-NEXT: blendvpd %xmm8, %xmm1
2245; SSE41-NEXT: movapd %xmm2, %xmm0
2246; SSE41-NEXT: retq
2247;
2248; SSE42-LABEL: max_ge_v4i64c:
2249; SSE42: # BB#0:
2250; SSE42-NEXT: movapd {{.*#+}} xmm1 = [7,1]
2251; SSE42-NEXT: movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
2252; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775815,9223372036854775809]
2253; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm3
2254; SSE42-NEXT: pcmpeqd %xmm4, %xmm4
2255; SSE42-NEXT: pxor %xmm4, %xmm3
2256; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775807,9223372036854775801]
2257; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0
2258; SSE42-NEXT: pxor %xmm4, %xmm0
2259; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm2
2260; SSE42-NEXT: movdqa %xmm3, %xmm0
2261; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1
2262; SSE42-NEXT: movapd %xmm2, %xmm0
2263; SSE42-NEXT: retq
2264;
2265; AVX1-LABEL: max_ge_v4i64c:
2266; AVX1: # BB#0:
2267; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
2268; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775815,9223372036854775809]
2269; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
2270; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
2271; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1
2272; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [9223372036854775807,9223372036854775801]
2273; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3
2274; AVX1-NEXT: vpxor %xmm2, %xmm3, %xmm2
2275; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
2276; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
2277; AVX1-NEXT: retq
2278;
2279; AVX2-LABEL: max_ge_v4i64c:
2280; AVX2: # BB#0:
2281; AVX2-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
2282; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809]
2283; AVX2-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
2284; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
2285; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm1
2286; AVX2-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
2287; AVX2-NEXT: retq
2288;
2289; AVX512-LABEL: max_ge_v4i64c:
2290; AVX512: # BB#0:
2291; AVX512-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
2292; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809]
2293; AVX512-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
2294; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
2295; AVX512-NEXT: vpxor %ymm2, %ymm1, %ymm1
2296; AVX512-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
2297; AVX512-NEXT: retq
2298 %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
2299 %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
2300 %3 = icmp uge <4 x i64> %1, %2
2301 %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
2302 ret <4 x i64> %4
2303}
2304
2305define <4 x i32> @max_ge_v4i32c() {
2306; SSE2-LABEL: max_ge_v4i32c:
2307; SSE2: # BB#0:
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2308; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483647,2147483641,2147483655,2147483649]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2309; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
2310; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
2311; SSE2-NEXT: pxor %xmm0, %xmm1
2312; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1
2313; SSE2-NEXT: pandn {{.*}}(%rip), %xmm0
2314; SSE2-NEXT: por %xmm1, %xmm0
2315; SSE2-NEXT: retq
2316;
2317; SSE41-LABEL: max_ge_v4i32c:
2318; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2319; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2320; SSE41-NEXT: retq
2321;
2322; SSE42-LABEL: max_ge_v4i32c:
2323; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2324; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2325; SSE42-NEXT: retq
2326;
2327; AVX-LABEL: max_ge_v4i32c:
2328; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2329; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2330; AVX-NEXT: retq
2331 %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2332 %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2333 %3 = icmp uge <4 x i32> %1, %2
2334 %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
2335 ret <4 x i32> %4
2336}
2337
2338define <8 x i32> @max_ge_v8i32c() {
2339; SSE2-LABEL: max_ge_v8i32c:
2340; SSE2: # BB#0:
2341; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483655,2147483653,2147483651,2147483649]
2342; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm1
2343; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
2344; SSE2-NEXT: movdqa %xmm1, %xmm3
2345; SSE2-NEXT: pxor %xmm2, %xmm3
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2346; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483647,2147483645,2147483643,2147483641]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2347; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
2348; SSE2-NEXT: pxor %xmm0, %xmm2
2349; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2
2350; SSE2-NEXT: pandn {{.*}}(%rip), %xmm0
2351; SSE2-NEXT: por %xmm2, %xmm0
2352; SSE2-NEXT: pandn {{.*}}(%rip), %xmm3
2353; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1
2354; SSE2-NEXT: por %xmm3, %xmm1
2355; SSE2-NEXT: retq
2356;
2357; SSE41-LABEL: max_ge_v8i32c:
2358; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2359; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
2360; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2361; SSE41-NEXT: retq
2362;
2363; SSE42-LABEL: max_ge_v8i32c:
2364; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2365; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
2366; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2367; SSE42-NEXT: retq
2368;
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2369; AVX-LABEL: max_ge_v8i32c:
2370; AVX: # BB#0:
2371; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7]
2372; AVX-NEXT: retq
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2373 %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2374 %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2375 %3 = icmp uge <8 x i32> %1, %2
2376 %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
2377 ret <8 x i32> %4
2378}
2379
2380define <8 x i16> @max_ge_v8i16c() {
2381; SSE2-LABEL: max_ge_v8i16c:
2382; SSE2: # BB#0:
2383; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [65529,65531,65533,65535,1,3,5,7]
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2384; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [65535,65533,65531,65529,7,5,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2385; SSE2-NEXT: movdqa %xmm2, %xmm3
2386; SSE2-NEXT: psubusw %xmm1, %xmm3
2387; SSE2-NEXT: pxor %xmm0, %xmm0
2388; SSE2-NEXT: pcmpeqw %xmm3, %xmm0
2389; SSE2-NEXT: pand %xmm0, %xmm1
2390; SSE2-NEXT: pandn %xmm2, %xmm0
2391; SSE2-NEXT: por %xmm1, %xmm0
2392; SSE2-NEXT: retq
2393;
2394; SSE41-LABEL: max_ge_v8i16c:
2395; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2396; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2397; SSE41-NEXT: retq
2398;
2399; SSE42-LABEL: max_ge_v8i16c:
2400; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2401; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2402; SSE42-NEXT: retq
2403;
2404; AVX-LABEL: max_ge_v8i16c:
2405; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2406; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2407; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2408 %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
2409 %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2410 %3 = icmp uge <8 x i16> %1, %2
2411 %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
2412 ret <8 x i16> %4
2413}
2414
2415define <16 x i16> @max_ge_v16i16c() {
2416; SSE2-LABEL: max_ge_v16i16c:
2417; SSE2: # BB#0:
2418; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [65529,65530,65531,65532,65533,65534,65535,0]
2419; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,2,3,4,5,6,7,8]
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2420; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [65535,65534,65533,65532,65531,65530,65529,0]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2421; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,6,5,4,3,2,1,0]
2422; SSE2-NEXT: movdqa %xmm5, %xmm1
2423; SSE2-NEXT: psubusw %xmm3, %xmm1
2424; SSE2-NEXT: pxor %xmm6, %xmm6
2425; SSE2-NEXT: pcmpeqw %xmm6, %xmm1
2426; SSE2-NEXT: movdqa %xmm4, %xmm0
2427; SSE2-NEXT: psubusw %xmm2, %xmm0
2428; SSE2-NEXT: pcmpeqw %xmm6, %xmm0
2429; SSE2-NEXT: pand %xmm0, %xmm2
2430; SSE2-NEXT: pandn %xmm4, %xmm0
2431; SSE2-NEXT: por %xmm2, %xmm0
2432; SSE2-NEXT: pand %xmm1, %xmm3
2433; SSE2-NEXT: pandn %xmm5, %xmm1
2434; SSE2-NEXT: por %xmm3, %xmm1
2435; SSE2-NEXT: retq
2436;
2437; SSE41-LABEL: max_ge_v16i16c:
2438; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2439; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
2440; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2441; SSE41-NEXT: retq
2442;
2443; SSE42-LABEL: max_ge_v16i16c:
2444; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2445; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
2446; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2447; SSE42-NEXT: retq
2448;
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2449; AVX-LABEL: max_ge_v16i16c:
2450; AVX: # BB#0:
2451; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8]
2452; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2453 %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
2454 %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2455 %3 = icmp uge <16 x i16> %1, %2
2456 %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
2457 ret <16 x i16> %4
2458}
2459
2460define <16 x i8> @max_ge_v16i8c() {
2461; SSE-LABEL: max_ge_v16i8c:
2462; SSE: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2463; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2464; SSE-NEXT: retq
2465;
2466; AVX-LABEL: max_ge_v16i8c:
2467; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2468; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2469; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2470 %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
2471 %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2472 %3 = icmp uge <16 x i8> %1, %2
2473 %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
2474 ret <16 x i8> %4
2475}
2476
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2477define <2 x i64> @min_lt_v2i64c() {
2478; SSE2-LABEL: min_lt_v2i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2479; SSE2: # BB#0:
2480; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
2481; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
2482; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
2483; SSE2-NEXT: movdqa %xmm0, %xmm3
2484; SSE2-NEXT: pxor %xmm1, %xmm3
2485; SSE2-NEXT: pxor %xmm2, %xmm0
2486; SSE2-NEXT: movdqa %xmm0, %xmm4
2487; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
2488; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
2489; SSE2-NEXT: pcmpeqd %xmm3, %xmm0
2490; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
2491; SSE2-NEXT: pand %xmm5, %xmm3
2492; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
2493; SSE2-NEXT: por %xmm3, %xmm0
2494; SSE2-NEXT: movdqa %xmm0, %xmm3
2495; SSE2-NEXT: pandn %xmm2, %xmm3
2496; SSE2-NEXT: pand %xmm1, %xmm0
2497; SSE2-NEXT: por %xmm3, %xmm0
2498; SSE2-NEXT: retq
2499;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2500; SSE41-LABEL: min_lt_v2i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2501; SSE41: # BB#0:
2502; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
2503; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
2504; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
2505; SSE41-NEXT: movdqa %xmm0, %xmm3
2506; SSE41-NEXT: pxor %xmm2, %xmm3
2507; SSE41-NEXT: pxor %xmm1, %xmm0
2508; SSE41-NEXT: movdqa %xmm0, %xmm4
2509; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
2510; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
2511; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
2512; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
2513; SSE41-NEXT: pand %xmm5, %xmm3
2514; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
2515; SSE41-NEXT: por %xmm3, %xmm0
2516; SSE41-NEXT: blendvpd %xmm2, %xmm1
2517; SSE41-NEXT: movapd %xmm1, %xmm0
2518; SSE41-NEXT: retq
2519;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2520; SSE42-LABEL: min_lt_v2i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2521; SSE42: # BB#0:
2522; SSE42-NEXT: movapd {{.*#+}} xmm1 = [18446744073709551615,1]
2523; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775807,9223372036854775809]
2524; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0
2525; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1
2526; SSE42-NEXT: movapd %xmm1, %xmm0
2527; SSE42-NEXT: retq
2528;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2529; AVX-LABEL: min_lt_v2i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2530; AVX: # BB#0:
2531; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [18446744073709551615,1]
2532; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775807,9223372036854775809]
2533; AVX-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
2534; AVX-NEXT: vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0
2535; AVX-NEXT: retq
2536 %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
2537 %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
2538 %3 = icmp ult <2 x i64> %1, %2
2539 %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
2540 ret <2 x i64> %4
2541}
2542
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2543define <4 x i64> @min_lt_v4i64c() {
2544; SSE2-LABEL: min_lt_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2545; SSE2: # BB#0:
2546; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
2547; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
2548; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
2549; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [7,1]
2550; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
2551; SSE2-NEXT: movdqa %xmm0, %xmm1
2552; SSE2-NEXT: pxor %xmm8, %xmm1
2553; SSE2-NEXT: movdqa %xmm0, %xmm6
2554; SSE2-NEXT: pxor %xmm3, %xmm6
2555; SSE2-NEXT: movdqa %xmm6, %xmm7
2556; SSE2-NEXT: pcmpgtd %xmm1, %xmm7
2557; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
2558; SSE2-NEXT: pcmpeqd %xmm1, %xmm6
2559; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
2560; SSE2-NEXT: pand %xmm2, %xmm6
2561; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3]
2562; SSE2-NEXT: por %xmm6, %xmm1
2563; SSE2-NEXT: movdqa %xmm0, %xmm2
2564; SSE2-NEXT: pxor %xmm4, %xmm2
2565; SSE2-NEXT: pxor %xmm5, %xmm0
2566; SSE2-NEXT: movdqa %xmm0, %xmm6
2567; SSE2-NEXT: pcmpgtd %xmm2, %xmm6
2568; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
2569; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
2570; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
2571; SSE2-NEXT: pand %xmm7, %xmm2
2572; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
2573; SSE2-NEXT: por %xmm2, %xmm0
2574; SSE2-NEXT: movdqa %xmm0, %xmm2
2575; SSE2-NEXT: pandn %xmm5, %xmm2
2576; SSE2-NEXT: pand %xmm4, %xmm0
2577; SSE2-NEXT: por %xmm2, %xmm0
2578; SSE2-NEXT: movdqa %xmm1, %xmm2
2579; SSE2-NEXT: pandn %xmm3, %xmm2
2580; SSE2-NEXT: pand %xmm8, %xmm1
2581; SSE2-NEXT: por %xmm2, %xmm1
2582; SSE2-NEXT: retq
2583;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2584; SSE41-LABEL: min_lt_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2585; SSE41: # BB#0:
2586; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615]
2587; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
2588; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
2589; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
2590; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
2591; SSE41-NEXT: movdqa %xmm0, %xmm3
2592; SSE41-NEXT: pxor %xmm8, %xmm3
2593; SSE41-NEXT: movdqa %xmm0, %xmm6
2594; SSE41-NEXT: pxor %xmm1, %xmm6
2595; SSE41-NEXT: movdqa %xmm6, %xmm7
2596; SSE41-NEXT: pcmpgtd %xmm3, %xmm7
2597; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
2598; SSE41-NEXT: pcmpeqd %xmm3, %xmm6
2599; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
2600; SSE41-NEXT: pand %xmm4, %xmm6
2601; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
2602; SSE41-NEXT: por %xmm6, %xmm3
2603; SSE41-NEXT: movdqa %xmm0, %xmm4
2604; SSE41-NEXT: pxor %xmm5, %xmm4
2605; SSE41-NEXT: pxor %xmm2, %xmm0
2606; SSE41-NEXT: movdqa %xmm0, %xmm6
2607; SSE41-NEXT: pcmpgtd %xmm4, %xmm6
2608; SSE41-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
2609; SSE41-NEXT: pcmpeqd %xmm4, %xmm0
2610; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
2611; SSE41-NEXT: pand %xmm7, %xmm4
2612; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
2613; SSE41-NEXT: por %xmm4, %xmm0
2614; SSE41-NEXT: blendvpd %xmm5, %xmm2
2615; SSE41-NEXT: movdqa %xmm3, %xmm0
2616; SSE41-NEXT: blendvpd %xmm8, %xmm1
2617; SSE41-NEXT: movapd %xmm2, %xmm0
2618; SSE41-NEXT: retq
2619;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2620; SSE42-LABEL: min_lt_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2621; SSE42: # BB#0:
2622; SSE42-NEXT: movapd {{.*#+}} xmm1 = [7,1]
2623; SSE42-NEXT: movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
2624; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775815,9223372036854775809]
2625; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm3
2626; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775807,9223372036854775801]
2627; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0
2628; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm2
2629; SSE42-NEXT: movdqa %xmm3, %xmm0
2630; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1
2631; SSE42-NEXT: movapd %xmm2, %xmm0
2632; SSE42-NEXT: retq
2633;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2634; AVX1-LABEL: min_lt_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2635; AVX1: # BB#0:
2636; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
2637; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775807,9223372036854775801]
2638; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
2639; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775815,9223372036854775809]
2640; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2
2641; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
2642; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
2643; AVX1-NEXT: retq
2644;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2645; AVX2-LABEL: min_lt_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2646; AVX2: # BB#0:
2647; AVX2-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
2648; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809]
2649; AVX2-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
2650; AVX2-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
2651; AVX2-NEXT: retq
2652;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2653; AVX512-LABEL: min_lt_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2654; AVX512: # BB#0:
2655; AVX512-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
2656; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809]
2657; AVX512-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
2658; AVX512-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
2659; AVX512-NEXT: retq
2660 %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
2661 %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
2662 %3 = icmp ult <4 x i64> %1, %2
2663 %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
2664 ret <4 x i64> %4
2665}
2666
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2667define <4 x i32> @min_lt_v4i32c() {
2668; SSE2-LABEL: min_lt_v4i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2669; SSE2: # BB#0:
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2670; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483647,2147483641,2147483655,2147483649]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2671; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
2672; SSE2-NEXT: movdqa %xmm0, %xmm1
2673; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1
2674; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
2675; SSE2-NEXT: por %xmm1, %xmm0
2676; SSE2-NEXT: retq
2677;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2678; SSE41-LABEL: min_lt_v4i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2679; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2680; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2681; SSE41-NEXT: retq
2682;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2683; SSE42-LABEL: min_lt_v4i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2684; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2685; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2686; SSE42-NEXT: retq
2687;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2688; AVX-LABEL: min_lt_v4i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2689; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2690; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2691; AVX-NEXT: retq
2692 %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2693 %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2694 %3 = icmp ult <4 x i32> %1, %2
2695 %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
2696 ret <4 x i32> %4
2697}
2698
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2699define <8 x i32> @min_lt_v8i32c() {
2700; SSE2-LABEL: min_lt_v8i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2701; SSE2: # BB#0:
2702; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483655,2147483653,2147483651,2147483649]
2703; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm1
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2704; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483647,2147483645,2147483643,2147483641]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2705; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
2706; SSE2-NEXT: movdqa %xmm0, %xmm2
2707; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2
2708; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
2709; SSE2-NEXT: por %xmm2, %xmm0
2710; SSE2-NEXT: movdqa %xmm1, %xmm2
2711; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2
2712; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
2713; SSE2-NEXT: por %xmm2, %xmm1
2714; SSE2-NEXT: retq
2715;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2716; SSE41-LABEL: min_lt_v8i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2717; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2718; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
2719; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2720; SSE41-NEXT: retq
2721;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2722; SSE42-LABEL: min_lt_v8i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2723; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2724; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
2725; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2726; SSE42-NEXT: retq
2727;
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2728; AVX-LABEL: min_lt_v8i32c:
2729; AVX: # BB#0:
2730; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1]
2731; AVX-NEXT: retq
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2732 %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2733 %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2734 %3 = icmp ult <8 x i32> %1, %2
2735 %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
2736 ret <8 x i32> %4
2737}
2738
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2739define <8 x i16> @min_lt_v8i16c() {
2740; SSE2-LABEL: min_lt_v8i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2741; SSE2: # BB#0:
2742; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [65529,65531,65533,65535,1,3,5,7]
2743; SSE2-NEXT: movdqa %xmm1, %xmm2
2744; SSE2-NEXT: psubusw {{.*}}(%rip), %xmm2
2745; SSE2-NEXT: pxor %xmm0, %xmm0
2746; SSE2-NEXT: pcmpeqw %xmm2, %xmm0
2747; SSE2-NEXT: pand %xmm0, %xmm1
2748; SSE2-NEXT: pandn {{.*}}(%rip), %xmm0
2749; SSE2-NEXT: por %xmm1, %xmm0
2750; SSE2-NEXT: retq
2751;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2752; SSE41-LABEL: min_lt_v8i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2753; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2754; SSE41-NEXT: movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2755; SSE41-NEXT: retq
2756;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2757; SSE42-LABEL: min_lt_v8i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2758; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2759; SSE42-NEXT: movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2760; SSE42-NEXT: retq
2761;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2762; AVX-LABEL: min_lt_v8i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2763; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2764; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2765; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2766 %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
2767 %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2768 %3 = icmp ult <8 x i16> %1, %2
2769 %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
2770 ret <8 x i16> %4
2771}
2772
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2773define <16 x i16> @min_lt_v16i16c() {
2774; SSE2-LABEL: min_lt_v16i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2775; SSE2: # BB#0:
2776; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [32775,32774,32773,32772,32771,32770,32769,32768]
2777; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm1
2778; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [32769,32766,32765,32764,32763,32762,32761,32768]
2779; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm0
2780; SSE2-NEXT: movdqa %xmm0, %xmm2
2781; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2
2782; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
2783; SSE2-NEXT: por %xmm2, %xmm0
2784; SSE2-NEXT: movdqa %xmm1, %xmm2
2785; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2
2786; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
2787; SSE2-NEXT: por %xmm2, %xmm1
2788; SSE2-NEXT: retq
2789;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2790; SSE41-LABEL: min_lt_v16i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2791; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2792; SSE41-NEXT: movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0]
2793; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2794; SSE41-NEXT: retq
2795;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2796; SSE42-LABEL: min_lt_v16i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2797; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2798; SSE42-NEXT: movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0]
2799; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2800; SSE42-NEXT: retq
2801;
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2802; AVX-LABEL: min_lt_v16i16c:
2803; AVX: # BB#0:
2804; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [1,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0]
2805; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2806 %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
2807 %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2808 %3 = icmp ult <16 x i16> %1, %2
2809 %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
2810 ret <16 x i16> %4
2811}
2812
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2813define <16 x i8> @min_lt_v16i8c() {
2814; SSE-LABEL: min_lt_v16i8c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2815; SSE: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2816; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2817; SSE-NEXT: retq
2818;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2819; AVX-LABEL: min_lt_v16i8c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2820; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]2821; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2822; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]2823 %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
2824 %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2825 %3 = icmp ult <16 x i8> %1, %2
2826 %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
2827 ret <16 x i8> %4
2828}
2829
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2830define <2 x i64> @min_le_v2i64c() {
2831; SSE2-LABEL: min_le_v2i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2832; SSE2: # BB#0:
2833; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
2834; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
2835; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
2836; SSE2-NEXT: movdqa %xmm0, %xmm3
2837; SSE2-NEXT: pxor %xmm2, %xmm3
2838; SSE2-NEXT: pxor %xmm1, %xmm0
2839; SSE2-NEXT: movdqa %xmm0, %xmm4
2840; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
2841; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
2842; SSE2-NEXT: pcmpeqd %xmm3, %xmm0
2843; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
2844; SSE2-NEXT: pand %xmm5, %xmm0
2845; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
2846; SSE2-NEXT: por %xmm0, %xmm3
2847; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
2848; SSE2-NEXT: pxor %xmm3, %xmm0
2849; SSE2-NEXT: pandn %xmm1, %xmm3
2850; SSE2-NEXT: pandn %xmm2, %xmm0
2851; SSE2-NEXT: por %xmm3, %xmm0
2852; SSE2-NEXT: retq
2853;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2854; SSE41-LABEL: min_le_v2i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2855; SSE41: # BB#0:
2856; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
2857; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
2858; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
2859; SSE41-NEXT: movdqa %xmm0, %xmm3
2860; SSE41-NEXT: pxor %xmm1, %xmm3
2861; SSE41-NEXT: pxor %xmm2, %xmm0
2862; SSE41-NEXT: movdqa %xmm0, %xmm4
2863; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
2864; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
2865; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
2866; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
2867; SSE41-NEXT: pand %xmm5, %xmm0
2868; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
2869; SSE41-NEXT: por %xmm0, %xmm3
2870; SSE41-NEXT: pcmpeqd %xmm0, %xmm0
2871; SSE41-NEXT: pxor %xmm3, %xmm0
2872; SSE41-NEXT: blendvpd %xmm2, %xmm1
2873; SSE41-NEXT: movapd %xmm1, %xmm0
2874; SSE41-NEXT: retq
2875;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2876; SSE42-LABEL: min_le_v2i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2877; SSE42: # BB#0:
2878; SSE42-NEXT: movapd {{.*#+}} xmm1 = [18446744073709551615,1]
2879; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775801,9223372036854775815]
2880; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm2
2881; SSE42-NEXT: pcmpeqd %xmm0, %xmm0
2882; SSE42-NEXT: pxor %xmm2, %xmm0
2883; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1
2884; SSE42-NEXT: movapd %xmm1, %xmm0
2885; SSE42-NEXT: retq
2886;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2887; AVX-LABEL: min_le_v2i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2888; AVX: # BB#0:
2889; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [18446744073709551615,1]
2890; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775801,9223372036854775815]
2891; AVX-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
2892; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
2893; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1
2894; AVX-NEXT: vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0
2895; AVX-NEXT: retq
2896 %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
2897 %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
2898 %3 = icmp ule <2 x i64> %1, %2
2899 %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
2900 ret <2 x i64> %4
2901}
2902
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2903define <4 x i64> @min_le_v4i64c() {
2904; SSE2-LABEL: min_le_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2905; SSE2: # BB#0:
2906; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615]
2907; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
2908; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
2909; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [7,1]
2910; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,2147483648,2147483648,2147483648]
2911; SSE2-NEXT: movdqa %xmm7, %xmm0
2912; SSE2-NEXT: pxor %xmm9, %xmm0
2913; SSE2-NEXT: movdqa %xmm7, %xmm1
2914; SSE2-NEXT: pxor %xmm8, %xmm1
2915; SSE2-NEXT: movdqa %xmm1, %xmm6
2916; SSE2-NEXT: pcmpgtd %xmm0, %xmm6
2917; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
2918; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
2919; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
2920; SSE2-NEXT: pand %xmm2, %xmm0
2921; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
2922; SSE2-NEXT: por %xmm0, %xmm6
2923; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
2924; SSE2-NEXT: movdqa %xmm6, %xmm1
2925; SSE2-NEXT: pxor %xmm0, %xmm1
2926; SSE2-NEXT: movdqa %xmm7, %xmm2
2927; SSE2-NEXT: pxor %xmm5, %xmm2
2928; SSE2-NEXT: pxor %xmm10, %xmm7
2929; SSE2-NEXT: movdqa %xmm7, %xmm3
2930; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
2931; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
2932; SSE2-NEXT: pcmpeqd %xmm2, %xmm7
2933; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3]
2934; SSE2-NEXT: pand %xmm4, %xmm2
2935; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
2936; SSE2-NEXT: por %xmm2, %xmm3
2937; SSE2-NEXT: pxor %xmm3, %xmm0
2938; SSE2-NEXT: pandn %xmm10, %xmm3
2939; SSE2-NEXT: pandn %xmm5, %xmm0
2940; SSE2-NEXT: por %xmm3, %xmm0
2941; SSE2-NEXT: pandn %xmm8, %xmm6
2942; SSE2-NEXT: pandn %xmm9, %xmm1
2943; SSE2-NEXT: por %xmm6, %xmm1
2944; SSE2-NEXT: retq
2945;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2946; SSE41-LABEL: min_le_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2947; SSE41: # BB#0:
2948; SSE41-NEXT: movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615]
2949; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
2950; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
2951; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
2952; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
2953; SSE41-NEXT: movdqa %xmm0, %xmm3
2954; SSE41-NEXT: pxor %xmm1, %xmm3
2955; SSE41-NEXT: movdqa %xmm0, %xmm6
2956; SSE41-NEXT: pxor %xmm8, %xmm6
2957; SSE41-NEXT: movdqa %xmm6, %xmm7
2958; SSE41-NEXT: pcmpgtd %xmm3, %xmm7
2959; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
2960; SSE41-NEXT: pcmpeqd %xmm3, %xmm6
2961; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
2962; SSE41-NEXT: pand %xmm4, %xmm6
2963; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
2964; SSE41-NEXT: por %xmm6, %xmm3
2965; SSE41-NEXT: pcmpeqd %xmm4, %xmm4
2966; SSE41-NEXT: pxor %xmm4, %xmm3
2967; SSE41-NEXT: movdqa %xmm0, %xmm6
2968; SSE41-NEXT: pxor %xmm2, %xmm6
2969; SSE41-NEXT: pxor %xmm9, %xmm0
2970; SSE41-NEXT: movdqa %xmm0, %xmm7
2971; SSE41-NEXT: pcmpgtd %xmm6, %xmm7
2972; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2]
2973; SSE41-NEXT: pcmpeqd %xmm6, %xmm0
2974; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
2975; SSE41-NEXT: pand %xmm5, %xmm6
2976; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
2977; SSE41-NEXT: por %xmm6, %xmm0
2978; SSE41-NEXT: pxor %xmm4, %xmm0
2979; SSE41-NEXT: blendvpd %xmm9, %xmm2
2980; SSE41-NEXT: movdqa %xmm3, %xmm0
2981; SSE41-NEXT: blendvpd %xmm8, %xmm1
2982; SSE41-NEXT: movapd %xmm2, %xmm0
2983; SSE41-NEXT: retq
2984;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]2985; SSE42-LABEL: min_le_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]2986; SSE42: # BB#0:
2987; SSE42-NEXT: movapd {{.*#+}} xmm1 = [7,1]
2988; SSE42-NEXT: movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
2989; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775809,9223372036854775815]
2990; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm3
2991; SSE42-NEXT: pcmpeqd %xmm4, %xmm4
2992; SSE42-NEXT: pxor %xmm4, %xmm3
2993; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775801,9223372036854775807]
2994; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0
2995; SSE42-NEXT: pxor %xmm4, %xmm0
2996; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm2
2997; SSE42-NEXT: movdqa %xmm3, %xmm0
2998; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1
2999; SSE42-NEXT: movapd %xmm2, %xmm0
3000; SSE42-NEXT: retq
3001;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3002; AVX1-LABEL: min_le_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3003; AVX1: # BB#0:
3004; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
3005; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775809,9223372036854775815]
3006; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
3007; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
3008; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1
3009; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [9223372036854775801,9223372036854775807]
3010; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3
3011; AVX1-NEXT: vpxor %xmm2, %xmm3, %xmm2
3012; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
3013; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
3014; AVX1-NEXT: retq
3015;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3016; AVX2-LABEL: min_le_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3017; AVX2: # BB#0:
3018; AVX2-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
3019; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815]
3020; AVX2-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
3021; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
3022; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm1
3023; AVX2-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
3024; AVX2-NEXT: retq
3025;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3026; AVX512-LABEL: min_le_v4i64c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3027; AVX512: # BB#0:
3028; AVX512-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
3029; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815]
3030; AVX512-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
3031; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
3032; AVX512-NEXT: vpxor %ymm2, %ymm1, %ymm1
3033; AVX512-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
3034; AVX512-NEXT: retq
3035 %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
3036 %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
3037 %3 = icmp ule <4 x i64> %1, %2
3038 %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
3039 ret <4 x i64> %4
3040}
3041
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3042define <4 x i32> @min_le_v4i32c() {
3043; SSE2-LABEL: min_le_v4i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3044; SSE2: # BB#0:
3045; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483641,2147483647,2147483649,2147483655]
3046; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
3047; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
3048; SSE2-NEXT: pxor %xmm0, %xmm1
3049; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1
3050; SSE2-NEXT: pandn {{.*}}(%rip), %xmm0
3051; SSE2-NEXT: por %xmm1, %xmm0
3052; SSE2-NEXT: retq
3053;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3054; SSE41-LABEL: min_le_v4i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3055; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3056; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3057; SSE41-NEXT: retq
3058;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3059; SSE42-LABEL: min_le_v4i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3060; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3061; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3062; SSE42-NEXT: retq
3063;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3064; AVX-LABEL: min_le_v4i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3065; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3066; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3067; AVX-NEXT: retq
3068 %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]3069 %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3070 %3 = icmp ule <4 x i32> %1, %2
3071 %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
3072 ret <4 x i32> %4
3073}
3074
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3075define <8 x i32> @min_le_v8i32c() {
3076; SSE2-LABEL: min_le_v8i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3077; SSE2: # BB#0:
3078; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483649,2147483651,2147483653,2147483655]
3079; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm1
3080; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
3081; SSE2-NEXT: movdqa %xmm1, %xmm3
3082; SSE2-NEXT: pxor %xmm2, %xmm3
3083; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483641,2147483643,2147483645,2147483647]
3084; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
3085; SSE2-NEXT: pxor %xmm0, %xmm2
3086; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2
3087; SSE2-NEXT: pandn {{.*}}(%rip), %xmm0
3088; SSE2-NEXT: por %xmm2, %xmm0
3089; SSE2-NEXT: pandn {{.*}}(%rip), %xmm3
3090; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1
3091; SSE2-NEXT: por %xmm3, %xmm1
3092; SSE2-NEXT: retq
3093;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3094; SSE41-LABEL: min_le_v8i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3095; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3096; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
3097; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3098; SSE41-NEXT: retq
3099;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3100; SSE42-LABEL: min_le_v8i32c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3101; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3102; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
3103; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3104; SSE42-NEXT: retq
3105;
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3106; AVX-LABEL: min_le_v8i32c:
3107; AVX: # BB#0:
3108; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1]
3109; AVX-NEXT: retq
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3110 %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]3111 %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3112 %3 = icmp ule <8 x i32> %1, %2
3113 %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
3114 ret <8 x i32> %4
3115}
3116
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3117define <8 x i16> @min_le_v8i16c() {
3118; SSE2-LABEL: min_le_v8i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3119; SSE2: # BB#0:
3120; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [65529,65531,65533,65535,1,3,5,7]
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]3121; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [65535,65533,65531,65529,7,5,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3122; SSE2-NEXT: movdqa %xmm1, %xmm3
3123; SSE2-NEXT: psubusw %xmm2, %xmm3
3124; SSE2-NEXT: pxor %xmm0, %xmm0
3125; SSE2-NEXT: pcmpeqw %xmm3, %xmm0
3126; SSE2-NEXT: pand %xmm0, %xmm1
3127; SSE2-NEXT: pandn %xmm2, %xmm0
3128; SSE2-NEXT: por %xmm1, %xmm0
3129; SSE2-NEXT: retq
3130;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3131; SSE41-LABEL: min_le_v8i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3132; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3133; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3134; SSE41-NEXT: retq
3135;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3136; SSE42-LABEL: min_le_v8i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3137; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3138; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3139; SSE42-NEXT: retq
3140;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3141; AVX-LABEL: min_le_v8i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3142; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3143; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3144; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]3145 %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
3146 %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3147 %3 = icmp ule <8 x i16> %1, %2
3148 %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
3149 ret <8 x i16> %4
3150}
3151
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3152define <16 x i16> @min_le_v16i16c() {
3153; SSE2-LABEL: min_le_v16i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3154; SSE2: # BB#0:
3155; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [65529,65530,65531,65532,65533,65534,65535,0]
3156; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,2,3,4,5,6,7,8]
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]3157; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [65535,65534,65533,65532,65531,65530,65529,0]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3158; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,6,5,4,3,2,1,0]
3159; SSE2-NEXT: movdqa %xmm3, %xmm1
3160; SSE2-NEXT: psubusw %xmm5, %xmm1
3161; SSE2-NEXT: pxor %xmm6, %xmm6
3162; SSE2-NEXT: pcmpeqw %xmm6, %xmm1
3163; SSE2-NEXT: movdqa %xmm2, %xmm0
3164; SSE2-NEXT: psubusw %xmm4, %xmm0
3165; SSE2-NEXT: pcmpeqw %xmm6, %xmm0
3166; SSE2-NEXT: pand %xmm0, %xmm2
3167; SSE2-NEXT: pandn %xmm4, %xmm0
3168; SSE2-NEXT: por %xmm2, %xmm0
3169; SSE2-NEXT: pand %xmm1, %xmm3
3170; SSE2-NEXT: pandn %xmm5, %xmm1
3171; SSE2-NEXT: por %xmm3, %xmm1
3172; SSE2-NEXT: retq
3173;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3174; SSE41-LABEL: min_le_v16i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3175; SSE41: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3176; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0]
3177; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3178; SSE41-NEXT: retq
3179;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3180; SSE42-LABEL: min_le_v16i16c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3181; SSE42: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3182; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0]
3183; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3184; SSE42-NEXT: retq
3185;
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3186; AVX-LABEL: min_le_v16i16c:
3187; AVX: # BB#0:
3188; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65529,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0]
3189; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]3190 %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
3191 %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3192 %3 = icmp ule <16 x i16> %1, %2
3193 %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
3194 ret <16 x i16> %4
3195}
3196
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3197define <16 x i8> @min_le_v16i8c() {
3198; SSE-LABEL: min_le_v16i8c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3199; SSE: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3200; SSE-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3201; SSE-NEXT: retq
3202;
Simon Pilgrim9f4374d2015-08-18 09:02:51 +0000[diff] [blame]3203; AVX-LABEL: min_le_v16i8c:
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3204; AVX: # BB#0:
Simon Pilgrim35f52822015-08-19 21:11:58 +0000[diff] [blame]3205; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3206; AVX-NEXT: retq
Simon Pilgrimedaba3b2015-08-18 20:46:48 +0000[diff] [blame]3207 %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
3208 %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
Simon Pilgrim19ffd572015-08-18 08:52:43 +0000[diff] [blame]3209 %3 = icmp ule <16 x i8> %1, %2
3210 %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
3211 ret <16 x i8> %4
3212}