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Chris Lattner101b8cd2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
John Criswell482202a2003-10-20 19:43:21 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
Chris Lattner101b8cd2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner74e4e9b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattnerbfa53192003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattnerb4e41112002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattner42714ec2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnerca4362f2002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattnerbfa53192003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattnerb4d58d72003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Chris Lattnerd4627092002-12-18 08:14:26 +000024#include "Support/CommandLine.h"
Chris Lattner1007f032003-08-01 22:21:34 +000025#include "Support/Debug.h"
26#include "Support/Statistic.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000027#include <iostream>
Chris Lattnerc330b982004-01-31 21:27:19 +000028using namespace llvm;
Brian Gaeke960707c2003-11-11 22:41:34 +000029
Chris Lattner101b8cd2002-12-16 16:15:28 +000030namespace {
31 Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
32 Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
Chris Lattner9ab7fbe2003-10-24 20:05:58 +000033 cl::opt<bool> DisableKill("disable-kill", cl::Hidden,
Chris Lattnerd4627092002-12-18 08:14:26 +000034 cl::desc("Disable register kill in local-ra"));
Chris Lattner101b8cd2002-12-16 16:15:28 +000035
Chris Lattnerb4e41112002-12-28 20:40:43 +000036 class RA : public MachineFunctionPass {
37 const TargetMachine *TM;
Chris Lattner101b8cd2002-12-16 16:15:28 +000038 MachineFunction *MF;
Chris Lattnerb4e41112002-12-28 20:40:43 +000039 const MRegisterInfo *RegInfo;
Chris Lattnerbfa53192003-01-13 00:25:40 +000040 LiveVariables *LV;
Chris Lattner42714ec2002-12-25 05:05:46 +000041
Chris Lattner815b85e2003-08-04 23:36:39 +000042 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
43 // values are spilled.
Chris Lattnerb4e41112002-12-28 20:40:43 +000044 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattner101b8cd2002-12-16 16:15:28 +000045
46 // Virt2PhysRegMap - This map contains entries for each virtual register
47 // that is currently available in a physical register.
48 //
49 std::map<unsigned, unsigned> Virt2PhysRegMap;
50
51 // PhysRegsUsed - This map contains entries for each physical register that
52 // currently has a value (ie, it is in Virt2PhysRegMap). The value mapped
53 // to is the virtual register corresponding to the physical register (the
54 // inverse of the Virt2PhysRegMap), or 0. The value is set to 0 if this
55 // register is pinned because it is used by a future instruction.
56 //
57 std::map<unsigned, unsigned> PhysRegsUsed;
58
59 // PhysRegsUseOrder - This contains a list of the physical registers that
60 // currently have a virtual register value in them. This list provides an
61 // ordering of registers, imposing a reallocation order. This list is only
62 // used if all registers are allocated and we have to spill one, in which
63 // case we spill the least recently used register. Entries at the front of
64 // the list are the least recently used registers, entries at the back are
65 // the most recently used.
66 //
67 std::vector<unsigned> PhysRegsUseOrder;
68
Chris Lattnerbfa53192003-01-13 00:25:40 +000069 // VirtRegModified - This bitset contains information about which virtual
70 // registers need to be spilled back to memory when their registers are
71 // scavenged. If a virtual register has simply been rematerialized, there
72 // is no reason to spill it to memory when we need the register back.
Chris Lattnerd4627092002-12-18 08:14:26 +000073 //
Chris Lattnerbfa53192003-01-13 00:25:40 +000074 std::vector<bool> VirtRegModified;
75
76 void markVirtRegModified(unsigned Reg, bool Val = true) {
Chris Lattnerc330b982004-01-31 21:27:19 +000077 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattnerbfa53192003-01-13 00:25:40 +000078 Reg -= MRegisterInfo::FirstVirtualRegister;
79 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
80 VirtRegModified[Reg] = Val;
81 }
82
83 bool isVirtRegModified(unsigned Reg) const {
Chris Lattnerc330b982004-01-31 21:27:19 +000084 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattnerbfa53192003-01-13 00:25:40 +000085 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
86 && "Illegal virtual register!");
87 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
88 }
Chris Lattnerd4627092002-12-18 08:14:26 +000089
Chris Lattner101b8cd2002-12-16 16:15:28 +000090 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattnerd4627092002-12-18 08:14:26 +000091 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner763729c52002-12-24 00:04:55 +000092 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
93
94 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
95 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
96 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
97 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
98 // Add it to the end of the list
99 PhysRegsUseOrder.push_back(RegMatch);
100 if (RegMatch == Reg)
101 return; // Found an exact match, exit early
102 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000103 }
104
105 public:
Chris Lattner101b8cd2002-12-16 16:15:28 +0000106 virtual const char *getPassName() const {
107 return "Local Register Allocator";
108 }
109
Chris Lattnerbfa53192003-01-13 00:25:40 +0000110 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
111 if (!DisableKill)
112 AU.addRequired<LiveVariables>();
113 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos71390902003-12-18 22:40:24 +0000114 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattnerbfa53192003-01-13 00:25:40 +0000115 MachineFunctionPass::getAnalysisUsage(AU);
116 }
117
Chris Lattner101b8cd2002-12-16 16:15:28 +0000118 private:
119 /// runOnMachineFunction - Register allocate the whole function
120 bool runOnMachineFunction(MachineFunction &Fn);
121
122 /// AllocateBasicBlock - Register allocate the specified basic block.
123 void AllocateBasicBlock(MachineBasicBlock &MBB);
124
Chris Lattnerd4627092002-12-18 08:14:26 +0000125
Chris Lattnerd4627092002-12-18 08:14:26 +0000126 /// areRegsEqual - This method returns true if the specified registers are
127 /// related to each other. To do this, it checks to see if they are equal
128 /// or if the first register is in the alias set of the second register.
129 ///
130 bool areRegsEqual(unsigned R1, unsigned R2) const {
131 if (R1 == R2) return true;
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000132 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
133 *AliasSet; ++AliasSet) {
134 if (*AliasSet == R1) return true;
135 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000136 return false;
137 }
138
Chris Lattnerb4e41112002-12-28 20:40:43 +0000139 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattner815b85e2003-08-04 23:36:39 +0000140 /// register on the stack, allocating space if necessary.
Chris Lattnerb4e41112002-12-28 20:40:43 +0000141 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000142
Chris Lattner815b85e2003-08-04 23:36:39 +0000143 /// removePhysReg - This method marks the specified physical register as no
144 /// longer being in use.
145 ///
Chris Lattnerd4627092002-12-18 08:14:26 +0000146 void removePhysReg(unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000147
148 /// spillVirtReg - This method spills the value specified by PhysReg into
149 /// the virtual register slot specified by VirtReg. It then updates the RA
150 /// data structures to indicate the fact that PhysReg is now available.
151 ///
152 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
153 unsigned VirtReg, unsigned PhysReg);
154
Chris Lattner0129b862002-12-16 17:44:42 +0000155 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner931947d2003-08-17 18:01:15 +0000156 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
157 /// true, then the request is ignored if the physical register does not
158 /// contain a virtual register.
Chris Lattnerbfa53192003-01-13 00:25:40 +0000159 ///
Chris Lattner0129b862002-12-16 17:44:42 +0000160 void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner931947d2003-08-17 18:01:15 +0000161 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattner0129b862002-12-16 17:44:42 +0000162
Chris Lattnerbfa53192003-01-13 00:25:40 +0000163 /// assignVirtToPhysReg - This method updates local state so that we know
164 /// that PhysReg is the proper container for VirtReg now. The physical
165 /// register must not be used for anything else when this is called.
166 ///
167 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
168
169 /// liberatePhysReg - Make sure the specified physical register is available
170 /// for use. If there is currently a value in it, it is either moved out of
171 /// the way or spilled to memory.
172 ///
173 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
174 unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000175
Chris Lattner4664bd52002-12-17 02:50:10 +0000176 /// isPhysRegAvailable - Return true if the specified physical register is
177 /// free and available for use. This also includes checking to see if
178 /// aliased registers are all free...
179 ///
Chris Lattnerd4627092002-12-18 08:14:26 +0000180 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattnerbfa53192003-01-13 00:25:40 +0000181
182 /// getFreeReg - Look to see if there is a free register available in the
183 /// specified register class. If not, return 0.
184 ///
185 unsigned getFreeReg(const TargetRegisterClass *RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000186
Chris Lattnerbfa53192003-01-13 00:25:40 +0000187 /// getReg - Find a physical register to hold the specified virtual
Chris Lattner101b8cd2002-12-16 16:15:28 +0000188 /// register. If all compatible physical registers are used, this method
189 /// spills the last used virtual register to the stack, and uses that
190 /// register.
191 ///
Chris Lattnerbfa53192003-01-13 00:25:40 +0000192 unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
193 unsigned VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000194
195 /// reloadVirtReg - This method loads the specified virtual register into a
196 /// physical register, returning the physical register chosen. This updates
197 /// the regalloc data structures to reflect the fact that the virtual reg is
198 /// now alive in a physical register, and the previous one isn't.
199 ///
200 unsigned reloadVirtReg(MachineBasicBlock &MBB,
201 MachineBasicBlock::iterator &I, unsigned VirtReg);
Chris Lattner815b85e2003-08-04 23:36:39 +0000202
203 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
204 unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000205 };
Chris Lattner101b8cd2002-12-16 16:15:28 +0000206}
207
Chris Lattner815b85e2003-08-04 23:36:39 +0000208/// getStackSpaceFor - This allocates space for the specified virtual register
209/// to be held on the stack.
210int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
211 // Find the location Reg would belong...
212 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000213
Chris Lattnerb4e41112002-12-28 20:40:43 +0000214 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattner101b8cd2002-12-16 16:15:28 +0000215 return I->second; // Already has space allocated?
216
Chris Lattnerb4e41112002-12-28 20:40:43 +0000217 // Allocate a new stack object for this spill location...
Chris Lattnerbfa53192003-01-13 00:25:40 +0000218 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000219
Chris Lattner101b8cd2002-12-16 16:15:28 +0000220 // Assign the slot...
Chris Lattnerb4e41112002-12-28 20:40:43 +0000221 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
222 return FrameIdx;
Chris Lattner101b8cd2002-12-16 16:15:28 +0000223}
224
Chris Lattner4664bd52002-12-17 02:50:10 +0000225
Chris Lattnerd4627092002-12-18 08:14:26 +0000226/// removePhysReg - This method marks the specified physical register as no
227/// longer being in use.
228///
229void RA::removePhysReg(unsigned PhysReg) {
230 PhysRegsUsed.erase(PhysReg); // PhyReg no longer used
231
232 std::vector<unsigned>::iterator It =
233 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000234 if (It != PhysRegsUseOrder.end())
235 PhysRegsUseOrder.erase(It);
Chris Lattnerd4627092002-12-18 08:14:26 +0000236}
237
Chris Lattnerbfa53192003-01-13 00:25:40 +0000238
Chris Lattner101b8cd2002-12-16 16:15:28 +0000239/// spillVirtReg - This method spills the value specified by PhysReg into the
240/// virtual register slot specified by VirtReg. It then updates the RA data
241/// structures to indicate the fact that PhysReg is now available.
242///
243void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
244 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner92a199d2003-08-05 04:13:58 +0000245 if (!VirtReg && DisableKill) return;
246 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattner506fa682003-08-05 00:49:09 +0000247 " Must not have appropriate kill for the register or use exists beyond"
248 " the intended one.");
249 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
250 std::cerr << " containing %reg" << VirtReg;
251 if (!isVirtRegModified(VirtReg))
252 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattner101b8cd2002-12-16 16:15:28 +0000253
Chris Lattner506fa682003-08-05 00:49:09 +0000254 // Otherwise, there is a virtual register corresponding to this physical
255 // register. We only need to spill it into its stack slot if it has been
256 // modified.
257 if (isVirtRegModified(VirtReg)) {
258 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
259 int FrameIndex = getStackSpaceFor(VirtReg, RC);
260 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
261 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
262 ++NumSpilled; // Update statistics
Chris Lattner101b8cd2002-12-16 16:15:28 +0000263 }
Chris Lattner506fa682003-08-05 00:49:09 +0000264 Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available
Chris Lattner101b8cd2002-12-16 16:15:28 +0000265
Chris Lattner815b85e2003-08-04 23:36:39 +0000266 DEBUG(std::cerr << "\n");
Chris Lattnerd4627092002-12-18 08:14:26 +0000267 removePhysReg(PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000268}
269
Chris Lattner4664bd52002-12-17 02:50:10 +0000270
Chris Lattnerbfa53192003-01-13 00:25:40 +0000271/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner931947d2003-08-17 18:01:15 +0000272/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
273/// then the request is ignored if the physical register does not contain a
274/// virtual register.
Chris Lattnerbfa53192003-01-13 00:25:40 +0000275///
276void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner931947d2003-08-17 18:01:15 +0000277 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000278 std::map<unsigned, unsigned>::iterator PI = PhysRegsUsed.find(PhysReg);
279 if (PI != PhysRegsUsed.end()) { // Only spill it if it's used!
Chris Lattner931947d2003-08-17 18:01:15 +0000280 if (PI->second || !OnlyVirtRegs)
281 spillVirtReg(MBB, I, PI->second, PhysReg);
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000282 } else {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000283 // If the selected register aliases any other registers, we must make
284 // sure that one of the aliases isn't alive...
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000285 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
286 *AliasSet; ++AliasSet) {
287 PI = PhysRegsUsed.find(*AliasSet);
Chris Lattnerbfa53192003-01-13 00:25:40 +0000288 if (PI != PhysRegsUsed.end()) // Spill aliased register...
Chris Lattner931947d2003-08-17 18:01:15 +0000289 if (PI->second || !OnlyVirtRegs)
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000290 spillVirtReg(MBB, I, PI->second, *AliasSet);
Chris Lattnerbfa53192003-01-13 00:25:40 +0000291 }
292 }
293}
294
295
296/// assignVirtToPhysReg - This method updates local state so that we know
297/// that PhysReg is the proper container for VirtReg now. The physical
298/// register must not be used for anything else when this is called.
299///
300void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
301 assert(PhysRegsUsed.find(PhysReg) == PhysRegsUsed.end() &&
302 "Phys reg already assigned!");
303 // Update information to note the fact that this register was just used, and
304 // it holds VirtReg.
305 PhysRegsUsed[PhysReg] = VirtReg;
306 Virt2PhysRegMap[VirtReg] = PhysReg;
307 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
308}
309
310
Chris Lattner4664bd52002-12-17 02:50:10 +0000311/// isPhysRegAvailable - Return true if the specified physical register is free
312/// and available for use. This also includes checking to see if aliased
313/// registers are all free...
314///
315bool RA::isPhysRegAvailable(unsigned PhysReg) const {
316 if (PhysRegsUsed.count(PhysReg)) return false;
317
318 // If the selected register aliases any other allocated registers, it is
319 // not free!
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000320 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
321 *AliasSet; ++AliasSet)
322 if (PhysRegsUsed.count(*AliasSet)) // Aliased register in use?
323 return false; // Can't use this reg then.
Chris Lattner4664bd52002-12-17 02:50:10 +0000324 return true;
325}
326
327
Chris Lattnerbfa53192003-01-13 00:25:40 +0000328/// getFreeReg - Look to see if there is a free register available in the
329/// specified register class. If not, return 0.
Chris Lattner101b8cd2002-12-16 16:15:28 +0000330///
Chris Lattnerbfa53192003-01-13 00:25:40 +0000331unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattnerb4e41112002-12-28 20:40:43 +0000332 // Get iterators defining the range of registers that are valid to allocate in
333 // this class, which also specifies the preferred allocation order.
334 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
335 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattner4664bd52002-12-17 02:50:10 +0000336
Chris Lattnerbfa53192003-01-13 00:25:40 +0000337 for (; RI != RE; ++RI)
338 if (isPhysRegAvailable(*RI)) { // Is reg unused?
339 assert(*RI != 0 && "Cannot use register!");
340 return *RI; // Found an unused register!
341 }
342 return 0;
343}
344
345
346/// liberatePhysReg - Make sure the specified physical register is available for
347/// use. If there is currently a value in it, it is either moved out of the way
348/// or spilled to memory.
349///
350void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
351 unsigned PhysReg) {
352 // FIXME: This code checks to see if a register is available, but it really
353 // wants to know if a reg is available BEFORE the instruction executes. If
354 // called after killed operands are freed, it runs the risk of reallocating a
355 // used operand...
356#if 0
357 if (isPhysRegAvailable(PhysReg)) return; // Already available...
358
359 // Check to see if the register is directly used, not indirectly used through
360 // aliases. If aliased registers are the ones actually used, we cannot be
361 // sure that we will be able to save the whole thing if we do a reg-reg copy.
362 std::map<unsigned, unsigned>::iterator PRUI = PhysRegsUsed.find(PhysReg);
363 if (PRUI != PhysRegsUsed.end()) {
364 unsigned VirtReg = PRUI->second; // The virtual register held...
365
366 // Check to see if there is a compatible register available. If so, we can
367 // move the value into the new register...
368 //
369 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
370 if (unsigned NewReg = getFreeReg(RC)) {
371 // Emit the code to copy the value...
372 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
373
374 // Update our internal state to indicate that PhysReg is available and Reg
375 // isn't.
376 Virt2PhysRegMap.erase(VirtReg);
377 removePhysReg(PhysReg); // Free the physreg
378
379 // Move reference over to new register...
380 assignVirtToPhysReg(VirtReg, NewReg);
381 return;
Chris Lattner4664bd52002-12-17 02:50:10 +0000382 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000383 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000384#endif
385 spillPhysReg(MBB, I, PhysReg);
386}
387
388
389/// getReg - Find a physical register to hold the specified virtual
390/// register. If all compatible physical registers are used, this method spills
391/// the last used virtual register to the stack, and uses that register.
392///
393unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
394 unsigned VirtReg) {
395 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
396
397 // First check to see if we have a free register of the requested type...
398 unsigned PhysReg = getFreeReg(RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000399
Chris Lattner4664bd52002-12-17 02:50:10 +0000400 // If we didn't find an unused register, scavenge one now!
Chris Lattner101b8cd2002-12-16 16:15:28 +0000401 if (PhysReg == 0) {
Chris Lattner0129b862002-12-16 17:44:42 +0000402 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattner4664bd52002-12-17 02:50:10 +0000403
404 // Loop over all of the preallocated registers from the least recently used
405 // to the most recently used. When we find one that is capable of holding
406 // our register, use it.
407 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattner101b8cd2002-12-16 16:15:28 +0000408 assert(i != PhysRegsUseOrder.size() &&
409 "Couldn't find a register of the appropriate class!");
Chris Lattner4664bd52002-12-17 02:50:10 +0000410
411 unsigned R = PhysRegsUseOrder[i];
Chris Lattnere6235442003-08-23 23:49:42 +0000412
413 // We can only use this register if it holds a virtual register (ie, it
414 // can be spilled). Do not use it if it is an explicitly allocated
415 // physical register!
416 assert(PhysRegsUsed.count(R) &&
417 "PhysReg in PhysRegsUseOrder, but is not allocated?");
418 if (PhysRegsUsed[R]) {
419 // If the current register is compatible, use it.
420 if (RegInfo->getRegClass(R) == RC) {
421 PhysReg = R;
422 break;
423 } else {
424 // If one of the registers aliased to the current register is
425 // compatible, use it.
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000426 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
427 *AliasSet; ++AliasSet) {
428 if (RegInfo->getRegClass(*AliasSet) == RC) {
429 PhysReg = *AliasSet; // Take an aliased register
430 break;
431 }
432 }
Chris Lattnere6235442003-08-23 23:49:42 +0000433 }
Chris Lattner4664bd52002-12-17 02:50:10 +0000434 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000435 }
436
Chris Lattner4664bd52002-12-17 02:50:10 +0000437 assert(PhysReg && "Physical register not assigned!?!?");
438
Chris Lattner101b8cd2002-12-16 16:15:28 +0000439 // At this point PhysRegsUseOrder[i] is the least recently used register of
440 // compatible register class. Spill it to memory and reap its remains.
Chris Lattner0129b862002-12-16 17:44:42 +0000441 spillPhysReg(MBB, I, PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000442 }
443
444 // Now that we know which register we need to assign this to, do it now!
Chris Lattnerbfa53192003-01-13 00:25:40 +0000445 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000446 return PhysReg;
447}
448
Chris Lattner4664bd52002-12-17 02:50:10 +0000449
Chris Lattner101b8cd2002-12-16 16:15:28 +0000450/// reloadVirtReg - This method loads the specified virtual register into a
451/// physical register, returning the physical register chosen. This updates the
452/// regalloc data structures to reflect the fact that the virtual reg is now
453/// alive in a physical register, and the previous one isn't.
454///
455unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
456 MachineBasicBlock::iterator &I,
457 unsigned VirtReg) {
458 std::map<unsigned, unsigned>::iterator It = Virt2PhysRegMap.find(VirtReg);
459 if (It != Virt2PhysRegMap.end()) {
460 MarkPhysRegRecentlyUsed(It->second);
461 return It->second; // Already have this value available!
462 }
463
Chris Lattnerbfa53192003-01-13 00:25:40 +0000464 unsigned PhysReg = getReg(MBB, I, VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000465
Chris Lattner42714ec2002-12-25 05:05:46 +0000466 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattnerb4e41112002-12-28 20:40:43 +0000467 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000468
Chris Lattnerbfa53192003-01-13 00:25:40 +0000469 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
470
Chris Lattner815b85e2003-08-04 23:36:39 +0000471 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
472 << RegInfo->getName(PhysReg) << "\n");
473
Chris Lattner101b8cd2002-12-16 16:15:28 +0000474 // Add move instruction(s)
Chris Lattnerb4e41112002-12-28 20:40:43 +0000475 RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000476 ++NumReloaded; // Update statistics
477 return PhysReg;
478}
479
Chris Lattner815b85e2003-08-04 23:36:39 +0000480
481
Chris Lattner101b8cd2002-12-16 16:15:28 +0000482void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
483 // loop over each instruction
484 MachineBasicBlock::iterator I = MBB.begin();
485 for (; I != MBB.end(); ++I) {
486 MachineInstr *MI = *I;
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000487 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattner815b85e2003-08-04 23:36:39 +0000488 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
489 std::cerr << " Regs have values: ";
490 for (std::map<unsigned, unsigned>::const_iterator
491 I = PhysRegsUsed.begin(), E = PhysRegsUsed.end(); I != E; ++I)
492 std::cerr << "[" << RegInfo->getName(I->first)
493 << ",%reg" << I->second << "] ";
494 std::cerr << "\n");
Chris Lattner101b8cd2002-12-16 16:15:28 +0000495
Chris Lattner4664bd52002-12-17 02:50:10 +0000496 // Loop over the implicit uses, making sure that they are at the head of the
497 // use order list, so they don't get reallocated.
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000498 for (const unsigned *ImplicitUses = TID.ImplicitUses;
499 *ImplicitUses; ++ImplicitUses)
500 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000501
Brian Gaeke91e16e72003-08-15 21:19:25 +0000502 // Get the used operands into registers. This has the potential to spill
Chris Lattner815b85e2003-08-04 23:36:39 +0000503 // incoming values if we are out of registers. Note that we completely
504 // ignore physical register uses here. We assume that if an explicit
505 // physical register is referenced by the instruction, that it is guaranteed
506 // to be live-in, or the input is badly hosed.
Chris Lattner101b8cd2002-12-16 16:15:28 +0000507 //
508 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenosaaba4632003-12-14 13:24:17 +0000509 if (MI->getOperand(i).isUse() &&
510 !MI->getOperand(i).isDef() &&
511 MI->getOperand(i).isVirtualRegister()){
Chris Lattner101b8cd2002-12-16 16:15:28 +0000512 unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum();
513 unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg);
514 MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register
515 }
516
Chris Lattnerbfa53192003-01-13 00:25:40 +0000517 if (!DisableKill) {
518 // If this instruction is the last user of anything in registers, kill the
519 // value, freeing the register being used, so it doesn't need to be
520 // spilled to memory.
521 //
522 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000523 KE = LV->killed_end(MI); KI != KE; ++KI) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000524 unsigned VirtReg = KI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000525 unsigned PhysReg = VirtReg;
Chris Lattnerc330b982004-01-31 21:27:19 +0000526 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
Chris Lattner5a78ee82003-05-12 03:54:14 +0000527 std::map<unsigned, unsigned>::iterator I =
528 Virt2PhysRegMap.find(VirtReg);
529 assert(I != Virt2PhysRegMap.end());
530 PhysReg = I->second;
531 Virt2PhysRegMap.erase(I);
532 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000533
Chris Lattner5a78ee82003-05-12 03:54:14 +0000534 if (PhysReg) {
Chris Lattner815b85e2003-08-04 23:36:39 +0000535 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
536 << "[%reg" << VirtReg <<"], removing it from live set\n");
Chris Lattner506fa682003-08-05 00:49:09 +0000537 removePhysReg(PhysReg);
Chris Lattner5a78ee82003-05-12 03:54:14 +0000538 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000539 }
540 }
541
542 // Loop over all of the operands of the instruction, spilling registers that
543 // are defined, and marking explicit destinations in the PhysRegsUsed map.
544 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenosaaba4632003-12-14 13:24:17 +0000545 if (MI->getOperand(i).isDef() &&
Chris Lattnerbfa53192003-01-13 00:25:40 +0000546 MI->getOperand(i).isPhysicalRegister()) {
547 unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
Chris Lattner931947d2003-08-17 18:01:15 +0000548 spillPhysReg(MBB, I, Reg, true); // Spill any existing value in the reg
Chris Lattnerbfa53192003-01-13 00:25:40 +0000549 PhysRegsUsed[Reg] = 0; // It is free and reserved now
550 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000551 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
552 *AliasSet; ++AliasSet) {
553 PhysRegsUseOrder.push_back(*AliasSet);
554 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
555 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000556 }
557
558 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenos9bced942003-12-13 01:20:58 +0000559 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
560 *ImplicitDefs; ++ImplicitDefs) {
561 unsigned Reg = *ImplicitDefs;
562 spillPhysReg(MBB, I, Reg);
563 PhysRegsUseOrder.push_back(Reg);
564 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000565 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
566 *AliasSet; ++AliasSet) {
567 PhysRegsUseOrder.push_back(*AliasSet);
568 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
569 }
Alkis Evlogimenos9bced942003-12-13 01:20:58 +0000570 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000571
Chris Lattner101b8cd2002-12-16 16:15:28 +0000572 // Okay, we have allocated all of the source operands and spilled any values
573 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattnerbfa53192003-01-13 00:25:40 +0000574 // implicit defs and assign them to a register, spilling incoming values if
575 // we need to scavenge a register.
Chris Lattnerd4627092002-12-18 08:14:26 +0000576 //
Chris Lattner101b8cd2002-12-16 16:15:28 +0000577 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenosaaba4632003-12-14 13:24:17 +0000578 if (MI->getOperand(i).isDef() &&
579 MI->getOperand(i).isVirtualRegister()) {
Chris Lattner101b8cd2002-12-16 16:15:28 +0000580 unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum();
581 unsigned DestPhysReg;
582
Alkis Evlogimenosc17d57b2003-12-18 13:08:52 +0000583 // If DestVirtReg already has a value, use it.
Chris Lattner5a78ee82003-05-12 03:54:14 +0000584 std::map<unsigned, unsigned>::iterator DestI =
585 Virt2PhysRegMap.find(DestVirtReg);
586 if (DestI != Virt2PhysRegMap.end()) {
Alkis Evlogimenosc17d57b2003-12-18 13:08:52 +0000587 DestPhysReg = DestI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000588 }
Alkis Evlogimenosc17d57b2003-12-18 13:08:52 +0000589 else {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000590 DestPhysReg = getReg(MBB, I, DestVirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000591 }
Chris Lattner5a78ee82003-05-12 03:54:14 +0000592 markVirtRegModified(DestVirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000593 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
594 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000595
596 if (!DisableKill) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000597 // If this instruction defines any registers that are immediately dead,
598 // kill them now.
599 //
600 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000601 KE = LV->dead_end(MI); KI != KE; ++KI) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000602 unsigned VirtReg = KI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000603 unsigned PhysReg = VirtReg;
Chris Lattnerc330b982004-01-31 21:27:19 +0000604 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
Chris Lattner5a78ee82003-05-12 03:54:14 +0000605 std::map<unsigned, unsigned>::iterator I =
606 Virt2PhysRegMap.find(VirtReg);
607 assert(I != Virt2PhysRegMap.end());
608 PhysReg = I->second;
609 Virt2PhysRegMap.erase(I);
610 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000611
Chris Lattner5a78ee82003-05-12 03:54:14 +0000612 if (PhysReg) {
Chris Lattner815b85e2003-08-04 23:36:39 +0000613 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
614 << " [%reg" << VirtReg
615 << "] is never used, removing it frame live list\n");
Chris Lattner5a78ee82003-05-12 03:54:14 +0000616 removePhysReg(PhysReg);
617 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000618 }
619 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000620 }
621
622 // Rewind the iterator to point to the first flow control instruction...
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000623 const TargetInstrInfo &TII = TM->getInstrInfo();
Chris Lattner176866c2003-01-16 18:06:43 +0000624 I = MBB.end();
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000625 while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
Chris Lattner101b8cd2002-12-16 16:15:28 +0000626 --I;
Chris Lattner101b8cd2002-12-16 16:15:28 +0000627
628 // Spill all physical registers holding virtual registers now.
629 while (!PhysRegsUsed.empty())
Chris Lattner92a199d2003-08-05 04:13:58 +0000630 if (unsigned VirtReg = PhysRegsUsed.begin()->second)
631 spillVirtReg(MBB, I, VirtReg, PhysRegsUsed.begin()->first);
632 else
633 removePhysReg(PhysRegsUsed.begin()->first);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000634
Chris Lattnerbfa53192003-01-13 00:25:40 +0000635 for (std::map<unsigned, unsigned>::iterator I = Virt2PhysRegMap.begin(),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000636 E = Virt2PhysRegMap.end(); I != E; ++I)
Chris Lattnerbfa53192003-01-13 00:25:40 +0000637 std::cerr << "Register still mapped: " << I->first << " -> "
Chris Lattner5a78ee82003-05-12 03:54:14 +0000638 << I->second << "\n";
Chris Lattnerbfa53192003-01-13 00:25:40 +0000639
Chris Lattner101b8cd2002-12-16 16:15:28 +0000640 assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
Chris Lattner931947d2003-08-17 18:01:15 +0000641
642 // Clear any physical register which appear live at the end of the basic
643 // block, but which do not hold any virtual registers. e.g., the stack
644 // pointer.
645 PhysRegsUseOrder.clear();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000646}
647
Chris Lattner0ea32b82002-12-17 03:16:10 +0000648
Chris Lattner101b8cd2002-12-16 16:15:28 +0000649/// runOnMachineFunction - Register allocate the whole function
650///
651bool RA::runOnMachineFunction(MachineFunction &Fn) {
652 DEBUG(std::cerr << "Machine Function " << "\n");
653 MF = &Fn;
Chris Lattnerb4e41112002-12-28 20:40:43 +0000654 TM = &Fn.getTarget();
655 RegInfo = TM->getRegisterInfo();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000656
Chris Lattnerd4627092002-12-18 08:14:26 +0000657 if (!DisableKill)
Chris Lattnerbfa53192003-01-13 00:25:40 +0000658 LV = &getAnalysis<LiveVariables>();
Chris Lattnerd4627092002-12-18 08:14:26 +0000659
Chris Lattner101b8cd2002-12-16 16:15:28 +0000660 // Loop over all of the basic blocks, eliminating virtual register references
661 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
662 MBB != MBBe; ++MBB)
663 AllocateBasicBlock(*MBB);
664
Chris Lattnerb4e41112002-12-28 20:40:43 +0000665 StackSlotForVirtReg.clear();
Chris Lattnerbfa53192003-01-13 00:25:40 +0000666 VirtRegModified.clear();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000667 return true;
668}
669
Chris Lattnerc330b982004-01-31 21:27:19 +0000670FunctionPass *llvm::createLocalRegisterAllocator() {
Chris Lattnerb4e41112002-12-28 20:40:43 +0000671 return new RA();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000672}
Brian Gaeke960707c2003-11-11 22:41:34 +0000673