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James Molloy8c545332011-08-30 07:23:29 +00001//===-- MipsMCTargetDesc.h - Mips Target Descriptions -----------*- C++ -*-===//
Evan Chengbc153d42011-07-14 20:59:42 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
James Molloy8c545332011-08-30 07:23:29 +000010// This file provides Mips specific target descriptions.
Evan Chengbc153d42011-07-14 20:59:42 +000011//
12//===----------------------------------------------------------------------===//
13
James Molloy8c545332011-08-30 07:23:29 +000014#ifndef MIPSMCTARGETDESC_H
15#define MIPSMCTARGETDESC_H
Evan Chengbc153d42011-07-14 20:59:42 +000016
Rafael Espindola1dc45d82011-12-22 03:03:17 +000017#include "llvm/Support/DataTypes.h"
18
Evan Chengbc153d42011-07-14 20:59:42 +000019namespace llvm {
Akira Hatanaka44220ca2011-09-30 21:23:45 +000020class MCAsmBackend;
Akira Hatanaka750ecec2011-09-30 20:40:03 +000021class MCCodeEmitter;
22class MCContext;
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +000023class MCInstrInfo;
24class MCObjectWriter;
Jim Grosbachc3b04272012-05-15 17:35:52 +000025class MCRegisterInfo;
Evan Chengbc153d42011-07-14 20:59:42 +000026class MCSubtargetInfo;
Evan Chengbc153d42011-07-14 20:59:42 +000027class StringRef;
Akira Hatanaka750ecec2011-09-30 20:40:03 +000028class Target;
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +000029class raw_ostream;
Evan Chengbc153d42011-07-14 20:59:42 +000030
31extern Target TheMipsTarget;
32extern Target TheMipselTarget;
Akira Hatanaka3d673cc2011-09-21 03:00:58 +000033extern Target TheMips64Target;
34extern Target TheMips64elTarget;
Evan Chengbc153d42011-07-14 20:59:42 +000035
Akira Hatanaka1ee768d2012-03-01 01:53:15 +000036MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
Jim Grosbachc3b04272012-05-15 17:35:52 +000037 const MCRegisterInfo &MRI,
Akira Hatanaka1ee768d2012-03-01 01:53:15 +000038 const MCSubtargetInfo &STI,
39 MCContext &Ctx);
40MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
Jim Grosbachc3b04272012-05-15 17:35:52 +000041 const MCRegisterInfo &MRI,
Akira Hatanaka1ee768d2012-03-01 01:53:15 +000042 const MCSubtargetInfo &STI,
43 MCContext &Ctx);
Akira Hatanaka44220ca2011-09-30 21:23:45 +000044
Akira Hatanakab1f68f92012-04-02 19:25:22 +000045MCAsmBackend *createMipsAsmBackendEB32(const Target &T, StringRef TT);
46MCAsmBackend *createMipsAsmBackendEL32(const Target &T, StringRef TT);
47MCAsmBackend *createMipsAsmBackendEB64(const Target &T, StringRef TT);
48MCAsmBackend *createMipsAsmBackendEL64(const Target &T, StringRef TT);
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +000049
Rafael Espindola1dc45d82011-12-22 03:03:17 +000050MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
Akira Hatanaka1ee768d2012-03-01 01:53:15 +000051 uint8_t OSABI,
Akira Hatanakab1f68f92012-04-02 19:25:22 +000052 bool IsLittleEndian,
53 bool Is64Bit);
Evan Chengbc153d42011-07-14 20:59:42 +000054} // End llvm namespace
55
56// Defines symbolic names for Mips registers. This defines a mapping from
57// register name to register number.
58#define GET_REGINFO_ENUM
59#include "MipsGenRegisterInfo.inc"
60
61// Defines symbolic names for the Mips instructions.
62#define GET_INSTRINFO_ENUM
63#include "MipsGenInstrInfo.inc"
64
65#define GET_SUBTARGETINFO_ENUM
66#include "MipsGenSubtargetInfo.inc"
67
68#endif