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Chris Lattner0d5644b2003-01-13 00:26:36 +00001//===-- TargetInstrInfo.cpp - Target Instruction Information --------------===//
Misha Brukman10468d82005-04-21 22:55:34 +00002//
John Criswell482202a2003-10-20 19:43:21 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukman10468d82005-04-21 22:55:34 +00007//
John Criswell482202a2003-10-20 19:43:21 +00008//===----------------------------------------------------------------------===//
Chris Lattner910b82f2002-10-28 23:55:33 +00009//
Chris Lattnerf6932b72005-01-19 06:53:34 +000010// This file implements the TargetInstrInfo class.
Chris Lattner910b82f2002-10-28 23:55:33 +000011//
12//===----------------------------------------------------------------------===//
13
Chris Lattnerb4d58d72003-01-14 22:00:31 +000014#include "llvm/Target/TargetInstrInfo.h"
Evan Cheng367a5df2010-09-09 18:18:55 +000015#include "llvm/Target/TargetInstrItineraries.h"
Evan Cheng1ff27272009-05-05 00:30:09 +000016#include "llvm/Target/TargetRegisterInfo.h"
Evan Cheng49d4c0b2010-10-06 06:27:31 +000017#include "llvm/CodeGen/SelectionDAGNodes.h"
18#include "llvm/MC/MCAsmInfo.h"
Chris Lattner01614192009-08-02 04:58:19 +000019#include "llvm/Support/ErrorHandling.h"
Nick Lewycky0de20af2010-12-19 20:43:38 +000020#include <cctype>
Chris Lattnerf6932b72005-01-19 06:53:34 +000021using namespace llvm;
Chris Lattner910b82f2002-10-28 23:55:33 +000022
Chris Lattnere98a3c32009-08-02 05:20:37 +000023//===----------------------------------------------------------------------===//
24// TargetOperandInfo
25//===----------------------------------------------------------------------===//
26
27/// getRegClass - Get the register class for the operand, handling resolution
28/// of "symbolic" pointer register classes etc. If this is not a register
29/// operand, this returns null.
30const TargetRegisterClass *
31TargetOperandInfo::getRegClass(const TargetRegisterInfo *TRI) const {
32 if (isLookupPtrRegClass())
33 return TRI->getPointerRegClass(RegClass);
Dan Gohman882bb292010-06-18 18:13:55 +000034 // Instructions like INSERT_SUBREG do not have fixed register classes.
35 if (RegClass < 0)
36 return 0;
37 // Otherwise just look it up normally.
Chris Lattnere98a3c32009-08-02 05:20:37 +000038 return TRI->getRegClass(RegClass);
39}
40
41//===----------------------------------------------------------------------===//
42// TargetInstrInfo
43//===----------------------------------------------------------------------===//
44
Chris Lattner03ad8852008-01-07 07:27:27 +000045TargetInstrInfo::TargetInstrInfo(const TargetInstrDesc* Desc,
Misha Brukmane73e76d2005-04-22 17:54:37 +000046 unsigned numOpcodes)
Chris Lattner03ad8852008-01-07 07:27:27 +000047 : Descriptors(Desc), NumOpcodes(numOpcodes) {
Chris Lattner910b82f2002-10-28 23:55:33 +000048}
49
Chris Lattner0d5644b2003-01-13 00:26:36 +000050TargetInstrInfo::~TargetInstrInfo() {
Chris Lattner910b82f2002-10-28 23:55:33 +000051}
52
Evan Cheng367a5df2010-09-09 18:18:55 +000053unsigned
Evan Chengdebf9c52010-11-03 00:45:17 +000054TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,
55 const MachineInstr *MI) const {
Evan Chengbf407072010-09-10 01:29:16 +000056 if (!ItinData || ItinData->isEmpty())
Evan Cheng367a5df2010-09-09 18:18:55 +000057 return 1;
58
59 unsigned Class = MI->getDesc().getSchedClass();
Bob Wilson2c00b502010-09-15 16:28:21 +000060 unsigned UOps = ItinData->Itineraries[Class].NumMicroOps;
Evan Cheng367a5df2010-09-09 18:18:55 +000061 if (UOps)
62 return UOps;
63
64 // The # of u-ops is dynamically determined. The specific target should
65 // override this function to return the right number.
66 return 1;
67}
68
Evan Cheng49d4c0b2010-10-06 06:27:31 +000069int
70TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
71 const MachineInstr *DefMI, unsigned DefIdx,
72 const MachineInstr *UseMI, unsigned UseIdx) const {
73 if (!ItinData || ItinData->isEmpty())
74 return -1;
75
76 unsigned DefClass = DefMI->getDesc().getSchedClass();
77 unsigned UseClass = UseMI->getDesc().getSchedClass();
78 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
79}
80
81int
82TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
83 SDNode *DefNode, unsigned DefIdx,
84 SDNode *UseNode, unsigned UseIdx) const {
85 if (!ItinData || ItinData->isEmpty())
86 return -1;
87
88 if (!DefNode->isMachineOpcode())
89 return -1;
90
91 unsigned DefClass = get(DefNode->getMachineOpcode()).getSchedClass();
92 if (!UseNode->isMachineOpcode())
93 return ItinData->getOperandCycle(DefClass, DefIdx);
94 unsigned UseClass = get(UseNode->getMachineOpcode()).getSchedClass();
95 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
96}
97
Evan Chengdebf9c52010-11-03 00:45:17 +000098int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
99 const MachineInstr *MI,
100 unsigned *PredCost) const {
101 if (!ItinData || ItinData->isEmpty())
102 return 1;
103
104 return ItinData->getStageLatency(MI->getDesc().getSchedClass());
105}
106
107int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
108 SDNode *N) const {
109 if (!ItinData || ItinData->isEmpty())
110 return 1;
111
112 if (!N->isMachineOpcode())
113 return 1;
114
115 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass());
116}
117
Evan Chenge96b8d72010-10-26 02:08:50 +0000118bool TargetInstrInfo::hasLowDefLatency(const InstrItineraryData *ItinData,
119 const MachineInstr *DefMI,
120 unsigned DefIdx) const {
121 if (!ItinData || ItinData->isEmpty())
122 return false;
123
124 unsigned DefClass = DefMI->getDesc().getSchedClass();
125 int DefCycle = ItinData->getOperandCycle(DefClass, DefIdx);
126 return (DefCycle != -1 && DefCycle <= 1);
127}
Evan Cheng49d4c0b2010-10-06 06:27:31 +0000128
Chris Lattner01614192009-08-02 04:58:19 +0000129/// insertNoop - Insert a noop into the instruction stream at the specified
130/// point.
Andrew Trickc416ba62010-12-24 04:28:06 +0000131void TargetInstrInfo::insertNoop(MachineBasicBlock &MBB,
Chris Lattner01614192009-08-02 04:58:19 +0000132 MachineBasicBlock::iterator MI) const {
133 llvm_unreachable("Target didn't implement insertNoop!");
134}
135
136
Evan Cheng5514bbe2007-06-08 21:59:56 +0000137bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
Chris Lattner03ad8852008-01-07 07:27:27 +0000138 const TargetInstrDesc &TID = MI->getDesc();
139 if (!TID.isTerminator()) return false;
Andrew Trickc416ba62010-12-24 04:28:06 +0000140
Chris Lattnera98c6792008-01-07 01:56:04 +0000141 // Conditional branch is a special case.
Chris Lattner03ad8852008-01-07 07:27:27 +0000142 if (TID.isBranch() && !TID.isBarrier())
Chris Lattnera98c6792008-01-07 01:56:04 +0000143 return true;
Chris Lattner03ad8852008-01-07 07:27:27 +0000144 if (!TID.isPredicable())
Chris Lattnera98c6792008-01-07 01:56:04 +0000145 return true;
146 return !isPredicated(MI);
Evan Cheng5514bbe2007-06-08 21:59:56 +0000147}
Evan Cheng1ff27272009-05-05 00:30:09 +0000148
Chris Lattnerf3239532009-07-29 21:10:12 +0000149
Chris Lattnere98a3c32009-08-02 05:20:37 +0000150/// Measure the specified inline asm to determine an approximation of its
151/// length.
152/// Comments (which run till the next SeparatorChar or newline) do not
153/// count as an instruction.
154/// Any other non-whitespace text is considered an instruction, with
155/// multiple instructions separated by SeparatorChar or newlines.
156/// Variable-length instructions are not handled here; this function
157/// may be overloaded in the target code to do that.
158unsigned TargetInstrInfo::getInlineAsmLength(const char *Str,
Chris Lattnere9a75a62009-08-22 21:43:10 +0000159 const MCAsmInfo &MAI) const {
Andrew Trickc416ba62010-12-24 04:28:06 +0000160
161
Chris Lattnere98a3c32009-08-02 05:20:37 +0000162 // Count the number of instructions in the asm.
163 bool atInsnStart = true;
164 unsigned Length = 0;
165 for (; *Str; ++Str) {
Chris Lattnere9a75a62009-08-22 21:43:10 +0000166 if (*Str == '\n' || *Str == MAI.getSeparatorChar())
Chris Lattnere98a3c32009-08-02 05:20:37 +0000167 atInsnStart = true;
Nick Lewyckyb71afe82010-12-19 20:42:43 +0000168 if (atInsnStart && !std::isspace(*Str)) {
Chris Lattnere9a75a62009-08-22 21:43:10 +0000169 Length += MAI.getMaxInstLength();
Chris Lattnere98a3c32009-08-02 05:20:37 +0000170 atInsnStart = false;
171 }
Chris Lattnere9a75a62009-08-22 21:43:10 +0000172 if (atInsnStart && strncmp(Str, MAI.getCommentString(),
173 strlen(MAI.getCommentString())) == 0)
Chris Lattnere98a3c32009-08-02 05:20:37 +0000174 atInsnStart = false;
175 }
Andrew Trickc416ba62010-12-24 04:28:06 +0000176
Chris Lattnere98a3c32009-08-02 05:20:37 +0000177 return Length;
178}