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gerrit-public.fairphone.software / toolchain / llvm-project / c6ae7b4763f6b12602f116cb15c5d19c628e2c21 / . / llvm / test / CodeGen / MSP430 / cc_args.ll
blob: 39e99e2637449be888ad0f960b20145502d8a83b [file] [log] [blame]
Job Noormane9a1d4c2013-10-15 08:19:39 +0000[diff] [blame]1; RUN: llc < %s | FileCheck %s
2
3target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16-a0:16:16"
4target triple = "msp430---elf"
5
6define void @test() #0 {
7entry:
8; CHECK: test:
9
10; CHECK: mov.w #1, r15
11; CHECK: call #f_i16
12 call void @f_i16(i16 1)
13
14; CHECK: mov.w #772, r14
15; CHECK: mov.w #258, r15
16; CHECK: call #f_i32
17 call void @f_i32(i32 16909060)
18
19; CHECK: mov.w #1800, r12
20; CHECK: mov.w #1286, r13
21; CHECK: mov.w #772, r14
22; CHECK: mov.w #258, r15
23; CHECK: call #f_i64
24 call void @f_i64(i64 72623859790382856)
25
26; CHECK: mov.w #772, r14
27; CHECK: mov.w #258, r15
28; CHECK: mov.w #1800, r12
29; CHECK: mov.w #1286, r13
30; CHECK: call #f_i32_i32
31 call void @f_i32_i32(i32 16909060, i32 84281096)
32
33; CHECK: mov.w #1, r15
34; CHECK: mov.w #772, r13
35; CHECK: mov.w #258, r14
36; CHECK: mov.w #2, r12
37; CHECK: call #f_i16_i32_i16
38 call void @f_i16_i32_i16(i16 1, i32 16909060, i16 2)
39
40; CHECK: mov.w #2, 8(r1)
41; CHECK: mov.w #258, 6(r1)
42; CHECK: mov.w #772, 4(r1)
43; CHECK: mov.w #1286, 2(r1)
44; CHECK: mov.w #1800, 0(r1)
45; CHECK: mov.w #1, r15
46; CHECK: call #f_i16_i64_i16
47 call void @f_i16_i64_i16(i16 1, i64 72623859790382856, i16 2)
48
49 ret void
50}
51
52@g_i16 = common global i16 0, align 2
53@g_i32 = common global i32 0, align 2
54@g_i64 = common global i64 0, align 2
55
56define void @f_i16(i16 %a) #0 {
57; CHECK: f_i16:
58; CHECK: mov.w r15, &g_i16
59 store volatile i16 %a, i16* @g_i16, align 2
60 ret void
61}
62
63define void @f_i32(i32 %a) #0 {
64; CHECK: f_i32:
65; CHECK: mov.w r15, &g_i32+2
66; CHECK: mov.w r14, &g_i32
67 store volatile i32 %a, i32* @g_i32, align 2
68 ret void
69}
70
71define void @f_i64(i64 %a) #0 {
72; CHECK: f_i64:
73; CHECK: mov.w r15, &g_i64+6
74; CHECK: mov.w r14, &g_i64+4
75; CHECK: mov.w r13, &g_i64+2
76; CHECK: mov.w r12, &g_i64
77 store volatile i64 %a, i64* @g_i64, align 2
78 ret void
79}
80
81define void @f_i32_i32(i32 %a, i32 %b) #0 {
82; CHECK: f_i32_i32:
83; CHECK: mov.w r15, &g_i32+2
84; CHECK: mov.w r14, &g_i32
85 store volatile i32 %a, i32* @g_i32, align 2
86; CHECK: mov.w r13, &g_i32+2
87; CHECK: mov.w r12, &g_i32
88 store volatile i32 %b, i32* @g_i32, align 2
89 ret void
90}
91
92define void @f_i16_i32_i16(i16 %a, i32 %b, i16 %c) #0 {
93; CHECK: f_i16_i32_i16:
94; CHECK: mov.w r15, &g_i16
95 store volatile i16 %a, i16* @g_i16, align 2
96; CHECK: mov.w r14, &g_i32+2
97; CHECK: mov.w r13, &g_i32
98 store volatile i32 %b, i32* @g_i32, align 2
99; CHECK: mov.w r12, &g_i16
100 store volatile i16 %c, i16* @g_i16, align 2
101 ret void
102}
103
104define void @f_i16_i64_i16(i16 %a, i64 %b, i16 %c) #0 {
105; CHECK: f_i16_i64_i16:
106; CHECK: mov.w r15, &g_i16
107 store volatile i16 %a, i16* @g_i16, align 2
108;CHECK: mov.w 10(r4), &g_i64+6
109;CHECK: mov.w 8(r4), &g_i64+4
110;CHECK: mov.w 6(r4), &g_i64+2
111;CHECK: mov.w 4(r4), &g_i64
112 store volatile i64 %b, i64* @g_i64, align 2
113;CHECK: mov.w 12(r4), &g_i16
114 store volatile i16 %c, i16* @g_i16, align 2
115 ret void
116}
117
118attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }