| Tom Stellard | 6ec9e80 | 2013-06-20 21:55:23 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s |
| Tom Stellard | 70f13db | 2013-10-10 17:11:46 +0000 | [diff] [blame] | 2 | ; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s |
| Tom Stellard | 3715734 | 2013-06-15 00:09:31 +0000 | [diff] [blame] | 3 | |
| 4 | ; load a v2i32 value from the global address space. |
| Tom Stellard | 6ec9e80 | 2013-06-20 21:55:23 +0000 | [diff] [blame] | 5 | ; EG-CHECK: @load_v2i32 |
| Tom Stellard | 0344cdf | 2013-08-01 15:23:42 +0000 | [diff] [blame] | 6 | ; EG-CHECK: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0 |
| Tom Stellard | 3715734 | 2013-06-15 00:09:31 +0000 | [diff] [blame] | 7 | ; SI-CHECK: @load_v2i32 |
| Matt Arsenault | 72b31ee | 2013-11-12 02:35:51 +0000 | [diff] [blame] | 8 | ; SI-CHECK: BUFFER_LOAD_DWORDX2 v[{{[0-9]+:[0-9]+}}] |
| Tom Stellard | 3715734 | 2013-06-15 00:09:31 +0000 | [diff] [blame] | 9 | define void @load_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { |
| 10 | %a = load <2 x i32> addrspace(1) * %in |
| 11 | store <2 x i32> %a, <2 x i32> addrspace(1)* %out |
| 12 | ret void |
| 13 | } |
| 14 | |
| 15 | ; load a v4i32 value from the global address space. |
| Tom Stellard | 6ec9e80 | 2013-06-20 21:55:23 +0000 | [diff] [blame] | 16 | ; EG-CHECK: @load_v4i32 |
| 17 | ; EG-CHECK: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0 |
| Tom Stellard | 3715734 | 2013-06-15 00:09:31 +0000 | [diff] [blame] | 18 | ; SI-CHECK: @load_v4i32 |
| Matt Arsenault | 72b31ee | 2013-11-12 02:35:51 +0000 | [diff] [blame] | 19 | ; SI-CHECK: BUFFER_LOAD_DWORDX4 v[{{[0-9]+:[0-9]+}}] |
| Tom Stellard | 3715734 | 2013-06-15 00:09:31 +0000 | [diff] [blame] | 20 | define void @load_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { |
| 21 | %a = load <4 x i32> addrspace(1) * %in |
| 22 | store <4 x i32> %a, <4 x i32> addrspace(1)* %out |
| 23 | ret void |
| 24 | } |