Pete Couperus | 2d1f6d6 | 2017-08-24 15:40:33 +0000 | [diff] [blame] | 1 | //===- ARCTargetMachine.cpp - Define TargetMachine for ARC ------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #include "ARCTargetMachine.h" |
| 14 | #include "ARC.h" |
| 15 | #include "ARCTargetTransformInfo.h" |
| 16 | #include "llvm/CodeGen/Passes.h" |
| 17 | #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" |
| 18 | #include "llvm/CodeGen/TargetPassConfig.h" |
| 19 | #include "llvm/Support/TargetRegistry.h" |
| 20 | |
| 21 | using namespace llvm; |
| 22 | |
| 23 | static Reloc::Model getRelocModel(Optional<Reloc::Model> RM) { |
| 24 | if (!RM.hasValue()) |
| 25 | return Reloc::Static; |
| 26 | return *RM; |
| 27 | } |
| 28 | |
Pete Couperus | 2d1f6d6 | 2017-08-24 15:40:33 +0000 | [diff] [blame] | 29 | /// ARCTargetMachine ctor - Create an ILP32 architecture model |
| 30 | ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT, |
| 31 | StringRef CPU, StringRef FS, |
| 32 | const TargetOptions &Options, |
| 33 | Optional<Reloc::Model> RM, |
| 34 | Optional<CodeModel::Model> CM, |
| 35 | CodeGenOpt::Level OL, bool JIT) |
Matthias Braun | bb8507e | 2017-10-12 22:57:28 +0000 | [diff] [blame] | 36 | : LLVMTargetMachine(T, |
| 37 | "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" |
| 38 | "f32:32:32-i64:32-f64:32-a:0:32-n32", |
| 39 | TT, CPU, FS, Options, getRelocModel(RM), |
David Green | ca29c27 | 2018-12-07 12:10:23 +0000 | [diff] [blame^] | 40 | getEffectiveCodeModel(CM, CodeModel::Small), OL), |
Pete Couperus | 2d1f6d6 | 2017-08-24 15:40:33 +0000 | [diff] [blame] | 41 | TLOF(make_unique<TargetLoweringObjectFileELF>()), |
| 42 | Subtarget(TT, CPU, FS, *this) { |
| 43 | initAsmInfo(); |
| 44 | } |
| 45 | |
| 46 | ARCTargetMachine::~ARCTargetMachine() = default; |
| 47 | |
| 48 | namespace { |
| 49 | |
| 50 | /// ARC Code Generator Pass Configuration Options. |
| 51 | class ARCPassConfig : public TargetPassConfig { |
| 52 | public: |
| 53 | ARCPassConfig(ARCTargetMachine &TM, PassManagerBase &PM) |
| 54 | : TargetPassConfig(TM, PM) {} |
| 55 | |
| 56 | ARCTargetMachine &getARCTargetMachine() const { |
| 57 | return getTM<ARCTargetMachine>(); |
| 58 | } |
| 59 | |
| 60 | bool addInstSelector() override; |
| 61 | void addPreEmitPass() override; |
| 62 | void addPreRegAlloc() override; |
| 63 | }; |
| 64 | |
| 65 | } // end anonymous namespace |
| 66 | |
| 67 | TargetPassConfig *ARCTargetMachine::createPassConfig(PassManagerBase &PM) { |
| 68 | return new ARCPassConfig(*this, PM); |
| 69 | } |
| 70 | |
| 71 | bool ARCPassConfig::addInstSelector() { |
| 72 | addPass(createARCISelDag(getARCTargetMachine(), getOptLevel())); |
| 73 | return false; |
| 74 | } |
| 75 | |
| 76 | void ARCPassConfig::addPreEmitPass() { addPass(createARCBranchFinalizePass()); } |
| 77 | |
| 78 | void ARCPassConfig::addPreRegAlloc() { addPass(createARCExpandPseudosPass()); } |
| 79 | |
| 80 | // Force static initialization. |
| 81 | extern "C" void LLVMInitializeARCTarget() { |
| 82 | RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget()); |
| 83 | } |
| 84 | |
Sanjoy Das | 26d11ca | 2017-12-22 18:21:59 +0000 | [diff] [blame] | 85 | TargetTransformInfo |
| 86 | ARCTargetMachine::getTargetTransformInfo(const Function &F) { |
| 87 | return TargetTransformInfo(ARCTTIImpl(this, F)); |
Pete Couperus | 2d1f6d6 | 2017-08-24 15:40:33 +0000 | [diff] [blame] | 88 | } |