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gerrit-public.fairphone.software / toolchain / llvm-project / ca38c762e46c22566f09e41712c2ea3ea2e1240a / . / llvm / test / CodeGen / AMDGPU / fminnum.f64.ll
blob: 475615e52cb93ccb8069917e1389f5b56680f7ad [file] [log] [blame]
Matt Arsenault36b4b0b2017-08-07 18:30:35 +0000[diff] [blame]1; RUN: llc -march=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Marek Olsak75170772015-01-27 17:27:15 +0000[diff] [blame]2; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Matt Arsenault7c936902014-10-21 23:01:01 +0000[diff] [blame]3
4declare double @llvm.minnum.f64(double, double) #0
5declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>) #0
6declare <4 x double> @llvm.minnum.v4f64(<4 x double>, <4 x double>) #0
7declare <8 x double> @llvm.minnum.v8f64(<8 x double>, <8 x double>) #0
8declare <16 x double> @llvm.minnum.v16f64(<16 x double>, <16 x double>) #0
9
10; FUNC-LABEL: @test_fmin_f64
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]11; SI: v_min_f64
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000[diff] [blame]12define amdgpu_kernel void @test_fmin_f64(double addrspace(1)* %out, double %a, double %b) nounwind {
Matt Arsenault7c936902014-10-21 23:01:01 +0000[diff] [blame]13 %val = call double @llvm.minnum.f64(double %a, double %b) #0
14 store double %val, double addrspace(1)* %out, align 8
15 ret void
16}
17
18; FUNC-LABEL: @test_fmin_v2f64
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]19; SI: v_min_f64
20; SI: v_min_f64
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000[diff] [blame]21define amdgpu_kernel void @test_fmin_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %a, <2 x double> %b) nounwind {
Matt Arsenault7c936902014-10-21 23:01:01 +0000[diff] [blame]22 %val = call <2 x double> @llvm.minnum.v2f64(<2 x double> %a, <2 x double> %b) #0
23 store <2 x double> %val, <2 x double> addrspace(1)* %out, align 16
24 ret void
25}
26
27; FUNC-LABEL: @test_fmin_v4f64
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]28; SI: v_min_f64
29; SI: v_min_f64
30; SI: v_min_f64
31; SI: v_min_f64
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000[diff] [blame]32define amdgpu_kernel void @test_fmin_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %a, <4 x double> %b) nounwind {
Matt Arsenault7c936902014-10-21 23:01:01 +0000[diff] [blame]33 %val = call <4 x double> @llvm.minnum.v4f64(<4 x double> %a, <4 x double> %b) #0
34 store <4 x double> %val, <4 x double> addrspace(1)* %out, align 32
35 ret void
36}
37
38; FUNC-LABEL: @test_fmin_v8f64
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]39; SI: v_min_f64
40; SI: v_min_f64
41; SI: v_min_f64
42; SI: v_min_f64
43; SI: v_min_f64
44; SI: v_min_f64
45; SI: v_min_f64
46; SI: v_min_f64
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000[diff] [blame]47define amdgpu_kernel void @test_fmin_v8f64(<8 x double> addrspace(1)* %out, <8 x double> %a, <8 x double> %b) nounwind {
Matt Arsenault7c936902014-10-21 23:01:01 +0000[diff] [blame]48 %val = call <8 x double> @llvm.minnum.v8f64(<8 x double> %a, <8 x double> %b) #0
49 store <8 x double> %val, <8 x double> addrspace(1)* %out, align 64
50 ret void
51}
52
53; FUNC-LABEL: @test_fmin_v16f64
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]54; SI: v_min_f64
55; SI: v_min_f64
56; SI: v_min_f64
57; SI: v_min_f64
58; SI: v_min_f64
59; SI: v_min_f64
60; SI: v_min_f64
61; SI: v_min_f64
62; SI: v_min_f64
63; SI: v_min_f64
64; SI: v_min_f64
65; SI: v_min_f64
66; SI: v_min_f64
67; SI: v_min_f64
68; SI: v_min_f64
69; SI: v_min_f64
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000[diff] [blame]70define amdgpu_kernel void @test_fmin_v16f64(<16 x double> addrspace(1)* %out, <16 x double> %a, <16 x double> %b) nounwind {
Matt Arsenault7c936902014-10-21 23:01:01 +0000[diff] [blame]71 %val = call <16 x double> @llvm.minnum.v16f64(<16 x double> %a, <16 x double> %b) #0
72 store <16 x double> %val, <16 x double> addrspace(1)* %out, align 128
73 ret void
74}
75
76attributes #0 = { nounwind readnone }