| Colin LeMahieu | 96bfaa9 | 2015-03-09 19:57:18 +0000 | [diff] [blame] | 1 | ; XFAIL: |
| Jyotsna Verma | 6031625 | 2013-02-05 19:20:45 +0000 | [diff] [blame] | 2 | ; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s |
| 3 | ; Generate various cmpb instruction followed by if (p0) .. if (!p0)... |
| 4 | target triple = "hexagon" |
| 5 | |
| 6 | define i32 @Func_3Ugt(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 7 | entry: |
| 8 | ; CHECK-NOT: mux |
| 9 | %cmp = icmp ugt i32 %Enum_Par_Val, %pv2 |
| 10 | %selv = zext i1 %cmp to i32 |
| 11 | ret i32 %selv |
| 12 | } |
| 13 | |
| 14 | define i32 @Func_3Uge(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 15 | entry: |
| 16 | ; CHECK-NOT: mux |
| 17 | %cmp = icmp uge i32 %Enum_Par_Val, %pv2 |
| 18 | %selv = zext i1 %cmp to i32 |
| 19 | ret i32 %selv |
| 20 | } |
| 21 | |
| 22 | define i32 @Func_3Ult(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 23 | entry: |
| 24 | ; CHECK-NOT: mux |
| 25 | %cmp = icmp ult i32 %Enum_Par_Val, %pv2 |
| 26 | %selv = zext i1 %cmp to i32 |
| 27 | ret i32 %selv |
| 28 | } |
| 29 | |
| 30 | define i32 @Func_3Ule(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 31 | entry: |
| 32 | ; CHECK-NOT: mux |
| 33 | %cmp = icmp ule i32 %Enum_Par_Val, %pv2 |
| 34 | %selv = zext i1 %cmp to i32 |
| 35 | ret i32 %selv |
| 36 | } |
| 37 | |
| 38 | define i32 @Func_3Ueq(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 39 | entry: |
| 40 | ; CHECK-NOT: mux |
| 41 | %cmp = icmp eq i32 %Enum_Par_Val, %pv2 |
| 42 | %selv = zext i1 %cmp to i32 |
| 43 | ret i32 %selv |
| 44 | } |
| 45 | |
| 46 | define i32 @Func_3Une(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 47 | entry: |
| 48 | ; CHECK-NOT: mux |
| 49 | %cmp = icmp ne i32 %Enum_Par_Val, %pv2 |
| 50 | %selv = zext i1 %cmp to i32 |
| 51 | ret i32 %selv |
| 52 | } |
| 53 | |
| 54 | define i32 @Func_3UneC(i32 %Enum_Par_Val) nounwind readnone { |
| 55 | entry: |
| 56 | ; CHECK-NOT: mux |
| 57 | %cmp = icmp ne i32 %Enum_Par_Val, 122 |
| 58 | %selv = zext i1 %cmp to i32 |
| 59 | ret i32 %selv |
| 60 | } |
| 61 | |
| 62 | define i32 @Func_3gt(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 63 | entry: |
| 64 | ; CHECK: mux |
| 65 | %cmp = icmp sgt i32 %Enum_Par_Val, %pv2 |
| 66 | %selv = zext i1 %cmp to i32 |
| 67 | ret i32 %selv |
| 68 | } |
| 69 | |
| 70 | define i32 @Func_3ge(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 71 | entry: |
| 72 | ; CHECK-NOT: mux |
| 73 | %cmp = icmp sge i32 %Enum_Par_Val, %pv2 |
| 74 | %selv = zext i1 %cmp to i32 |
| 75 | ret i32 %selv |
| 76 | } |
| 77 | |
| 78 | define i32 @Func_3lt(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 79 | entry: |
| 80 | ; CHECK-NOT: mux |
| 81 | %cmp = icmp slt i32 %Enum_Par_Val, %pv2 |
| 82 | %selv = zext i1 %cmp to i32 |
| 83 | ret i32 %selv |
| 84 | } |
| 85 | |
| 86 | define i32 @Func_3le(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 87 | entry: |
| 88 | ; CHECK-NOT: mux |
| 89 | %cmp = icmp sle i32 %Enum_Par_Val, %pv2 |
| 90 | %selv = zext i1 %cmp to i32 |
| 91 | ret i32 %selv |
| 92 | } |
| 93 | |
| 94 | define i32 @Func_3eq(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 95 | entry: |
| 96 | ; CHECK-NOT: mux |
| 97 | %cmp = icmp eq i32 %Enum_Par_Val, %pv2 |
| 98 | %selv = zext i1 %cmp to i32 |
| 99 | ret i32 %selv |
| 100 | } |
| 101 | |
| 102 | define i32 @Func_3ne(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone { |
| 103 | entry: |
| 104 | ; CHECK-NOT: mux |
| 105 | %cmp = icmp ne i32 %Enum_Par_Val, %pv2 |
| 106 | %selv = zext i1 %cmp to i32 |
| 107 | ret i32 %selv |
| 108 | } |
| 109 | |
| 110 | define i32 @Func_3neC(i32 %Enum_Par_Val) nounwind readnone { |
| 111 | entry: |
| 112 | ; CHECK-NOT: mux |
| 113 | %cmp = icmp ne i32 %Enum_Par_Val, 122 |
| 114 | %selv = zext i1 %cmp to i32 |
| 115 | ret i32 %selv |
| 116 | } |