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Matthias Braunef959692017-12-18 23:19:44 +00001//===-- LiveStacks.cpp - Live Stack Slot Analysis -------------------------===//
Evan Cheng12a02222008-06-04 09:18:41 +00002//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Evan Cheng12a02222008-06-04 09:18:41 +00006//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the live stack slot analysis pass. It is analogous to
10// live interval analysis except it's analyzing liveness of stack slots rather
11// than registers.
12//
13//===----------------------------------------------------------------------===//
14
Matthias Braunef959692017-12-18 23:19:44 +000015#include "llvm/CodeGen/LiveStacks.h"
Matthias Braunf8422972017-12-13 02:51:04 +000016#include "llvm/CodeGen/LiveIntervals.h"
Evan Cheng12a02222008-06-04 09:18:41 +000017#include "llvm/CodeGen/Passes.h"
David Blaikieb3bde2e2017-11-17 01:07:10 +000018#include "llvm/CodeGen/TargetRegisterInfo.h"
19#include "llvm/CodeGen/TargetSubtargetInfo.h"
Evan Cheng12a02222008-06-04 09:18:41 +000020#include "llvm/Support/Debug.h"
Chris Lattnerd99f1c62009-08-23 03:47:42 +000021#include "llvm/Support/raw_ostream.h"
Evan Cheng12a02222008-06-04 09:18:41 +000022using namespace llvm;
23
Chandler Carruth1b9dde02014-04-22 02:02:50 +000024#define DEBUG_TYPE "livestacks"
25
Evan Cheng12a02222008-06-04 09:18:41 +000026char LiveStacks::ID = 0;
Matthias Braun1527baa2017-05-25 21:26:32 +000027INITIALIZE_PASS_BEGIN(LiveStacks, DEBUG_TYPE,
Evan Chengb53825b2012-09-21 20:04:28 +000028 "Live Stack Slot Analysis", false, false)
29INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
Matthias Braun1527baa2017-05-25 21:26:32 +000030INITIALIZE_PASS_END(LiveStacks, DEBUG_TYPE,
Owen Andersondf7a4f22010-10-07 22:25:06 +000031 "Live Stack Slot Analysis", false, false)
Evan Cheng12a02222008-06-04 09:18:41 +000032
Jakob Stoklund Olesen7cdc1e52010-10-26 00:11:33 +000033char &llvm::LiveStacksID = LiveStacks::ID;
34
Evan Cheng12a02222008-06-04 09:18:41 +000035void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
Evan Chengbab59882008-09-22 22:26:15 +000036 AU.setPreservesAll();
Lang Hames05fb9632009-11-03 23:52:08 +000037 AU.addPreserved<SlotIndexes>();
38 AU.addRequiredTransitive<SlotIndexes>();
Evan Cheng168f8f32008-09-22 20:58:04 +000039 MachineFunctionPass::getAnalysisUsage(AU);
Evan Cheng12a02222008-06-04 09:18:41 +000040}
41
42void LiveStacks::releaseMemory() {
Benjamin Kramera0000022010-06-26 11:30:59 +000043 // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
44 VNInfoAllocator.Reset();
Evan Cheng210fc622009-05-03 18:32:42 +000045 S2IMap.clear();
46 S2RCMap.clear();
Evan Cheng12a02222008-06-04 09:18:41 +000047}
48
Jakob Stoklund Olesen1352be22011-09-30 22:18:51 +000049bool LiveStacks::runOnMachineFunction(MachineFunction &MF) {
Eric Christopherfc6de422014-08-05 02:39:49 +000050 TRI = MF.getSubtarget().getRegisterInfo();
Evan Cheng12a02222008-06-04 09:18:41 +000051 // FIXME: No analysis is being done right now. We are relying on the
52 // register allocators to provide the information.
53 return false;
54}
55
Jakob Stoklund Olesenb83a6b22011-01-09 21:17:37 +000056LiveInterval &
57LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) {
58 assert(Slot >= 0 && "Spill slot indice must be >= 0");
59 SS2IntervalMap::iterator I = S2IMap.find(Slot);
60 if (I == S2IMap.end()) {
Daniel Sanders2bea69b2019-08-01 23:27:28 +000061 I = S2IMap
62 .emplace(
63 std::piecewise_construct, std::forward_as_tuple(Slot),
64 std::forward_as_tuple(Register::index2StackSlot(Slot), 0.0F))
David Blaikieed400252015-03-04 01:20:33 +000065 .first;
Jakob Stoklund Olesenb83a6b22011-01-09 21:17:37 +000066 S2RCMap.insert(std::make_pair(Slot, RC));
67 } else {
68 // Use the largest common subclass register class.
69 const TargetRegisterClass *OldRC = S2RCMap[Slot];
Jakob Stoklund Olesen1352be22011-09-30 22:18:51 +000070 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);
Jakob Stoklund Olesenb83a6b22011-01-09 21:17:37 +000071 }
72 return I->second;
73}
74
Evan Cheng12a02222008-06-04 09:18:41 +000075/// print - Implement the dump method.
Chris Lattner13626022009-08-23 06:03:38 +000076void LiveStacks::print(raw_ostream &OS, const Module*) const {
Chris Lattnerd99f1c62009-08-23 03:47:42 +000077
78 OS << "********** INTERVALS **********\n";
Evan Cheng12a02222008-06-04 09:18:41 +000079 for (const_iterator I = begin(), E = end(); I != E; ++I) {
Chris Lattnerd99f1c62009-08-23 03:47:42 +000080 I->second.print(OS);
Evan Cheng210fc622009-05-03 18:32:42 +000081 int Slot = I->first;
82 const TargetRegisterClass *RC = getIntervalRegClass(Slot);
83 if (RC)
Craig Toppercf0444b2014-11-17 05:50:14 +000084 OS << " [" << TRI->getRegClassName(RC) << "]\n";
Evan Cheng210fc622009-05-03 18:32:42 +000085 else
Chris Lattnerd99f1c62009-08-23 03:47:42 +000086 OS << " [Unknown]\n";
Evan Cheng12a02222008-06-04 09:18:41 +000087 }
88}