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gerrit-public.fairphone.software / toolchain / llvm-project / ce3ddd2de4c5dbd5a7a68b51ea38f96cf7fbf3aa / . / llvm / test / CodeGen / AMDGPU / hsa.ll
blob: 972fbd66ef3786da181f04670370c62b430cb84b [file] [log] [blame]
Changpeng Fangb41574a2015-12-22 20:55:23 +0000[diff] [blame]1; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s
2; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri -mattr=-flat-for-global | FileCheck --check-prefix=HSA-CI %s
3; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo | FileCheck --check-prefix=HSA %s
4; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=-flat-for-global | FileCheck --check-prefix=HSA-VI %s
5; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri -filetype=obj | llvm-readobj -symbols -s -sd | FileCheck --check-prefix=ELF %s
Tom Stellard1e1b05d2015-11-06 11:45:14 +0000[diff] [blame]6; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri | llvm-readobj -symbols -s -sd | FileCheck %s --check-prefix=ELF
Tom Stellard347ac792015-06-26 21:15:07 +0000[diff] [blame]7
8; The SHT_NOTE section contains the output from the .hsa_code_object_*
9; directives.
10
Tom Stellarde135ffd2015-09-25 21:41:28 +0000[diff] [blame]11; ELF: Section {
Tom Stellardfcfaea42016-05-05 17:03:33 +0000[diff] [blame]12; ELF: Name: .text
Tom Stellarde135ffd2015-09-25 21:41:28 +0000[diff] [blame]13; ELF: Type: SHT_PROGBITS (0x1)
Tom Stellardfcfaea42016-05-05 17:03:33 +0000[diff] [blame]14; ELF: Flags [ (0x6)
Tom Stellarde135ffd2015-09-25 21:41:28 +0000[diff] [blame]15; ELF: SHF_ALLOC (0x2)
Tom Stellarde135ffd2015-09-25 21:41:28 +0000[diff] [blame]16; ELF: SHF_EXECINSTR (0x4)
Tom Stellarde135ffd2015-09-25 21:41:28 +0000[diff] [blame]17; ELF: }
18
Tom Stellard347ac792015-06-26 21:15:07 +0000[diff] [blame]19; ELF: SHT_NOTE
Konstantin Zhuravlyov98a3ac72016-10-17 22:40:15 +0000[diff] [blame]20; ELF: Flags [ (0x2)
21; ELF: SHF_ALLOC (0x2)
22; ELF: ]
23; ELF: SectionData (
Tom Stellard347ac792015-06-26 21:15:07 +0000[diff] [blame]24; ELF: 0000: 04000000 08000000 01000000 414D4400
Tom Stellard418beb72016-07-13 14:23:33 +0000[diff] [blame]25; ELF: 0010: 02000000 01000000 04000000 1B000000
Tom Stellard347ac792015-06-26 21:15:07 +0000[diff] [blame]26; ELF: 0020: 03000000 414D4400 04000700 07000000
27; ELF: 0030: 00000000 00000000 414D4400 414D4447
28; ELF: 0040: 50550000
Konstantin Zhuravlyov98a3ac72016-10-17 22:40:15 +0000[diff] [blame]29; ELF: )
Tom Stellard347ac792015-06-26 21:15:07 +0000[diff] [blame]30
Tom Stellard1e1b05d2015-11-06 11:45:14 +0000[diff] [blame]31; ELF: Symbol {
32; ELF: Name: simple
Matt Arsenault296b8492016-02-12 06:31:30 +0000[diff] [blame]33; ELF: Size: 288
Tom Stellard1e1b05d2015-11-06 11:45:14 +0000[diff] [blame]34; ELF: Type: AMDGPU_HSA_KERNEL (0xA)
35; ELF: }
36
Konstantin Zhuravlyov67a6d542017-01-06 17:02:10 +0000[diff] [blame]37; HSA-NOT: .AMDGPU.config
38; HSA: .text
Tom Stellard418beb72016-07-13 14:23:33 +0000[diff] [blame]39; HSA: .hsa_code_object_version 2,1
Tom Stellard4694ed02015-06-26 21:58:42 +0000[diff] [blame]40; HSA-CI: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
41; HSA-VI: .hsa_code_object_isa 8,0,1,"AMD","AMDGPU"
Tom Stellard794c8c02014-12-02 17:05:41 +0000[diff] [blame]42
Tom Stellard1e1b05d2015-11-06 11:45:14 +0000[diff] [blame]43; HSA: .amdgpu_hsa_kernel simple
Tom Stellardf151a452015-06-26 21:14:58 +0000[diff] [blame]44; HSA: {{^}}simple:
Tom Stellardff7416b2015-06-26 21:58:31 +0000[diff] [blame]45; HSA: .amd_kernel_code_t
Matt Arsenault26f8f3d2015-11-30 21:16:03 +0000[diff] [blame]46; HSA: enable_sgpr_private_segment_buffer = 1
47; HSA: enable_sgpr_kernarg_segment_ptr = 1
Matt Arsenault5d910192017-01-25 20:21:57 +0000[diff] [blame]48; HSA: wavefront_size = 6
49; HSA: call_convention = -1
Tom Stellardff7416b2015-06-26 21:58:31 +0000[diff] [blame]50; HSA: .end_amd_kernel_code_t
Matt Arsenault26f8f3d2015-11-30 21:16:03 +0000[diff] [blame]51; HSA: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[4:5], 0x0
Tom Stellard4694ed02015-06-26 21:58:42 +0000[diff] [blame]52
Tom Stellard794c8c02014-12-02 17:05:41 +0000[diff] [blame]53; Make sure we are setting the ATC bit:
Tom Stellard4694ed02015-06-26 21:58:42 +0000[diff] [blame]54; HSA-CI: s_mov_b32 s[[HI:[0-9]]], 0x100f000
55; On VI+ we also need to set MTYPE = 2
56; HSA-VI: s_mov_b32 s[[HI:[0-9]]], 0x1100f000
Changpeng Fangb41574a2015-12-22 20:55:23 +0000[diff] [blame]57; Make sure we generate flat store for HSA
Tom Stellard46937ca2016-02-12 17:57:54 +0000[diff] [blame]58; HSA: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}
Tom Stellard794c8c02014-12-02 17:05:41 +0000[diff] [blame]59
Tom Stellardad8f5e82016-01-08 14:50:23 +0000[diff] [blame]60; HSA: .Lfunc_end0:
61; HSA: .size simple, .Lfunc_end0-simple
62
Nikolay Haustov1f7732a2016-05-06 09:07:29 +0000[diff] [blame]63define amdgpu_kernel void @simple(i32 addrspace(1)* %out) {
Tom Stellard794c8c02014-12-02 17:05:41 +0000[diff] [blame]64entry:
65 store i32 0, i32 addrspace(1)* %out
66 ret void
67}