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gerrit-public.fairphone.software / toolchain / llvm-project / cee313d288a4faf0355d76fb6e0e927e211d08a5 / . / llvm / test / Transforms / IndVarSimplify / replace-loop-exit-folds.ll
blob: 5bac86d32e2117888caf6d69ea114a27c39f2110 [file] [log] [blame]
Eric Christophercee313d2019-04-17 04:52:47 +0000[diff] [blame^]1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -indvars -S < %s | FileCheck %s
3
4target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
5
6define i32 @remove_loop(i32 %size) {
7; CHECK-LABEL: @remove_loop(
8; CHECK-NEXT: entry:
9; CHECK-NEXT: [[TMP0:%.*]] = sub i32 -1, [[SIZE:%.*]]
10; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], -32
11; CHECK-NEXT: [[UMAX:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 -32
12; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SIZE]], [[UMAX]]
13; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 32
14; CHECK-NEXT: [[TMP4:%.*]] = lshr i32 [[TMP3]], 5
15; CHECK-NEXT: [[TMP5:%.*]] = shl i32 [[TMP4]], 5
16; CHECK-NEXT: br label [[WHILE_COND:%.*]]
17; CHECK: while.cond:
18; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_COND]] ]
19; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SIZE_ADDR_0]], 31
20; CHECK-NEXT: [[SUB]] = add i32 [[SIZE_ADDR_0]], -32
21; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_COND]], label [[WHILE_END:%.*]]
22; CHECK: while.end:
23; CHECK-NEXT: [[TMP6:%.*]] = sub i32 [[SIZE]], [[TMP5]]
24; CHECK-NEXT: ret i32 [[TMP6]]
25;
26entry:
27 br label %while.cond
28
29while.cond: ; preds = %while.cond, %entry
30 %size.addr.0 = phi i32 [ %size, %entry ], [ %sub, %while.cond ]
31 %cmp = icmp ugt i32 %size.addr.0, 31
32 %sub = add i32 %size.addr.0, -32
33 br i1 %cmp, label %while.cond, label %while.end
34
35while.end: ; preds = %while.cond
36 %size.lcssa = phi i32 [ %size.addr.0, %while.cond ]
37 ret i32 %size.lcssa
38}
39
40define i32 @used_loop(i32 %size) minsize {
41; CHECK-LABEL: @used_loop(
42; CHECK-NEXT: entry:
43; CHECK-NEXT: br label [[WHILE_COND:%.*]]
44; CHECK: while.cond:
45; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE:%.*]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_COND]] ]
46; CHECK-NEXT: tail call void @call()
47; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SIZE_ADDR_0]], 31
48; CHECK-NEXT: [[SUB]] = add i32 [[SIZE_ADDR_0]], -32
49; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_COND]], label [[WHILE_END:%.*]]
50; CHECK: while.end:
51; CHECK-NEXT: [[SIZE_LCSSA:%.*]] = phi i32 [ [[SIZE_ADDR_0]], [[WHILE_COND]] ]
52; CHECK-NEXT: ret i32 [[SIZE_LCSSA]]
53;
54entry:
55 br label %while.cond
56
57while.cond: ; preds = %while.cond, %entry
58 %size.addr.0 = phi i32 [ %size, %entry ], [ %sub, %while.cond ]
59 tail call void @call()
60 %cmp = icmp ugt i32 %size.addr.0, 31
61 %sub = add i32 %size.addr.0, -32
62 br i1 %cmp, label %while.cond, label %while.end
63
64while.end: ; preds = %while.cond
65 %size.lcssa = phi i32 [ %size.addr.0, %while.cond ]
66 ret i32 %size.lcssa
67}
68
69
70define i32 @test_signed_while(i32 %S) {
71; CHECK-LABEL: @test_signed_while(
72; CHECK-NEXT: entry:
73; CHECK-NEXT: br label [[WHILE_COND:%.*]]
74; CHECK: while.cond:
75; CHECK-NEXT: [[S_ADDR_0:%.*]] = phi i32 [ [[S:%.*]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_BODY:%.*]] ]
76; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[S_ADDR_0]], 31
77; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label [[WHILE_END:%.*]]
78; CHECK: while.body:
79; CHECK-NEXT: [[SUB]] = add nsw i32 [[S_ADDR_0]], -32
80; CHECK-NEXT: tail call void @call()
81; CHECK-NEXT: br label [[WHILE_COND]]
82; CHECK: while.end:
83; CHECK-NEXT: [[S_ADDR_0_LCSSA:%.*]] = phi i32 [ [[S_ADDR_0]], [[WHILE_COND]] ]
84; CHECK-NEXT: ret i32 [[S_ADDR_0_LCSSA]]
85;
86entry:
87 br label %while.cond
88
89while.cond: ; preds = %while.body, %entry
90 %S.addr.0 = phi i32 [ %S, %entry ], [ %sub, %while.body ]
91 %cmp = icmp sgt i32 %S.addr.0, 31
92 br i1 %cmp, label %while.body, label %while.end
93
94while.body: ; preds = %while.cond
95 %sub = add nsw i32 %S.addr.0, -32
96 tail call void @call()
97 br label %while.cond
98
99while.end: ; preds = %while.cond
100 %S.addr.0.lcssa = phi i32 [ %S.addr.0, %while.cond ]
101 ret i32 %S.addr.0.lcssa
102}
103
104define i32 @test_signed_do(i32 %S) {
105; CHECK-LABEL: @test_signed_do(
106; CHECK-NEXT: entry:
107; CHECK-NEXT: br label [[DO_BODY:%.*]]
108; CHECK: do.body:
109; CHECK-NEXT: [[S_ADDR_0:%.*]] = phi i32 [ [[S:%.*]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[DO_BODY]] ]
110; CHECK-NEXT: [[SUB]] = add nsw i32 [[S_ADDR_0]], -16
111; CHECK-NEXT: tail call void @call()
112; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[SUB]], 15
113; CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY]], label [[DO_END:%.*]]
114; CHECK: do.end:
115; CHECK-NEXT: [[SUB_LCSSA:%.*]] = phi i32 [ [[SUB]], [[DO_BODY]] ]
116; CHECK-NEXT: ret i32 [[SUB_LCSSA]]
117;
118entry:
119 br label %do.body
120
121do.body: ; preds = %do.body, %entry
122 %S.addr.0 = phi i32 [ %S, %entry ], [ %sub, %do.body ]
123 %sub = add nsw i32 %S.addr.0, -16
124 tail call void @call()
125 %cmp = icmp sgt i32 %sub, 15
126 br i1 %cmp, label %do.body, label %do.end
127
128do.end: ; preds = %do.body
129 %sub.lcssa = phi i32 [ %sub, %do.body ]
130 ret i32 %sub.lcssa
131}
132
133define i32 @test_unsigned_while(i32 %S) {
134; CHECK-LABEL: @test_unsigned_while(
135; CHECK-NEXT: entry:
136; CHECK-NEXT: br label [[WHILE_COND:%.*]]
137; CHECK: while.cond:
138; CHECK-NEXT: [[S_ADDR_0:%.*]] = phi i32 [ [[S:%.*]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_BODY:%.*]] ]
139; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[S_ADDR_0]], 15
140; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label [[WHILE_END:%.*]]
141; CHECK: while.body:
142; CHECK-NEXT: [[SUB]] = add i32 [[S_ADDR_0]], -16
143; CHECK-NEXT: tail call void @call()
144; CHECK-NEXT: br label [[WHILE_COND]]
145; CHECK: while.end:
146; CHECK-NEXT: [[S_ADDR_0_LCSSA:%.*]] = phi i32 [ [[S_ADDR_0]], [[WHILE_COND]] ]
147; CHECK-NEXT: ret i32 [[S_ADDR_0_LCSSA]]
148;
149entry:
150 br label %while.cond
151
152while.cond: ; preds = %while.body, %entry
153 %S.addr.0 = phi i32 [ %S, %entry ], [ %sub, %while.body ]
154 %cmp = icmp ugt i32 %S.addr.0, 15
155 br i1 %cmp, label %while.body, label %while.end
156
157while.body: ; preds = %while.cond
158 %sub = add i32 %S.addr.0, -16
159 tail call void @call()
160 br label %while.cond
161
162while.end: ; preds = %while.cond
163 %S.addr.0.lcssa = phi i32 [ %S.addr.0, %while.cond ]
164 ret i32 %S.addr.0.lcssa
165}
166
167define i32 @test_unsigned_do(i32 %S) {
168; CHECK-LABEL: @test_unsigned_do(
169; CHECK-NEXT: entry:
170; CHECK-NEXT: br label [[DO_BODY:%.*]]
171; CHECK: do.body:
172; CHECK-NEXT: [[S_ADDR_0:%.*]] = phi i32 [ [[S:%.*]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[DO_BODY]] ]
173; CHECK-NEXT: [[SUB]] = add i32 [[S_ADDR_0]], -16
174; CHECK-NEXT: tail call void @call()
175; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SUB]], 15
176; CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY]], label [[DO_END:%.*]]
177; CHECK: do.end:
178; CHECK-NEXT: [[SUB_LCSSA:%.*]] = phi i32 [ [[SUB]], [[DO_BODY]] ]
179; CHECK-NEXT: ret i32 [[SUB_LCSSA]]
180;
181entry:
182 br label %do.body
183
184do.body: ; preds = %do.body, %entry
185 %S.addr.0 = phi i32 [ %S, %entry ], [ %sub, %do.body ]
186 %sub = add i32 %S.addr.0, -16
187 tail call void @call()
188 %cmp = icmp ugt i32 %sub, 15
189 br i1 %cmp, label %do.body, label %do.end
190
191do.end: ; preds = %do.body
192 %sub.lcssa = phi i32 [ %sub, %do.body ]
193 ret i32 %sub.lcssa
194}
195
196
197declare void @call()