Aditya Nandakumar | 2036f44 | 2018-01-25 02:53:06 +0000 | [diff] [blame] | 1 | //===- PatternMatchTest.cpp -----------------------------------------------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | |
| 10 | #include "llvm/CodeGen/GlobalISel/MIPatternMatch.h" |
| 11 | #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" |
| 12 | #include "llvm/CodeGen/GlobalISel/Utils.h" |
| 13 | #include "llvm/CodeGen/MIRParser/MIRParser.h" |
| 14 | #include "llvm/CodeGen/MachineFunction.h" |
| 15 | #include "llvm/CodeGen/MachineModuleInfo.h" |
| 16 | #include "llvm/CodeGen/TargetFrameLowering.h" |
| 17 | #include "llvm/CodeGen/TargetInstrInfo.h" |
| 18 | #include "llvm/CodeGen/TargetLowering.h" |
| 19 | #include "llvm/CodeGen/TargetSubtargetInfo.h" |
| 20 | #include "llvm/Support/SourceMgr.h" |
| 21 | #include "llvm/Support/TargetRegistry.h" |
| 22 | #include "llvm/Support/TargetSelect.h" |
| 23 | #include "llvm/Target/TargetMachine.h" |
| 24 | #include "llvm/Target/TargetOptions.h" |
| 25 | #include "gtest/gtest.h" |
| 26 | |
| 27 | using namespace llvm; |
| 28 | using namespace MIPatternMatch; |
| 29 | |
| 30 | namespace { |
| 31 | |
| 32 | void initLLVM() { |
| 33 | InitializeAllTargets(); |
| 34 | InitializeAllTargetMCs(); |
| 35 | InitializeAllAsmPrinters(); |
| 36 | InitializeAllAsmParsers(); |
| 37 | |
| 38 | PassRegistry *Registry = PassRegistry::getPassRegistry(); |
| 39 | initializeCore(*Registry); |
| 40 | initializeCodeGen(*Registry); |
| 41 | } |
| 42 | |
| 43 | /// Create a TargetMachine. As we lack a dedicated always available target for |
| 44 | /// unittests, we go for "AArch64". |
| 45 | std::unique_ptr<TargetMachine> createTargetMachine() { |
| 46 | Triple TargetTriple("aarch64--"); |
| 47 | std::string Error; |
| 48 | const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error); |
| 49 | if (!T) |
| 50 | return nullptr; |
| 51 | |
| 52 | TargetOptions Options; |
| 53 | return std::unique_ptr<TargetMachine>(T->createTargetMachine( |
| 54 | "AArch64", "", "", Options, None, None, CodeGenOpt::Aggressive)); |
| 55 | } |
| 56 | |
| 57 | std::unique_ptr<Module> parseMIR(LLVMContext &Context, |
| 58 | std::unique_ptr<MIRParser> &MIR, |
| 59 | const TargetMachine &TM, StringRef MIRCode, |
| 60 | const char *FuncName, MachineModuleInfo &MMI) { |
| 61 | SMDiagnostic Diagnostic; |
| 62 | std::unique_ptr<MemoryBuffer> MBuffer = MemoryBuffer::getMemBuffer(MIRCode); |
| 63 | MIR = createMIRParser(std::move(MBuffer), Context); |
| 64 | if (!MIR) |
| 65 | return nullptr; |
| 66 | |
| 67 | std::unique_ptr<Module> M = MIR->parseIRModule(); |
| 68 | if (!M) |
| 69 | return nullptr; |
| 70 | |
| 71 | M->setDataLayout(TM.createDataLayout()); |
| 72 | |
| 73 | if (MIR->parseMachineFunctions(*M, MMI)) |
| 74 | return nullptr; |
| 75 | |
| 76 | return M; |
| 77 | } |
| 78 | |
| 79 | std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>> |
| 80 | createDummyModule(LLVMContext &Context, const TargetMachine &TM, |
| 81 | StringRef MIRFunc) { |
| 82 | SmallString<512> S; |
| 83 | StringRef MIRString = (Twine(R"MIR( |
| 84 | --- |
| 85 | ... |
| 86 | name: func |
| 87 | registers: |
| 88 | - { id: 0, class: _ } |
| 89 | - { id: 1, class: _ } |
| 90 | - { id: 2, class: _ } |
| 91 | - { id: 3, class: _ } |
| 92 | body: | |
| 93 | bb.1: |
Puyan Lotfi | 43e94b1 | 2018-01-31 22:04:26 +0000 | [diff] [blame] | 94 | %0(s64) = COPY $x0 |
| 95 | %1(s64) = COPY $x1 |
| 96 | %2(s64) = COPY $x2 |
Aditya Nandakumar | 2036f44 | 2018-01-25 02:53:06 +0000 | [diff] [blame] | 97 | )MIR") + Twine(MIRFunc) + Twine("...\n")) |
| 98 | .toNullTerminatedStringRef(S); |
| 99 | std::unique_ptr<MIRParser> MIR; |
| 100 | auto MMI = make_unique<MachineModuleInfo>(&TM); |
| 101 | std::unique_ptr<Module> M = |
| 102 | parseMIR(Context, MIR, TM, MIRString, "func", *MMI); |
| 103 | return make_pair(std::move(M), std::move(MMI)); |
| 104 | } |
| 105 | |
| 106 | static MachineFunction *getMFFromMMI(const Module *M, |
| 107 | const MachineModuleInfo *MMI) { |
| 108 | Function *F = M->getFunction("func"); |
| 109 | auto *MF = MMI->getMachineFunction(*F); |
| 110 | return MF; |
| 111 | } |
| 112 | |
| 113 | static void collectCopies(SmallVectorImpl<unsigned> &Copies, |
| 114 | MachineFunction *MF) { |
| 115 | for (auto &MBB : *MF) |
| 116 | for (MachineInstr &MI : MBB) { |
| 117 | if (MI.getOpcode() == TargetOpcode::COPY) |
| 118 | Copies.push_back(MI.getOperand(0).getReg()); |
| 119 | } |
| 120 | } |
| 121 | |
| 122 | TEST(PatternMatchInstr, MatchIntConstant) { |
| 123 | LLVMContext Context; |
| 124 | std::unique_ptr<TargetMachine> TM = createTargetMachine(); |
| 125 | if (!TM) |
| 126 | return; |
| 127 | auto ModuleMMIPair = createDummyModule(Context, *TM, ""); |
| 128 | MachineFunction *MF = |
| 129 | getMFFromMMI(ModuleMMIPair.first.get(), ModuleMMIPair.second.get()); |
| 130 | SmallVector<unsigned, 4> Copies; |
| 131 | collectCopies(Copies, MF); |
| 132 | MachineBasicBlock *EntryMBB = &*MF->begin(); |
| 133 | MachineIRBuilder B(*MF); |
| 134 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
| 135 | B.setInsertPt(*EntryMBB, EntryMBB->end()); |
| 136 | auto MIBCst = B.buildConstant(LLT::scalar(64), 42); |
| 137 | uint64_t Cst; |
| 138 | bool match = mi_match(MIBCst->getOperand(0).getReg(), MRI, m_ICst(Cst)); |
| 139 | ASSERT_TRUE(match); |
| 140 | ASSERT_EQ(Cst, (uint64_t)42); |
| 141 | } |
| 142 | |
| 143 | TEST(PatternMatchInstr, MatchBinaryOp) { |
| 144 | LLVMContext Context; |
| 145 | std::unique_ptr<TargetMachine> TM = createTargetMachine(); |
| 146 | if (!TM) |
| 147 | return; |
| 148 | auto ModuleMMIPair = createDummyModule(Context, *TM, ""); |
| 149 | MachineFunction *MF = |
| 150 | getMFFromMMI(ModuleMMIPair.first.get(), ModuleMMIPair.second.get()); |
| 151 | SmallVector<unsigned, 4> Copies; |
| 152 | collectCopies(Copies, MF); |
| 153 | MachineBasicBlock *EntryMBB = &*MF->begin(); |
| 154 | MachineIRBuilder B(*MF); |
| 155 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
| 156 | B.setInsertPt(*EntryMBB, EntryMBB->end()); |
| 157 | LLT s64 = LLT::scalar(64); |
| 158 | auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]); |
| 159 | // Test case for no bind. |
| 160 | bool match = |
| 161 | mi_match(MIBAdd->getOperand(0).getReg(), MRI, m_GAdd(m_Reg(), m_Reg())); |
| 162 | ASSERT_TRUE(match); |
| 163 | unsigned Src0, Src1, Src2; |
| 164 | match = mi_match(MIBAdd->getOperand(0).getReg(), MRI, |
| 165 | m_GAdd(m_Reg(Src0), m_Reg(Src1))); |
| 166 | ASSERT_TRUE(match); |
| 167 | ASSERT_EQ(Src0, Copies[0]); |
| 168 | ASSERT_EQ(Src1, Copies[1]); |
| 169 | |
| 170 | // Build MUL(ADD %0, %1), %2 |
| 171 | auto MIBMul = B.buildMul(s64, MIBAdd, Copies[2]); |
| 172 | |
| 173 | // Try to match MUL. |
| 174 | match = mi_match(MIBMul->getOperand(0).getReg(), MRI, |
| 175 | m_GMul(m_Reg(Src0), m_Reg(Src1))); |
| 176 | ASSERT_TRUE(match); |
| 177 | ASSERT_EQ(Src0, MIBAdd->getOperand(0).getReg()); |
| 178 | ASSERT_EQ(Src1, Copies[2]); |
| 179 | |
| 180 | // Try to match MUL(ADD) |
| 181 | match = mi_match(MIBMul->getOperand(0).getReg(), MRI, |
| 182 | m_GMul(m_GAdd(m_Reg(Src0), m_Reg(Src1)), m_Reg(Src2))); |
| 183 | ASSERT_TRUE(match); |
| 184 | ASSERT_EQ(Src0, Copies[0]); |
| 185 | ASSERT_EQ(Src1, Copies[1]); |
| 186 | ASSERT_EQ(Src2, Copies[2]); |
| 187 | |
| 188 | // Test Commutativity. |
| 189 | auto MIBMul2 = B.buildMul(s64, Copies[0], B.buildConstant(s64, 42)); |
| 190 | // Try to match MUL(Cst, Reg) on src of MUL(Reg, Cst) to validate |
| 191 | // commutativity. |
| 192 | uint64_t Cst; |
| 193 | match = mi_match(MIBMul2->getOperand(0).getReg(), MRI, |
| 194 | m_GMul(m_ICst(Cst), m_Reg(Src0))); |
| 195 | ASSERT_TRUE(match); |
| 196 | ASSERT_EQ(Cst, (uint64_t)42); |
| 197 | ASSERT_EQ(Src0, Copies[0]); |
| 198 | |
| 199 | // Make sure commutative doesn't work with something like SUB. |
| 200 | auto MIBSub = B.buildSub(s64, Copies[0], B.buildConstant(s64, 42)); |
| 201 | match = mi_match(MIBSub->getOperand(0).getReg(), MRI, |
| 202 | m_GSub(m_ICst(Cst), m_Reg(Src0))); |
| 203 | ASSERT_FALSE(match); |
Aditya Nandakumar | 6250b18 | 2018-02-13 20:09:13 +0000 | [diff] [blame] | 204 | |
| 205 | auto MIBFMul = B.buildInstr(TargetOpcode::G_FMUL, s64, Copies[0], |
| 206 | B.buildConstant(s64, 42)); |
| 207 | // Match and test commutativity for FMUL. |
| 208 | match = mi_match(MIBFMul->getOperand(0).getReg(), MRI, |
| 209 | m_GFMul(m_ICst(Cst), m_Reg(Src0))); |
| 210 | ASSERT_TRUE(match); |
| 211 | ASSERT_EQ(Cst, (uint64_t)42); |
| 212 | ASSERT_EQ(Src0, Copies[0]); |
Volkan Keles | 02bb174 | 2018-02-14 19:58:36 +0000 | [diff] [blame] | 213 | |
| 214 | // Build AND %0, %1 |
| 215 | auto MIBAnd = B.buildAnd(s64, Copies[0], Copies[1]); |
| 216 | // Try to match AND. |
| 217 | match = mi_match(MIBAnd->getOperand(0).getReg(), MRI, |
| 218 | m_GAnd(m_Reg(Src0), m_Reg(Src1))); |
| 219 | ASSERT_TRUE(match); |
| 220 | ASSERT_EQ(Src0, Copies[0]); |
| 221 | ASSERT_EQ(Src1, Copies[1]); |
| 222 | |
| 223 | // Build OR %0, %1 |
| 224 | auto MIBOr = B.buildOr(s64, Copies[0], Copies[1]); |
| 225 | // Try to match OR. |
| 226 | match = mi_match(MIBOr->getOperand(0).getReg(), MRI, |
| 227 | m_GOr(m_Reg(Src0), m_Reg(Src1))); |
| 228 | ASSERT_TRUE(match); |
| 229 | ASSERT_EQ(Src0, Copies[0]); |
| 230 | ASSERT_EQ(Src1, Copies[1]); |
Aditya Nandakumar | 2036f44 | 2018-01-25 02:53:06 +0000 | [diff] [blame] | 231 | } |
| 232 | |
| 233 | TEST(PatternMatchInstr, MatchExtendsTrunc) { |
| 234 | LLVMContext Context; |
| 235 | std::unique_ptr<TargetMachine> TM = createTargetMachine(); |
| 236 | if (!TM) |
| 237 | return; |
| 238 | auto ModuleMMIPair = createDummyModule(Context, *TM, ""); |
| 239 | MachineFunction *MF = |
| 240 | getMFFromMMI(ModuleMMIPair.first.get(), ModuleMMIPair.second.get()); |
| 241 | SmallVector<unsigned, 4> Copies; |
| 242 | collectCopies(Copies, MF); |
| 243 | MachineBasicBlock *EntryMBB = &*MF->begin(); |
| 244 | MachineIRBuilder B(*MF); |
| 245 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
| 246 | B.setInsertPt(*EntryMBB, EntryMBB->end()); |
| 247 | LLT s64 = LLT::scalar(64); |
| 248 | LLT s32 = LLT::scalar(32); |
| 249 | |
| 250 | auto MIBTrunc = B.buildTrunc(s32, Copies[0]); |
| 251 | auto MIBAExt = B.buildAnyExt(s64, MIBTrunc); |
| 252 | auto MIBZExt = B.buildZExt(s64, MIBTrunc); |
| 253 | auto MIBSExt = B.buildSExt(s64, MIBTrunc); |
| 254 | unsigned Src0; |
| 255 | bool match = |
| 256 | mi_match(MIBTrunc->getOperand(0).getReg(), MRI, m_GTrunc(m_Reg(Src0))); |
| 257 | ASSERT_TRUE(match); |
| 258 | ASSERT_EQ(Src0, Copies[0]); |
| 259 | match = |
| 260 | mi_match(MIBAExt->getOperand(0).getReg(), MRI, m_GAnyExt(m_Reg(Src0))); |
| 261 | ASSERT_TRUE(match); |
| 262 | ASSERT_EQ(Src0, MIBTrunc->getOperand(0).getReg()); |
| 263 | |
| 264 | match = mi_match(MIBSExt->getOperand(0).getReg(), MRI, m_GSExt(m_Reg(Src0))); |
| 265 | ASSERT_TRUE(match); |
| 266 | ASSERT_EQ(Src0, MIBTrunc->getOperand(0).getReg()); |
| 267 | |
| 268 | match = mi_match(MIBZExt->getOperand(0).getReg(), MRI, m_GZExt(m_Reg(Src0))); |
| 269 | ASSERT_TRUE(match); |
| 270 | ASSERT_EQ(Src0, MIBTrunc->getOperand(0).getReg()); |
| 271 | |
| 272 | // Match ext(trunc src) |
| 273 | match = mi_match(MIBAExt->getOperand(0).getReg(), MRI, |
| 274 | m_GAnyExt(m_GTrunc(m_Reg(Src0)))); |
| 275 | ASSERT_TRUE(match); |
| 276 | ASSERT_EQ(Src0, Copies[0]); |
| 277 | |
| 278 | match = mi_match(MIBSExt->getOperand(0).getReg(), MRI, |
| 279 | m_GSExt(m_GTrunc(m_Reg(Src0)))); |
| 280 | ASSERT_TRUE(match); |
| 281 | ASSERT_EQ(Src0, Copies[0]); |
| 282 | |
| 283 | match = mi_match(MIBZExt->getOperand(0).getReg(), MRI, |
| 284 | m_GZExt(m_GTrunc(m_Reg(Src0)))); |
| 285 | ASSERT_TRUE(match); |
| 286 | ASSERT_EQ(Src0, Copies[0]); |
| 287 | } |
| 288 | |
| 289 | TEST(PatternMatchInstr, MatchSpecificType) { |
| 290 | LLVMContext Context; |
| 291 | std::unique_ptr<TargetMachine> TM = createTargetMachine(); |
| 292 | if (!TM) |
| 293 | return; |
| 294 | auto ModuleMMIPair = createDummyModule(Context, *TM, ""); |
| 295 | MachineFunction *MF = |
| 296 | getMFFromMMI(ModuleMMIPair.first.get(), ModuleMMIPair.second.get()); |
| 297 | SmallVector<unsigned, 4> Copies; |
| 298 | collectCopies(Copies, MF); |
| 299 | MachineBasicBlock *EntryMBB = &*MF->begin(); |
| 300 | MachineIRBuilder B(*MF); |
| 301 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
| 302 | B.setInsertPt(*EntryMBB, EntryMBB->end()); |
Volkan Keles | 02bb174 | 2018-02-14 19:58:36 +0000 | [diff] [blame] | 303 | |
| 304 | // Try to match a 64bit add. |
Aditya Nandakumar | 2036f44 | 2018-01-25 02:53:06 +0000 | [diff] [blame] | 305 | LLT s64 = LLT::scalar(64); |
| 306 | LLT s32 = LLT::scalar(32); |
| 307 | auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]); |
Aditya Nandakumar | 2036f44 | 2018-01-25 02:53:06 +0000 | [diff] [blame] | 308 | ASSERT_FALSE(mi_match(MIBAdd->getOperand(0).getReg(), MRI, |
| 309 | m_GAdd(m_SpecificType(s32), m_Reg()))); |
| 310 | ASSERT_TRUE(mi_match(MIBAdd->getOperand(0).getReg(), MRI, |
| 311 | m_GAdd(m_SpecificType(s64), m_Reg()))); |
Volkan Keles | 02bb174 | 2018-02-14 19:58:36 +0000 | [diff] [blame] | 312 | |
| 313 | // Try to match the destination type of a bitcast. |
| 314 | LLT v2s32 = LLT::vector(2, 32); |
| 315 | auto MIBCast = B.buildCast(v2s32, Copies[0]); |
| 316 | ASSERT_TRUE( |
Aditya Nandakumar | bab2d3e | 2018-02-19 23:11:53 +0000 | [diff] [blame] | 317 | mi_match(MIBCast->getOperand(0).getReg(), MRI, m_GBitcast(m_Reg()))); |
| 318 | ASSERT_TRUE( |
Volkan Keles | 02bb174 | 2018-02-14 19:58:36 +0000 | [diff] [blame] | 319 | mi_match(MIBCast->getOperand(0).getReg(), MRI, m_SpecificType(v2s32))); |
| 320 | ASSERT_TRUE( |
| 321 | mi_match(MIBCast->getOperand(1).getReg(), MRI, m_SpecificType(s64))); |
Aditya Nandakumar | bab2d3e | 2018-02-19 23:11:53 +0000 | [diff] [blame] | 322 | |
| 323 | // Build a PTRToInt and INTTOPTR and match and test them. |
| 324 | LLT PtrTy = LLT::pointer(0, 64); |
| 325 | auto MIBIntToPtr = B.buildCast(PtrTy, Copies[0]); |
| 326 | auto MIBPtrToInt = B.buildCast(s64, MIBIntToPtr); |
| 327 | unsigned Src0; |
| 328 | |
| 329 | // match the ptrtoint(inttoptr reg) |
| 330 | bool match = mi_match(MIBPtrToInt->getOperand(0).getReg(), MRI, |
| 331 | m_GPtrToInt(m_GIntToPtr(m_Reg(Src0)))); |
| 332 | ASSERT_TRUE(match); |
| 333 | ASSERT_EQ(Src0, Copies[0]); |
Aditya Nandakumar | 2036f44 | 2018-01-25 02:53:06 +0000 | [diff] [blame] | 334 | } |
| 335 | |
| 336 | TEST(PatternMatchInstr, MatchCombinators) { |
| 337 | LLVMContext Context; |
| 338 | std::unique_ptr<TargetMachine> TM = createTargetMachine(); |
| 339 | if (!TM) |
| 340 | return; |
| 341 | auto ModuleMMIPair = createDummyModule(Context, *TM, ""); |
| 342 | MachineFunction *MF = |
| 343 | getMFFromMMI(ModuleMMIPair.first.get(), ModuleMMIPair.second.get()); |
| 344 | SmallVector<unsigned, 4> Copies; |
| 345 | collectCopies(Copies, MF); |
| 346 | MachineBasicBlock *EntryMBB = &*MF->begin(); |
| 347 | MachineIRBuilder B(*MF); |
| 348 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
| 349 | B.setInsertPt(*EntryMBB, EntryMBB->end()); |
| 350 | LLT s64 = LLT::scalar(64); |
| 351 | LLT s32 = LLT::scalar(32); |
| 352 | auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]); |
| 353 | unsigned Src0, Src1; |
| 354 | bool match = |
| 355 | mi_match(MIBAdd->getOperand(0).getReg(), MRI, |
| 356 | m_all_of(m_SpecificType(s64), m_GAdd(m_Reg(Src0), m_Reg(Src1)))); |
| 357 | ASSERT_TRUE(match); |
| 358 | ASSERT_EQ(Src0, Copies[0]); |
| 359 | ASSERT_EQ(Src1, Copies[1]); |
| 360 | // Check for s32 (which should fail). |
| 361 | match = |
| 362 | mi_match(MIBAdd->getOperand(0).getReg(), MRI, |
| 363 | m_all_of(m_SpecificType(s32), m_GAdd(m_Reg(Src0), m_Reg(Src1)))); |
| 364 | ASSERT_FALSE(match); |
| 365 | match = |
| 366 | mi_match(MIBAdd->getOperand(0).getReg(), MRI, |
| 367 | m_any_of(m_SpecificType(s32), m_GAdd(m_Reg(Src0), m_Reg(Src1)))); |
| 368 | ASSERT_TRUE(match); |
| 369 | ASSERT_EQ(Src0, Copies[0]); |
| 370 | ASSERT_EQ(Src1, Copies[1]); |
Aditya Nandakumar | cf85f31 | 2018-02-23 01:01:59 +0000 | [diff] [blame^] | 371 | |
| 372 | // Match a case where none of the predicates hold true. |
| 373 | match = mi_match( |
| 374 | MIBAdd->getOperand(0).getReg(), MRI, |
| 375 | m_any_of(m_SpecificType(LLT::scalar(16)), m_GSub(m_Reg(), m_Reg()))); |
| 376 | ASSERT_FALSE(match); |
Aditya Nandakumar | 2036f44 | 2018-01-25 02:53:06 +0000 | [diff] [blame] | 377 | } |
| 378 | } // namespace |
| 379 | |
| 380 | int main(int argc, char **argv) { |
| 381 | ::testing::InitGoogleTest(&argc, argv); |
| 382 | initLLVM(); |
| 383 | return RUN_ALL_TESTS(); |
| 384 | } |