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gerrit-public.fairphone.software / toolchain / llvm-project / d24ab20e9b11d2076d8b9d5cd96f41a6b9c399fb / . / llvm / test / CodeGen / SystemZ / cmpxchg-01.ll
blob: c6f10380c2f7bb1a94bcca7d72e1ff6820a16dbb [file] [log] [blame]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]1; Test 8-bit compare and swap.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-MAIN
4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
5
6; Check compare and swap with a variable.
7; - CHECK is for the main loop.
8; - CHECK-SHIFT makes sure that the negated shift count used by the second
9; RLL is set up correctly. The negation is independent of the NILL and L
10; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before
11; being used in the RISBG (in contrast to things like atomic addition,
12; which shift %r3 left so that %b is at the high end of the word).
13define i8 @f1(i8 %dummy, i8 *%src, i8 %cmp, i8 %swap) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame^]14; CHECK-MAIN-LABEL: f1:
Richard Sandiford84f54a32013-07-11 08:59:12 +0000[diff] [blame]15; CHECK-MAIN-DAG: sllg [[SHIFT:%r[1-9]+]], %r3, 3
16; CHECK-MAIN-DAG: risbg [[BASE:%r[1-9]+]], %r3, 0, 189, 0
17; CHECK-MAIN: l [[OLD:%r[0-9]+]], 0([[BASE]])
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]18; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
19; CHECK-MAIN: rll %r2, [[OLD]], 8([[SHIFT]])
20; CHECK-MAIN: risbg %r4, %r2, 32, 55, 0
Richard Sandiford0fb90ab2013-05-28 10:41:11 +0000[diff] [blame]21; CHECK-MAIN: crjlh %r2, %r4, [[EXIT:\.[^ ]*]]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]22; CHECK-MAIN: risbg %r5, %r2, 32, 55, 0
23; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r5, -8({{%r[1-9]+}})
Richard Sandiford84f54a32013-07-11 08:59:12 +0000[diff] [blame]24; CHECK-MAIN: cs [[OLD]], [[NEW]], 0([[BASE]])
Richard Sandiford586f4172013-05-21 08:53:17 +0000[diff] [blame]25; CHECK-MAIN: jlh [[LOOP]]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]26; CHECK-MAIN: [[EXIT]]:
27; CHECK-MAIN-NOT: %r2
28; CHECK-MAIN: br %r14
29;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame^]30; CHECK-SHIFT-LABEL: f1:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]31; CHECK-SHIFT: sllg [[SHIFT:%r[1-9]+]], %r3, 3
32; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
33; CHECK-SHIFT: rll
34; CHECK-SHIFT: rll {{%r[0-9]+}}, %r5, -8([[NEGSHIFT]])
35 %res = cmpxchg i8 *%src, i8 %cmp, i8 %swap seq_cst
36 ret i8 %res
37}
38
39; Check compare and swap with constants. We should force the constants into
40; registers and use the sequence above.
41define i8 @f2(i8 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame^]42; CHECK-LABEL: f2:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]43; CHECK: lhi [[CMP:%r[0-9]+]], 42
44; CHECK: risbg [[CMP]], {{%r[0-9]+}}, 32, 55, 0
45; CHECK: risbg
46; CHECK: br %r14
47;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame^]48; CHECK-SHIFT-LABEL: f2:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]49; CHECK-SHIFT: lhi [[SWAP:%r[0-9]+]], 88
50; CHECK-SHIFT: risbg
51; CHECK-SHIFT: risbg [[SWAP]], {{%r[0-9]+}}, 32, 55, 0
52; CHECK-SHIFT: br %r14
53 %res = cmpxchg i8 *%src, i8 42, i8 88 seq_cst
54 ret i8 %res
55}