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gerrit-public.fairphone.software / toolchain / llvm-project / d6f93f5143b4a91a0b81053e462c38c14810fe4e / . / llvm / test / CodeGen / PowerPC / testComparesieqss.ll
blob: 499f482c8ebf034b61664f4a238c5a7aa11a7d4e [file] [log] [blame]
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8; ModuleID = 'ComparisonTestCases/testComparesieqss.c'
9
10@glob = common local_unnamed_addr global i16 0, align 2
11
12; Function Attrs: norecurse nounwind readnone
13define signext i32 @test_ieqss(i16 signext %a, i16 signext %b) {
14; CHECK-LABEL: test_ieqss:
15; CHECK: # BB#0: # %entry
16; CHECK-NEXT: xor r3, r3, r4
17; CHECK-NEXT: cntlzw r3, r3
18; CHECK-NEXT: srwi r3, r3, 5
19; CHECK-NEXT: blr
20entry:
21 %cmp = icmp eq i16 %a, %b
22 %conv2 = zext i1 %cmp to i32
23 ret i32 %conv2
24}
25
26; Function Attrs: norecurse nounwind readnone
27define signext i32 @test_ieqss_sext(i16 signext %a, i16 signext %b) {
28; CHECK-LABEL: test_ieqss_sext:
29; CHECK: # BB#0: # %entry
30; CHECK-NEXT: xor r3, r3, r4
31; CHECK-NEXT: cntlzw r3, r3
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame^]32; CHECK-NEXT: srwi r3, r3, 5
33; CHECK-NEXT: neg r3, r3
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000[diff] [blame]34; CHECK-NEXT: blr
35entry:
36 %cmp = icmp eq i16 %a, %b
37 %sub = sext i1 %cmp to i32
38 ret i32 %sub
39}
40
41; Function Attrs: norecurse nounwind readnone
42define signext i32 @test_ieqss_z(i16 signext %a) {
43; CHECK-LABEL: test_ieqss_z:
44; CHECK: # BB#0: # %entry
45; CHECK-NEXT: cntlzw r3, r3
46; CHECK-NEXT: srwi r3, r3, 5
47; CHECK-NEXT: blr
48entry:
49 %cmp = icmp eq i16 %a, 0
50 %conv1 = zext i1 %cmp to i32
51 ret i32 %conv1
52}
53
54; Function Attrs: norecurse nounwind readnone
55define signext i32 @test_ieqss_sext_z(i16 signext %a) {
56; CHECK-LABEL: test_ieqss_sext_z:
57; CHECK: # BB#0: # %entry
58; CHECK-NEXT: cntlzw r3, r3
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame^]59; CHECK-NEXT: srwi r3, r3, 5
60; CHECK-NEXT: neg r3, r3
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000[diff] [blame]61; CHECK-NEXT: blr
62entry:
63 %cmp = icmp eq i16 %a, 0
64 %sub = sext i1 %cmp to i32
65 ret i32 %sub
66}
67
68; Function Attrs: norecurse nounwind
69define void @test_ieqss_store(i16 signext %a, i16 signext %b) {
70; CHECK-LABEL: test_ieqss_store:
71; CHECK: # BB#0: # %entry
72; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
73; CHECK-NEXT: xor r3, r3, r4
74; CHECK-NEXT: ld r12, .LC0@toc@l(r5)
75; CHECK-NEXT: cntlzw r3, r3
76; CHECK-NEXT: srwi r3, r3, 5
77; CHECK-NEXT: sth r3, 0(r12)
78; CHECK-NEXT: blr
79entry:
80 %cmp = icmp eq i16 %a, %b
81 %conv3 = zext i1 %cmp to i16
82 store i16 %conv3, i16* @glob, align 2
83 ret void
84}
85
86; Function Attrs: norecurse nounwind
87define void @test_ieqss_sext_store(i16 signext %a, i16 signext %b) {
88; CHECK-LABEL: test_ieqss_sext_store:
89; CHECK: # BB#0: # %entry
90; CHECK-NEXT: xor r3, r3, r4
91; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
92; CHECK-NEXT: cntlzw r3, r3
93; CHECK-NEXT: ld r4, .LC0@toc@l(r5)
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame^]94; CHECK-NEXT: srwi r3, r3, 5
95; CHECK-NEXT: neg r3, r3
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000[diff] [blame]96; CHECK-NEXT: sth r3, 0(r4)
97; CHECK-NEXT: blr
98entry:
99 %cmp = icmp eq i16 %a, %b
100 %conv3 = sext i1 %cmp to i16
101 store i16 %conv3, i16* @glob, align 2
102 ret void
103}
104
105; Function Attrs: norecurse nounwind
106define void @test_ieqss_z_store(i16 signext %a) {
107; CHECK-LABEL: test_ieqss_z_store:
108; CHECK: # BB#0: # %entry
109; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
110; CHECK-NEXT: cntlzw r3, r3
111; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
112; CHECK-NEXT: srwi r3, r3, 5
113; CHECK-NEXT: sth r3, 0(r4)
114; CHECK-NEXT: blr
115entry:
116 %cmp = icmp eq i16 %a, 0
117 %conv2 = zext i1 %cmp to i16
118 store i16 %conv2, i16* @glob, align 2
119 ret void
120}
121
122; Function Attrs: norecurse nounwind
123define void @test_ieqss_sext_z_store(i16 signext %a) {
124; CHECK-LABEL: test_ieqss_sext_z_store:
125; CHECK: # BB#0: # %entry
126; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
127; CHECK-NEXT: cntlzw r3, r3
128; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame^]129; CHECK-NEXT: srwi r3, r3, 5
130; CHECK-NEXT: neg r3, r3
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000[diff] [blame]131; CHECK-NEXT: sth r3, 0(r4)
132; CHECK-NEXT: blr
133entry:
134 %cmp = icmp eq i16 %a, 0
135 %conv2 = sext i1 %cmp to i16
136 store i16 %conv2, i16* @glob, align 2
137 ret void
138}