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Erich Keaneebba5922017-07-21 22:37:03 +00001//===--- Mips.h - Declare Mips target feature support -----------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares Mips TargetInfo objects.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
15#define LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
16
17#include "clang/Basic/TargetInfo.h"
18#include "clang/Basic/TargetOptions.h"
19#include "llvm/ADT/Triple.h"
20#include "llvm/Support/Compiler.h"
21
22namespace clang {
23namespace targets {
24
25class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
26 void setDataLayout() {
27 StringRef Layout;
28
29 if (ABI == "o32")
30 Layout = "m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
31 else if (ABI == "n32")
32 Layout = "m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128";
33 else if (ABI == "n64")
34 Layout = "m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128";
35 else
36 llvm_unreachable("Invalid ABI");
37
38 if (BigEndian)
39 resetDataLayout(("E-" + Layout).str());
40 else
41 resetDataLayout(("e-" + Layout).str());
42 }
43
44 static const Builtin::Info BuiltinInfo[];
45 std::string CPU;
46 bool IsMips16;
47 bool IsMicromips;
48 bool IsNan2008;
Petar Jovanovic50765112017-08-24 16:06:30 +000049 bool IsAbs2008;
Erich Keaneebba5922017-07-21 22:37:03 +000050 bool IsSingleFloat;
51 bool IsNoABICalls;
52 bool CanUseBSDABICalls;
53 enum MipsFloatABI { HardFloat, SoftFloat } FloatABI;
54 enum DspRevEnum { NoDSP, DSP1, DSP2 } DspRev;
55 bool HasMSA;
Stefan Maksimovic76391b12017-08-11 11:03:54 +000056 bool DisableMadd4;
Simon Dardis0bc2d9b2018-02-21 00:05:05 +000057 bool UseIndirectJumpHazard;
Erich Keaneebba5922017-07-21 22:37:03 +000058
59protected:
Stefan Maksimoviceb632562018-08-22 09:26:25 +000060 enum FPModeEnum { FPXX, FP32, FP64 } FPMode;
Erich Keaneebba5922017-07-21 22:37:03 +000061 std::string ABI;
62
63public:
64 MipsTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
65 : TargetInfo(Triple), IsMips16(false), IsMicromips(false),
Petar Jovanovic50765112017-08-24 16:06:30 +000066 IsNan2008(false), IsAbs2008(false), IsSingleFloat(false),
67 IsNoABICalls(false), CanUseBSDABICalls(false), FloatABI(HardFloat),
Simon Dardis0bc2d9b2018-02-21 00:05:05 +000068 DspRev(NoDSP), HasMSA(false), DisableMadd4(false),
Stefan Maksimoviceb632562018-08-22 09:26:25 +000069 UseIndirectJumpHazard(false), FPMode(FPXX) {
Erich Keaneebba5922017-07-21 22:37:03 +000070 TheCXXABI.set(TargetCXXABI::GenericMIPS);
71
Alexander Richardson742553d2018-06-25 16:49:52 +000072 setABI(getTriple().isMIPS32() ? "o32" : "n64");
Erich Keaneebba5922017-07-21 22:37:03 +000073
74 CPU = ABI == "o32" ? "mips32r2" : "mips64r2";
75
76 CanUseBSDABICalls = Triple.getOS() == llvm::Triple::FreeBSD ||
77 Triple.getOS() == llvm::Triple::OpenBSD;
78 }
79
Petar Jovanovic9d1c0942017-08-22 13:35:27 +000080 bool isIEEE754_2008Default() const {
Erich Keaneebba5922017-07-21 22:37:03 +000081 return CPU == "mips32r6" || CPU == "mips64r6";
82 }
83
84 bool isFP64Default() const {
85 return CPU == "mips32r6" || ABI == "n32" || ABI == "n64" || ABI == "64";
86 }
87
88 bool isNan2008() const override { return IsNan2008; }
89
90 bool processorSupportsGPR64() const;
91
92 StringRef getABI() const override { return ABI; }
93
94 bool setABI(const std::string &Name) override {
95 if (Name == "o32") {
96 setO32ABITypes();
97 ABI = Name;
98 return true;
99 }
100
101 if (Name == "n32") {
102 setN32ABITypes();
103 ABI = Name;
104 return true;
105 }
106 if (Name == "n64") {
107 setN64ABITypes();
108 ABI = Name;
109 return true;
110 }
111 return false;
112 }
113
114 void setO32ABITypes() {
115 Int64Type = SignedLongLong;
116 IntMaxType = Int64Type;
117 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
118 LongDoubleWidth = LongDoubleAlign = 64;
119 LongWidth = LongAlign = 32;
120 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
121 PointerWidth = PointerAlign = 32;
122 PtrDiffType = SignedInt;
123 SizeType = UnsignedInt;
124 SuitableAlign = 64;
125 }
126
127 void setN32N64ABITypes() {
128 LongDoubleWidth = LongDoubleAlign = 128;
129 LongDoubleFormat = &llvm::APFloat::IEEEquad();
130 if (getTriple().getOS() == llvm::Triple::FreeBSD) {
131 LongDoubleWidth = LongDoubleAlign = 64;
132 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
133 }
134 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
135 SuitableAlign = 128;
136 }
137
138 void setN64ABITypes() {
139 setN32N64ABITypes();
140 if (getTriple().getOS() == llvm::Triple::OpenBSD) {
141 Int64Type = SignedLongLong;
142 } else {
143 Int64Type = SignedLong;
144 }
145 IntMaxType = Int64Type;
146 LongWidth = LongAlign = 64;
147 PointerWidth = PointerAlign = 64;
148 PtrDiffType = SignedLong;
149 SizeType = UnsignedLong;
150 }
151
152 void setN32ABITypes() {
153 setN32N64ABITypes();
154 Int64Type = SignedLongLong;
155 IntMaxType = Int64Type;
156 LongWidth = LongAlign = 32;
157 PointerWidth = PointerAlign = 32;
158 PtrDiffType = SignedInt;
159 SizeType = UnsignedInt;
160 }
161
162 bool isValidCPUName(StringRef Name) const override;
Erich Keanee44bdb32018-02-08 23:16:55 +0000163 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
Erich Keaneebba5922017-07-21 22:37:03 +0000164
165 bool setCPU(const std::string &Name) override {
166 CPU = Name;
167 return isValidCPUName(Name);
168 }
169
170 const std::string &getCPU() const { return CPU; }
171 bool
172 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
173 StringRef CPU,
174 const std::vector<std::string> &FeaturesVec) const override {
175 if (CPU.empty())
176 CPU = getCPU();
177 if (CPU == "octeon")
178 Features["mips64r2"] = Features["cnmips"] = true;
179 else
180 Features[CPU] = true;
181 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
182 }
183
Stefan Maksimoviceb632562018-08-22 09:26:25 +0000184 unsigned getISARev() const;
185
Erich Keaneebba5922017-07-21 22:37:03 +0000186 void getTargetDefines(const LangOptions &Opts,
187 MacroBuilder &Builder) const override;
188
189 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
190
191 bool hasFeature(StringRef Feature) const override;
192
193 BuiltinVaListKind getBuiltinVaListKind() const override {
194 return TargetInfo::VoidPtrBuiltinVaList;
195 }
196
197 ArrayRef<const char *> getGCCRegNames() const override {
198 static const char *const GCCRegNames[] = {
199 // CPU register names
200 // Must match second column of GCCRegAliases
201 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10",
202 "$11", "$12", "$13", "$14", "$15", "$16", "$17", "$18", "$19", "$20",
203 "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30",
204 "$31",
205 // Floating point register names
206 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", "$f9",
207 "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", "$f16", "$f17", "$f18",
208 "$f19", "$f20", "$f21", "$f22", "$f23", "$f24", "$f25", "$f26", "$f27",
209 "$f28", "$f29", "$f30", "$f31",
210 // Hi/lo and condition register names
211 "hi", "lo", "", "$fcc0", "$fcc1", "$fcc2", "$fcc3", "$fcc4", "$fcc5",
212 "$fcc6", "$fcc7", "$ac1hi", "$ac1lo", "$ac2hi", "$ac2lo", "$ac3hi",
213 "$ac3lo",
214 // MSA register names
215 "$w0", "$w1", "$w2", "$w3", "$w4", "$w5", "$w6", "$w7", "$w8", "$w9",
216 "$w10", "$w11", "$w12", "$w13", "$w14", "$w15", "$w16", "$w17", "$w18",
217 "$w19", "$w20", "$w21", "$w22", "$w23", "$w24", "$w25", "$w26", "$w27",
218 "$w28", "$w29", "$w30", "$w31",
219 // MSA control register names
220 "$msair", "$msacsr", "$msaaccess", "$msasave", "$msamodify",
221 "$msarequest", "$msamap", "$msaunmap"
222 };
223 return llvm::makeArrayRef(GCCRegNames);
224 }
225
226 bool validateAsmConstraint(const char *&Name,
227 TargetInfo::ConstraintInfo &Info) const override {
228 switch (*Name) {
229 default:
230 return false;
231 case 'r': // CPU registers.
232 case 'd': // Equivalent to "r" unless generating MIPS16 code.
233 case 'y': // Equivalent to "r", backward compatibility only.
234 case 'f': // floating-point registers.
235 case 'c': // $25 for indirect jumps
236 case 'l': // lo register
237 case 'x': // hilo register pair
238 Info.setAllowsRegister();
239 return true;
240 case 'I': // Signed 16-bit constant
241 case 'J': // Integer 0
242 case 'K': // Unsigned 16-bit constant
243 case 'L': // Signed 32-bit constant, lower 16-bit zeros (for lui)
244 case 'M': // Constants not loadable via lui, addiu, or ori
245 case 'N': // Constant -1 to -65535
246 case 'O': // A signed 15-bit constant
247 case 'P': // A constant between 1 go 65535
248 return true;
249 case 'R': // An address that can be used in a non-macro load or store
250 Info.setAllowsMemory();
251 return true;
252 case 'Z':
253 if (Name[1] == 'C') { // An address usable by ll, and sc.
254 Info.setAllowsMemory();
255 Name++; // Skip over 'Z'.
256 return true;
257 }
258 return false;
259 }
260 }
261
262 std::string convertConstraint(const char *&Constraint) const override {
263 std::string R;
264 switch (*Constraint) {
265 case 'Z': // Two-character constraint; add "^" hint for later parsing.
266 if (Constraint[1] == 'C') {
267 R = std::string("^") + std::string(Constraint, 2);
268 Constraint++;
269 return R;
270 }
271 break;
272 }
273 return TargetInfo::convertConstraint(Constraint);
274 }
275
276 const char *getClobbers() const override {
277 // In GCC, $1 is not widely used in generated code (it's used only in a few
278 // specific situations), so there is no real need for users to add it to
279 // the clobbers list if they want to use it in their inline assembly code.
280 //
281 // In LLVM, $1 is treated as a normal GPR and is always allocatable during
282 // code generation, so using it in inline assembly without adding it to the
283 // clobbers list can cause conflicts between the inline assembly code and
284 // the surrounding generated code.
285 //
286 // Another problem is that LLVM is allowed to choose $1 for inline assembly
287 // operands, which will conflict with the ".set at" assembler option (which
288 // we use only for inline assembly, in order to maintain compatibility with
289 // GCC) and will also conflict with the user's usage of $1.
290 //
291 // The easiest way to avoid these conflicts and keep $1 as an allocatable
292 // register for generated code is to automatically clobber $1 for all inline
293 // assembly code.
294 //
295 // FIXME: We should automatically clobber $1 only for inline assembly code
296 // which actually uses it. This would allow LLVM to use $1 for inline
297 // assembly operands if the user's assembly code doesn't use it.
298 return "~{$1}";
299 }
300
301 bool handleTargetFeatures(std::vector<std::string> &Features,
302 DiagnosticsEngine &Diags) override {
303 IsMips16 = false;
304 IsMicromips = false;
Petar Jovanovic9d1c0942017-08-22 13:35:27 +0000305 IsNan2008 = isIEEE754_2008Default();
Petar Jovanovic50765112017-08-24 16:06:30 +0000306 IsAbs2008 = isIEEE754_2008Default();
Erich Keaneebba5922017-07-21 22:37:03 +0000307 IsSingleFloat = false;
308 FloatABI = HardFloat;
309 DspRev = NoDSP;
Stefan Maksimoviceb632562018-08-22 09:26:25 +0000310 FPMode = isFP64Default() ? FP64 : FPXX;
Erich Keaneebba5922017-07-21 22:37:03 +0000311
312 for (const auto &Feature : Features) {
313 if (Feature == "+single-float")
314 IsSingleFloat = true;
315 else if (Feature == "+soft-float")
316 FloatABI = SoftFloat;
317 else if (Feature == "+mips16")
318 IsMips16 = true;
319 else if (Feature == "+micromips")
320 IsMicromips = true;
321 else if (Feature == "+dsp")
322 DspRev = std::max(DspRev, DSP1);
323 else if (Feature == "+dspr2")
324 DspRev = std::max(DspRev, DSP2);
325 else if (Feature == "+msa")
326 HasMSA = true;
Stefan Maksimovic76391b12017-08-11 11:03:54 +0000327 else if (Feature == "+nomadd4")
328 DisableMadd4 = true;
Erich Keaneebba5922017-07-21 22:37:03 +0000329 else if (Feature == "+fp64")
Stefan Maksimoviceb632562018-08-22 09:26:25 +0000330 FPMode = FP64;
Erich Keaneebba5922017-07-21 22:37:03 +0000331 else if (Feature == "-fp64")
Stefan Maksimoviceb632562018-08-22 09:26:25 +0000332 FPMode = FP32;
333 else if (Feature == "+fpxx")
334 FPMode = FPXX;
Erich Keaneebba5922017-07-21 22:37:03 +0000335 else if (Feature == "+nan2008")
336 IsNan2008 = true;
337 else if (Feature == "-nan2008")
338 IsNan2008 = false;
Petar Jovanovic50765112017-08-24 16:06:30 +0000339 else if (Feature == "+abs2008")
340 IsAbs2008 = true;
341 else if (Feature == "-abs2008")
342 IsAbs2008 = false;
Erich Keaneebba5922017-07-21 22:37:03 +0000343 else if (Feature == "+noabicalls")
344 IsNoABICalls = true;
Simon Dardis0bc2d9b2018-02-21 00:05:05 +0000345 else if (Feature == "+use-indirect-jump-hazard")
346 UseIndirectJumpHazard = true;
Erich Keaneebba5922017-07-21 22:37:03 +0000347 }
348
349 setDataLayout();
350
351 return true;
352 }
353
354 int getEHDataRegisterNumber(unsigned RegNo) const override {
355 if (RegNo == 0)
356 return 4;
357 if (RegNo == 1)
358 return 5;
359 return -1;
360 }
361
362 bool isCLZForZeroUndef() const override { return false; }
363
364 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
365 static const TargetInfo::GCCRegAlias O32RegAliases[] = {
366 {{"at"}, "$1"}, {{"v0"}, "$2"}, {{"v1"}, "$3"},
367 {{"a0"}, "$4"}, {{"a1"}, "$5"}, {{"a2"}, "$6"},
368 {{"a3"}, "$7"}, {{"t0"}, "$8"}, {{"t1"}, "$9"},
369 {{"t2"}, "$10"}, {{"t3"}, "$11"}, {{"t4"}, "$12"},
370 {{"t5"}, "$13"}, {{"t6"}, "$14"}, {{"t7"}, "$15"},
371 {{"s0"}, "$16"}, {{"s1"}, "$17"}, {{"s2"}, "$18"},
372 {{"s3"}, "$19"}, {{"s4"}, "$20"}, {{"s5"}, "$21"},
373 {{"s6"}, "$22"}, {{"s7"}, "$23"}, {{"t8"}, "$24"},
374 {{"t9"}, "$25"}, {{"k0"}, "$26"}, {{"k1"}, "$27"},
375 {{"gp"}, "$28"}, {{"sp", "$sp"}, "$29"}, {{"fp", "$fp"}, "$30"},
376 {{"ra"}, "$31"}
377 };
378 static const TargetInfo::GCCRegAlias NewABIRegAliases[] = {
379 {{"at"}, "$1"}, {{"v0"}, "$2"}, {{"v1"}, "$3"},
380 {{"a0"}, "$4"}, {{"a1"}, "$5"}, {{"a2"}, "$6"},
381 {{"a3"}, "$7"}, {{"a4"}, "$8"}, {{"a5"}, "$9"},
382 {{"a6"}, "$10"}, {{"a7"}, "$11"}, {{"t0"}, "$12"},
383 {{"t1"}, "$13"}, {{"t2"}, "$14"}, {{"t3"}, "$15"},
384 {{"s0"}, "$16"}, {{"s1"}, "$17"}, {{"s2"}, "$18"},
385 {{"s3"}, "$19"}, {{"s4"}, "$20"}, {{"s5"}, "$21"},
386 {{"s6"}, "$22"}, {{"s7"}, "$23"}, {{"t8"}, "$24"},
387 {{"t9"}, "$25"}, {{"k0"}, "$26"}, {{"k1"}, "$27"},
388 {{"gp"}, "$28"}, {{"sp", "$sp"}, "$29"}, {{"fp", "$fp"}, "$30"},
389 {{"ra"}, "$31"}
390 };
391 if (ABI == "o32")
392 return llvm::makeArrayRef(O32RegAliases);
393 return llvm::makeArrayRef(NewABIRegAliases);
394 }
395
Mandeep Singh Grangac24bb52018-02-25 03:58:23 +0000396 bool hasInt128Type() const override {
397 return (ABI == "n32" || ABI == "n64") || getTargetOpts().ForceEnableInt128;
398 }
Erich Keaneebba5922017-07-21 22:37:03 +0000399
400 bool validateTarget(DiagnosticsEngine &Diags) const override;
401};
402} // namespace targets
403} // namespace clang
404
405#endif // LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H