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Reid Spencerea8b07e2007-03-23 20:48:34 +00001; This test makes sure that add instructions are properly eliminated.
2; This test is for Integer BitWidth > 64 && BitWidth <= 1024.
3
Reid Spencerea8b07e2007-03-23 20:48:34 +00004; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
5; RUN: grep -v OK | not grep add
Reid Spencerede8c3b2007-04-15 07:38:21 +00006; END.
Reid Spencerea8b07e2007-03-23 20:48:34 +00007
8define i111 @test1(i111 %x) {
9 %tmp.2 = shl i111 1, 110
10 %tmp.4 = xor i111 %x, %tmp.2
11 ;; Add of sign bit -> xor of sign bit.
12 %tmp.6 = add i111 %tmp.4, %tmp.2
13 ret i111 %tmp.6
14}
15
16define i65 @test2(i65 %x) {
17 %tmp.0 = shl i65 1, 64
18 %tmp.2 = xor i65 %x, %tmp.0
19 ;; Add of sign bit -> xor of sign bit.
20 %tmp.4 = add i65 %tmp.2, %tmp.0
21 ret i65 %tmp.4
22}
23
24define i1024 @test3(i1024 %x) {
25 %tmp.0 = shl i1024 1, 1023
26 %tmp.2 = xor i1024 %x, %tmp.0
27 ;; Add of sign bit -> xor of sign bit.
28 %tmp.4 = add i1024 %tmp.2, %tmp.0
29 ret i1024 %tmp.4
30}
31
32define i128 @test4(i128 %x) {
33 ;; If we have ADD(XOR(AND(X, 0xFF), 0xF..F80), 0x80), it's a sext.
34 %tmp.5 = shl i128 1, 127
35 %tmp.1 = ashr i128 %tmp.5, 120
36 %tmp.2 = xor i128 %x, %tmp.1
37 %tmp.4 = add i128 %tmp.2, %tmp.5
38 ret i128 %tmp.4
39}
40
Reid Spencerea8b07e2007-03-23 20:48:34 +000041define i77 @test6(i77 %x) {
42 ;; (x & 254)+1 -> (x & 254)|1
43 %tmp.2 = and i77 %x, 562949953421310
44 %tmp.4 = add i77 %tmp.2, 1
45 ret i77 %tmp.4
46}