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gerrit-public.fairphone.software / toolchain / llvm-project / c35219e3ee4ded60ff4f274de613fcd70fb870b3 / . / llvm / test / CodeGen / ARM / atomic-load-store.ll
blob: 476b3ddd45d3b5450896e4ed058ce30ae798fcc8 [file] [log] [blame]
Eli Friedmane978d2f2011-09-07 02:23:42 +0000[diff] [blame]1; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=ARM
Eli Friedmanf3dd6da2011-09-02 22:33:24 +0000[diff] [blame]2; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=ARM
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]3; RUN: llc < %s -mtriple=thumbv7-apple-ios | FileCheck %s -check-prefix=THUMBTWO
4; RUN: llc < %s -mtriple=thumbv6-apple-ios | FileCheck %s -check-prefix=THUMBONE
Lang Hamesc22e39d2013-06-28 18:36:42 +0000[diff] [blame]5; RUN llc < %s -mtriple=armv4-apple-ios | FileCheck %s -check-prefix=ARMV4
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]6
7define void @test1(i32* %ptr, i32 %val1) {
8; ARM: test1
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]9; ARM: dmb {{ish$}}
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]10; ARM-NEXT: str
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]11; ARM-NEXT: dmb {{ish$}}
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]12; THUMBONE: test1
13; THUMBONE: __sync_lock_test_and_set_4
14; THUMBTWO: test1
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]15; THUMBTWO: dmb {{ish$}}
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]16; THUMBTWO-NEXT: str
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]17; THUMBTWO-NEXT: dmb {{ish$}}
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]18 store atomic i32 %val1, i32* %ptr seq_cst, align 4
19 ret void
20}
21
22define i32 @test2(i32* %ptr) {
23; ARM: test2
24; ARM: ldr
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]25; ARM-NEXT: dmb {{ish$}}
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]26; THUMBONE: test2
27; THUMBONE: __sync_val_compare_and_swap_4
28; THUMBTWO: test2
29; THUMBTWO: ldr
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]30; THUMBTWO-NEXT: dmb {{ish$}}
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]31 %val = load atomic i32* %ptr seq_cst, align 4
32 ret i32 %val
33}
Eli Friedmanee8f14a72011-09-15 21:20:49 +0000[diff] [blame]34
35define void @test3(i8* %ptr1, i8* %ptr2) {
36; ARM: test3
37; ARM: ldrb
38; ARM: strb
Eli Friedmaneb1bd242011-09-19 22:02:33 +0000[diff] [blame]39; THUMBTWO: test3
40; THUMBTWO: ldrb
41; THUMBTWO: strb
42; THUMBONE: test3
43; THUMBONE: ldrb
44; THUMBONE: strb
Eli Friedmanee8f14a72011-09-15 21:20:49 +0000[diff] [blame]45 %val = load atomic i8* %ptr1 unordered, align 1
46 store atomic i8 %val, i8* %ptr2 unordered, align 1
47 ret void
48}
Eli Friedmaneb1bd242011-09-19 22:02:33 +0000[diff] [blame]49
50define void @test4(i8* %ptr1, i8* %ptr2) {
51; THUMBONE: test4
52; THUMBONE: ___sync_val_compare_and_swap_1
53; THUMBONE: ___sync_lock_test_and_set_1
54 %val = load atomic i8* %ptr1 seq_cst, align 1
55 store atomic i8 %val, i8* %ptr2 seq_cst, align 1
56 ret void
57}
Lang Hamesc22e39d2013-06-28 18:36:42 +0000[diff] [blame]58
59define i64 @test_old_load_64bit(i64* %p) {
60; ARMV4: test_old_load_64bit
61; ARMV4: ___sync_val_compare_and_swap_8
62 %1 = load atomic i64* %p seq_cst, align 8
63 ret i64 %1
64}
65
66define void @test_old_store_64bit(i64* %p, i64 %v) {
67; ARMV4: test_old_store_64bit
68; ARMV4: ___sync_lock_test_and_set_8
69 store atomic i64 %v, i64* %p seq_cst, align 8
70 ret void
71}