Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / b09be505b8ae2f7981746b91299ce03e59a30330 / . / llvm / lib / Target / X86 / X86InstrFragmentsSIMD.td
blob: b53a8f83b30e5abd448f8b0e8df97d3e7adebca1 [file] [log] [blame]
Jia Liue1d61962012-02-19 02:03:36 +0000[diff] [blame]1//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +0000[diff] [blame]7//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]8//===----------------------------------------------------------------------===//
9//
10// This file provides pattern fragments useful for SIMD instructions.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]15// MMX specific DAG Nodes.
16//===----------------------------------------------------------------------===//
17
18// Low word of MMX to GPR.
19def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,
20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
Bruno Cardoso Lopesab9ae872015-02-05 13:23:07 +0000[diff] [blame]21// GPR to low word of MMX.
22def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1,
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]24
25//===----------------------------------------------------------------------===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]26// MMX Pattern Fragments
27//===----------------------------------------------------------------------===//
28
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]29def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>;
Bruno Cardoso Lopes9e1c4c12015-02-23 15:23:14 +0000[diff] [blame]30def load_mvmmx : PatFrag<(ops node:$ptr),
31 (x86mmx (MMX_X86movw2d (load node:$ptr)))>;
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]32def bc_mmx : PatFrag<(ops node:$in), (x86mmx (bitconvert node:$in))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]33
34//===----------------------------------------------------------------------===//
35// SSE specific DAG Nodes.
36//===----------------------------------------------------------------------===//
37
38def SDTX86FPShiftOp : SDTypeProfile<1, 2, [ SDTCisSameAs<0, 1>,
39 SDTCisFP<0>, SDTCisInt<2> ]>;
40def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]41 SDTCisFP<1>, SDTCisVT<3, i8>,
42 SDTCisVec<1>]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]43
Benjamin Kramer4669d182012-12-21 14:04:55 +0000[diff] [blame]44def X86umin : SDNode<"X86ISD::UMIN", SDTIntBinOp>;
45def X86umax : SDNode<"X86ISD::UMAX", SDTIntBinOp>;
46def X86smin : SDNode<"X86ISD::SMIN", SDTIntBinOp>;
47def X86smax : SDNode<"X86ISD::SMAX", SDTIntBinOp>;
48
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]49def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
50def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
Nadav Rotem178250a2012-08-19 13:06:16 +0000[diff] [blame]51
52// Commutative and Associative FMIN and FMAX.
53def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,
54 [SDNPCommutative, SDNPAssociative]>;
55def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,
56 [SDNPCommutative, SDNPAssociative]>;
57
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]58def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
59 [SDNPCommutative, SDNPAssociative]>;
60def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
61 [SDNPCommutative, SDNPAssociative]>;
62def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
63 [SDNPCommutative, SDNPAssociative]>;
Benjamin Kramer5bc180c2013-08-04 12:05:16 +0000[diff] [blame]64def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp,
65 [SDNPCommutative, SDNPAssociative]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]66def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
67def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
68def X86fsrl : SDNode<"X86ISD::FSRL", SDTX86FPShiftOp>;
Stuart Hastings9f208042011-06-01 04:39:42 +0000[diff] [blame]69def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>;
Duncan Sands0e4fcb82011-09-22 20:15:48 +0000[diff] [blame]70def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
71def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
Craig Topperf984efb2011-11-19 09:02:40 +0000[diff] [blame]72def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
73def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]74def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>;
75def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]76def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
77//def X86cmpsd : SDNode<"X86ISD::FSETCCsd", SDTX86Cmpsd>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]78def X86pshufb : SDNode<"X86ISD::PSHUFB",
Craig Topper78349002012-01-25 06:43:11 +0000[diff] [blame]79 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]80 SDTCisSameAs<0,2>]>>;
Bruno Cardoso Lopes7ba479d2011-07-13 21:36:47 +0000[diff] [blame]81def X86andnp : SDNode<"X86ISD::ANDNP",
Bruno Cardoso Lopes9613b642011-07-13 21:36:51 +0000[diff] [blame]82 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]83 SDTCisSameAs<0,2>]>>;
Craig Topper81390be2011-11-19 07:33:10 +0000[diff] [blame]84def X86psign : SDNode<"X86ISD::PSIGN",
Craig Topperde6b73b2011-11-19 07:07:26 +0000[diff] [blame]85 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]86 SDTCisSameAs<0,2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]87def X86pextrb : SDNode<"X86ISD::PEXTRB",
88 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
89def X86pextrw : SDNode<"X86ISD::PEXTRW",
90 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
91def X86pinsrb : SDNode<"X86ISD::PINSRB",
92 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
93 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
94def X86pinsrw : SDNode<"X86ISD::PINSRW",
95 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
96 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
Filipe Cabecinhas20352212014-04-21 20:07:29 +0000[diff] [blame]97def X86insertps : SDNode<"X86ISD::INSERTPS",
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]98 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]99 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]100def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
101 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>;
Elena Demikhovsky8d7e56c2012-04-22 09:39:03 +0000[diff] [blame]102
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]103def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
Chris Lattner54e53292010-09-22 00:34:38 +0000[diff] [blame]104 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]105
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]106def X86vzext : SDNode<"X86ISD::VZEXT",
107 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]108 SDTCisInt<0>, SDTCisInt<1>,
109 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]110
111def X86vsext : SDNode<"X86ISD::VSEXT",
112 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]113 SDTCisInt<0>, SDTCisInt<1>,
114 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]115
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]116def X86vtrunc : SDNode<"X86ISD::VTRUNC",
117 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]118 SDTCisInt<0>, SDTCisInt<1>,
119 SDTCisOpSmallerThanOp<0, 1>]>>;
Elena Demikhovskyc5f67262013-12-17 08:33:15 +0000[diff] [blame]120def X86trunc : SDNode<"X86ISD::TRUNC",
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]121 SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>,
122 SDTCisOpSmallerThanOp<0, 1>]>>;
123
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]124def X86vtruncm : SDNode<"X86ISD::VTRUNCM",
125 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
126 SDTCisInt<0>, SDTCisInt<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]127 SDTCisVec<2>, SDTCisInt<2>,
128 SDTCisOpSmallerThanOp<0, 2>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]129def X86vfpext : SDNode<"X86ISD::VFPEXT",
130 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]131 SDTCisFP<0>, SDTCisFP<1>,
132 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liaoe999b862012-10-10 16:53:28 +0000[diff] [blame]133def X86vfpround: SDNode<"X86ISD::VFPROUND",
134 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]135 SDTCisFP<0>, SDTCisFP<1>,
136 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]137
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]138def X86vshldq : SDNode<"X86ISD::VSHLDQ", SDTIntShiftOp>;
139def X86vshrdq : SDNode<"X86ISD::VSRLDQ", SDTIntShiftOp>;
Craig Topper0b7ad762012-01-22 23:36:02 +0000[diff] [blame]140def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>;
Craig Topperbd4884372012-01-22 22:42:16 +0000[diff] [blame]141def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;
142def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]143
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]144def X86IntCmpMask : SDTypeProfile<1, 2,
145 [SDTCisVec<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>]>;
146def X86pcmpeqm : SDNode<"X86ISD::PCMPEQM", X86IntCmpMask, [SDNPCommutative]>;
147def X86pcmpgtm : SDNode<"X86ISD::PCMPGTM", X86IntCmpMask>;
148
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]149def X86CmpMaskCC :
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]150 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisInt<0>, SDTCisVec<1>,
151 SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]152def X86CmpMaskCCScalar :
153 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
154
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]155def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>;
156def X86cmpmu : SDNode<"X86ISD::CMPMU", X86CmpMaskCC>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]157def X86cmpms : SDNode<"X86ISD::FSETCC", X86CmpMaskCCScalar>;
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]158
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]159def X86vshl : SDNode<"X86ISD::VSHL",
160 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
161 SDTCisVec<2>]>>;
162def X86vsrl : SDNode<"X86ISD::VSRL",
163 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
164 SDTCisVec<2>]>>;
165def X86vsra : SDNode<"X86ISD::VSRA",
166 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
167 SDTCisVec<2>]>>;
168
169def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;
170def X86vsrli : SDNode<"X86ISD::VSRLI", SDTIntShiftOp>;
171def X86vsrai : SDNode<"X86ISD::VSRAI", SDTIntShiftOp>;
172
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]173def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]174 SDTCisVec<1>,
175 SDTCisSameAs<2, 1>]>;
Benjamin Kramerb16ccde2012-12-15 16:47:44 +0000[diff] [blame]176def X86subus : SDNode<"X86ISD::SUBUS", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]177def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]178def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
Elena Demikhovsky40864b62013-08-05 08:52:21 +0000[diff] [blame]179def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]180def X86testm : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]181 SDTCisVec<1>, SDTCisSameAs<2, 1>,
182 SDTCVecEltisVT<0, i1>,
183 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovskya30e4372014-02-05 07:05:03 +0000[diff] [blame]184def X86testnm : SDNode<"X86ISD::TESTNM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]185 SDTCisVec<1>, SDTCisSameAs<2, 1>,
186 SDTCVecEltisVT<0, i1>,
187 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]188def X86select : SDNode<"X86ISD::SELECT" , SDTSelect>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]189
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]190def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
191 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
192 SDTCisSameAs<1,2>]>>;
Benjamin Kramer6d2dff62014-04-26 14:12:19 +0000[diff] [blame]193def X86pmuldq : SDNode<"X86ISD::PMULDQ",
194 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
195 SDTCisSameAs<1,2>]>>;
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]196
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]197// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
198// translated into one of the target nodes below during lowering.
199// Note: this is a work in progress...
200def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>;
201def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
202 SDTCisSameAs<0,2>]>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]203def SDTShuff3Op : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
204 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]205
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]206def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
207 SDTCisVec<2>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]208def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>,
209 SDTCisSameAs<0,1>, SDTCisInt<2>]>;
210def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
211 SDTCisSameAs<0,2>, SDTCisInt<3>]>;
212
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]213def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;
214def SDTVBroadcastm : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>]>;
215
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]216def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]217 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]218
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]219def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc.
220 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisInt<3>]>;
221
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]222def SDTFma : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
223 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]224def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
225 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>, SDTCisInt<4>]>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]226def STDFp1SrcRm : SDTypeProfile<1, 2, [SDTCisSameAs<0,1>,
227 SDTCisVec<0>, SDTCisInt<2>]>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]228def STDFp2SrcRm : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
229 SDTCisVec<0>, SDTCisInt<3>]>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000[diff] [blame]230def STDFp3SrcRm : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
231 SDTCisVec<0>, SDTCisInt<3>, SDTCisInt<4>]>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]232
Craig Topper8fb09f02013-01-28 06:48:25 +0000[diff] [blame]233def X86PAlignr : SDNode<"X86ISD::PALIGNR", SDTShuff3OpI>;
Adam Nemet2f10cc62014-08-05 17:22:55 +0000[diff] [blame]234def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]235
236def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>;
237def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>;
238def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>;
239
Craig Topper6e54ba72011-12-31 23:50:21 +0000[diff] [blame]240def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]241
242def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
243def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;
244def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;
245
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]246def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
247def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
248
249def X86Movlhps : SDNode<"X86ISD::MOVLHPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]250def X86Movlhpd : SDNode<"X86ISD::MOVLHPD", SDTShuff2Op>;
Bruno Cardoso Lopes03e4c352010-08-31 21:15:21 +0000[diff] [blame]251def X86Movhlps : SDNode<"X86ISD::MOVHLPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]252
Bruno Cardoso Lopesb3825212010-09-01 05:08:25 +0000[diff] [blame]253def X86Movlps : SDNode<"X86ISD::MOVLPS", SDTShuff2Op>;
254def X86Movlpd : SDNode<"X86ISD::MOVLPD", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]255
Chandler Carruth8366ceb2014-06-20 01:05:28 +0000[diff] [blame]256def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, SDTCisSameAs<2, 1>]>;
257def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
258def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>;
259
Craig Topper8d4ba192011-12-06 08:21:25 +0000[diff] [blame]260def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;
261def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]262
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]263def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>;
Chandler Carruthed5dfff2014-09-22 22:29:42 +0000[diff] [blame]264def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>;
265def X86VPermv : SDNode<"X86ISD::VPERMV", SDTShuff2Op>;
266def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;
267def X86VPermv3 : SDNode<"X86ISD::VPERMV3", SDTShuff3Op>;
Elena Demikhovskya5d38a32014-01-23 14:27:26 +0000[diff] [blame]268def X86VPermiv3 : SDNode<"X86ISD::VPERMIV3", SDTShuff3Op>;
Bruno Cardoso Lopesb878caa2011-07-21 01:55:47 +0000[diff] [blame]269
Craig Topper0a672ea2011-11-30 07:47:51 +0000[diff] [blame]270def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;
Bruno Cardoso Lopesf15dfe52011-08-12 21:48:26 +0000[diff] [blame]271
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]272def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>;
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]273def X86VBroadcastm : SDNode<"X86ISD::VBROADCASTM", SDTVBroadcastm>;
Elena Demikhovsky89529742013-09-12 08:55:00 +0000[diff] [blame]274def X86Vinsert : SDNode<"X86ISD::VINSERT", SDTypeProfile<1, 3,
275 [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
Elena Demikhovsky9f423d62014-02-10 07:02:39 +0000[diff] [blame]276def X86Vextract : SDNode<"X86ISD::VEXTRACT", SDTypeProfile<1, 2,
277 [SDTCisVec<1>, SDTCisPtrTy<2>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]278
Elena Demikhovskycd3c1c42012-12-05 09:24:57 +0000[diff] [blame]279def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>;
Chandler Carruth204ad4c2014-09-15 20:09:47 +0000[diff] [blame]280
281def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>;
282
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]283def X86faddRnd : SDNode<"X86ISD::FADD_RND", SDTFPBinOpRound>;
284def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>;
285def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>;
286def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;
Elena Demikhovsky02ffd262015-03-01 07:44:04 +0000[diff] [blame]287def X86fmaxRnd : SDNode<"X86ISD::FMAX", SDTFPBinOpRound>;
288def X86fminRnd : SDNode<"X86ISD::FMIN", SDTFPBinOpRound>;
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]289
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]290def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;
291def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
292def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFma>;
293def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFma>;
Craig Toppera999c662012-08-29 07:18:25 +0000[diff] [blame]294def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFma>;
295def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFma>;
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]296
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]297def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound>;
298def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound>;
299def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound>;
300def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound>;
301def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound>;
302def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound>;
303
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]304def X86rsqrt28 : SDNode<"X86ISD::RSQRT28", STDFp1SrcRm>;
305def X86rcp28 : SDNode<"X86ISD::RCP28", STDFp1SrcRm>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]306def X86exp2 : SDNode<"X86ISD::EXP2", STDFp1SrcRm>;
307
308def X86rsqrt28s : SDNode<"X86ISD::RSQRT28", STDFp2SrcRm>;
309def X86rcp28s : SDNode<"X86ISD::RCP28", STDFp2SrcRm>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000[diff] [blame]310def X86RndScale : SDNode<"X86ISD::RNDSCALE", STDFp3SrcRm>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]311
Craig Topperab47fe42012-08-06 06:22:36 +0000[diff] [blame]312def SDT_PCMPISTRI : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
313 SDTCisVT<2, v16i8>, SDTCisVT<3, v16i8>,
314 SDTCisVT<4, i8>]>;
315def SDT_PCMPESTRI : SDTypeProfile<2, 5, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
316 SDTCisVT<2, v16i8>, SDTCisVT<3, i32>,
317 SDTCisVT<4, v16i8>, SDTCisVT<5, i32>,
318 SDTCisVT<6, i8>]>;
319
320def X86pcmpistri : SDNode<"X86ISD::PCMPISTRI", SDT_PCMPISTRI>;
321def X86pcmpestri : SDNode<"X86ISD::PCMPESTRI", SDT_PCMPESTRI>;
322
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]323def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 3,
324 [SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>,
325 SDTCisVec<3>, SDTCisVec<1>, SDTCisInt<1>]>, []>;
Elena Demikhovsky72860c32014-12-15 10:03:52 +0000[diff] [blame]326def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 3,
327 [SDTCisSameAs<0, 3>,
328 SDTCisVec<3>, SDTCisVec<1>, SDTCisInt<1>]>, []>;
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]329
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]330//===----------------------------------------------------------------------===//
331// SSE Complex Patterns
332//===----------------------------------------------------------------------===//
333
334// These are 'extloads' from a scalar to the low element of a vector, zeroing
335// the top elements. These are used for the SSE 'ss' and 'sd' instruction
336// forms.
337def sse_load_f32 : ComplexPattern<v4f32, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]338 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
339 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]340def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]341 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
342 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]343
344def ssmem : Operand<v4f32> {
345 let PrintMethod = "printf32mem";
346 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]347 let ParserMatchClass = X86Mem32AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]348 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]349}
350def sdmem : Operand<v2f64> {
351 let PrintMethod = "printf64mem";
352 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]353 let ParserMatchClass = X86Mem64AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]354 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]355}
356
357//===----------------------------------------------------------------------===//
358// SSE pattern fragments
359//===----------------------------------------------------------------------===//
360
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]361// 128-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]362// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]363def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>;
364def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]365def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>;
366
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]367// 256-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]368// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]369def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>;
370def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]371def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>;
372
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]373// 512-bit load pattern fragments
374def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>;
375def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>;
Robert Khasanov7ca7df02014-08-04 14:35:15 +0000[diff] [blame]376def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>;
377def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>;
Elena Demikhovsky1f3ed412013-10-22 09:19:28 +0000[diff] [blame]378def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]379def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>;
380
381// 128-/256-/512-bit extload pattern fragments
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]382def extloadv2f32 : PatFrag<(ops node:$ptr), (v2f64 (extloadvf32 node:$ptr))>;
383def extloadv4f32 : PatFrag<(ops node:$ptr), (v4f64 (extloadvf32 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]384def extloadv8f32 : PatFrag<(ops node:$ptr), (v8f64 (extloadvf32 node:$ptr))>;
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]385
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]386// These are needed to match a scalar load that is used in a vector-only
387// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
388// The memory operand is required to be a 128-bit load, so it must be converted
389// from a vector to a scalar.
390def loadf32_128 : PatFrag<(ops node:$ptr),
391 (f32 (vector_extract (loadv4f32 node:$ptr), (iPTR 0)))>;
392def loadf64_128 : PatFrag<(ops node:$ptr),
393 (f64 (vector_extract (loadv2f64 node:$ptr), (iPTR 0)))>;
394
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]395// Like 'store', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]396def alignedstore : PatFrag<(ops node:$val, node:$ptr),
397 (store node:$val, node:$ptr), [{
398 return cast<StoreSDNode>(N)->getAlignment() >= 16;
399}]>;
400
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]401// Like 'store', but always requires 256-bit vector alignment.
402def alignedstore256 : PatFrag<(ops node:$val, node:$ptr),
403 (store node:$val, node:$ptr), [{
404 return cast<StoreSDNode>(N)->getAlignment() >= 32;
405}]>;
406
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]407// Like 'store', but always requires 512-bit vector alignment.
408def alignedstore512 : PatFrag<(ops node:$val, node:$ptr),
409 (store node:$val, node:$ptr), [{
410 return cast<StoreSDNode>(N)->getAlignment() >= 64;
411}]>;
412
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]413// Like 'load', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]414def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
415 return cast<LoadSDNode>(N)->getAlignment() >= 16;
416}]>;
417
Chad Rosiera281afc2012-03-09 02:00:48 +0000[diff] [blame]418// Like 'X86vzload', but always requires 128-bit vector alignment.
419def alignedX86vzload : PatFrag<(ops node:$ptr), (X86vzload node:$ptr), [{
420 return cast<MemSDNode>(N)->getAlignment() >= 16;
421}]>;
422
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]423// Like 'load', but always requires 256-bit vector alignment.
424def alignedload256 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
425 return cast<LoadSDNode>(N)->getAlignment() >= 32;
426}]>;
427
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]428// Like 'load', but always requires 512-bit vector alignment.
429def alignedload512 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
430 return cast<LoadSDNode>(N)->getAlignment() >= 64;
431}]>;
432
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]433def alignedloadfsf32 : PatFrag<(ops node:$ptr),
434 (f32 (alignedload node:$ptr))>;
435def alignedloadfsf64 : PatFrag<(ops node:$ptr),
436 (f64 (alignedload node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]437
438// 128-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]439// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]440def alignedloadv4f32 : PatFrag<(ops node:$ptr),
441 (v4f32 (alignedload node:$ptr))>;
442def alignedloadv2f64 : PatFrag<(ops node:$ptr),
443 (v2f64 (alignedload node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]444def alignedloadv2i64 : PatFrag<(ops node:$ptr),
445 (v2i64 (alignedload node:$ptr))>;
446
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]447// 256-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]448// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]449def alignedloadv8f32 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]450 (v8f32 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]451def alignedloadv4f64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]452 (v4f64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]453def alignedloadv4i64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]454 (v4i64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]455
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]456// 512-bit aligned load pattern fragments
457def alignedloadv16f32 : PatFrag<(ops node:$ptr),
458 (v16f32 (alignedload512 node:$ptr))>;
Elena Demikhovsky3ce8dbb2013-08-18 13:08:57 +0000[diff] [blame]459def alignedloadv16i32 : PatFrag<(ops node:$ptr),
460 (v16i32 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]461def alignedloadv8f64 : PatFrag<(ops node:$ptr),
462 (v8f64 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]463def alignedloadv8i64 : PatFrag<(ops node:$ptr),
464 (v8i64 (alignedload512 node:$ptr))>;
465
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]466// Like 'load', but uses special alignment checks suitable for use in
467// memory operands in most SSE instructions, which are required to
468// be naturally aligned on some targets but not on others. If the subtarget
469// allows unaligned accesses, match any load, though this may require
470// setting a feature bit in the processor (on startup, for example).
471// Opteron 10h and later implement such a feature.
472def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{
Sanjay Patelffd039b2015-02-03 17:13:04 +0000[diff] [blame]473 return Subtarget->hasSSEUnalignedMem()
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]474 || cast<LoadSDNode>(N)->getAlignment() >= 16;
475}]>;
476
477def memopfsf32 : PatFrag<(ops node:$ptr), (f32 (memop node:$ptr))>;
478def memopfsf64 : PatFrag<(ops node:$ptr), (f64 (memop node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]479
480// 128-bit memop pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]481// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]482def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;
483def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]484def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]485
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]486// These are needed to match a scalar memop that is used in a vector-only
487// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
488// The memory operand is required to be a 128-bit load, so it must be converted
489// from a vector to a scalar.
490def memopfsf32_128 : PatFrag<(ops node:$ptr),
491 (f32 (vector_extract (memopv4f32 node:$ptr), (iPTR 0)))>;
492def memopfsf64_128 : PatFrag<(ops node:$ptr),
493 (f64 (vector_extract (memopv2f64 node:$ptr), (iPTR 0)))>;
494
495
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]496// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
497// 16-byte boundary.
498// FIXME: 8 byte alignment for mmx reads is not required
499def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
500 return cast<LoadSDNode>(N)->getAlignment() >= 8;
501}]>;
502
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]503def memopmmx : PatFrag<(ops node:$ptr), (x86mmx (memop64 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]504
505// MOVNT Support
506// Like 'store', but requires the non-temporal bit to be set
507def nontemporalstore : PatFrag<(ops node:$val, node:$ptr),
508 (st node:$val, node:$ptr), [{
509 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
510 return ST->isNonTemporal();
511 return false;
512}]>;
513
514def alignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]515 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]516 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
517 return ST->isNonTemporal() && !ST->isTruncatingStore() &&
518 ST->getAddressingMode() == ISD::UNINDEXED &&
519 ST->getAlignment() >= 16;
520 return false;
521}]>;
522
523def unalignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]524 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]525 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
526 return ST->isNonTemporal() &&
527 ST->getAlignment() < 16;
528 return false;
529}]>;
530
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]531// 128-bit bitconvert pattern fragments
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]532def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>;
533def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>;
534def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>;
535def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>;
536def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;
537def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;
538
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]539// 256-bit bitconvert pattern fragments
Craig Topper682b8502011-11-02 04:42:13 +0000[diff] [blame]540def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;
541def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]542def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;
Bruno Cardoso Lopes1021b4a2011-07-13 01:15:33 +0000[diff] [blame]543def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;
Elena Demikhovsky3629b4a2014-01-06 08:45:54 +0000[diff] [blame]544def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]545
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]546// 512-bit bitconvert pattern fragments
547def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>;
548def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]549def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;
550def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>;
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]551
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]552def vzmovl_v2i64 : PatFrag<(ops node:$src),
553 (bitconvert (v2i64 (X86vzmovl
554 (v2i64 (scalar_to_vector (loadi64 node:$src))))))>;
555def vzmovl_v4i32 : PatFrag<(ops node:$src),
556 (bitconvert (v4i32 (X86vzmovl
557 (v4i32 (scalar_to_vector (loadi32 node:$src))))))>;
558
559def vzload_v2i64 : PatFrag<(ops node:$src),
560 (bitconvert (v2i64 (X86vzload node:$src)))>;
561
562
563def fp32imm0 : PatLeaf<(f32 fpimm), [{
564 return N->isExactlyValue(+0.0);
565}]>;
566
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]567def I8Imm : SDNodeXForm<imm, [{
568 // Transformation function: get the low 8 bits.
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]569 return getI8Imm((uint8_t)N->getZExtValue(), SDLoc(N));
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]570}]>;
571
572def FROUND_NO_EXC : ImmLeaf<i32, [{ return Imm == 8; }]>;
Adam Nemet50b83f02014-08-14 17:13:26 +0000[diff] [blame]573def FROUND_CURRENT : ImmLeaf<i32, [{
574 return Imm == X86::STATIC_ROUNDING::CUR_DIRECTION;
575}]>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]576
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]577// BYTE_imm - Transform bit immediates into byte immediates.
578def BYTE_imm : SDNodeXForm<imm, [{
579 // Transformation function: imm >> 3
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]580 return getI32Imm(N->getZExtValue() >> 3, SDLoc(N));
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]581}]>;
582
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]583// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index
584// to VEXTRACTF128/VEXTRACTI128 imm.
585def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]586 return getI8Imm(X86::getExtractVEXTRACT128Immediate(N), SDLoc(N));
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]587}]>;
588
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]589// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to
590// VINSERTF128/VINSERTI128 imm.
591def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]592 return getI8Imm(X86::getInsertVINSERT128Immediate(N), SDLoc(N));
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]593}]>;
594
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]595// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index
596// to VEXTRACTF64x4 imm.
597def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]598 return getI8Imm(X86::getExtractVEXTRACT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]599}]>;
600
601// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to
602// VINSERTF64x4 imm.
603def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]604 return getI8Imm(X86::getInsertVINSERT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]605}]>;
606
607def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index),
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]608 (extract_subvector node:$bigvec,
609 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]610 return X86::isVEXTRACT128Index(N);
611}], EXTRACT_get_vextract128_imm>;
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]612
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]613def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]614 node:$index),
615 (insert_subvector node:$bigvec, node:$smallvec,
616 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]617 return X86::isVINSERT128Index(N);
618}], INSERT_get_vinsert128_imm>;
619
620
621def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index),
622 (extract_subvector node:$bigvec,
623 node:$index), [{
624 return X86::isVEXTRACT256Index(N);
625}], EXTRACT_get_vextract256_imm>;
626
627def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
628 node:$index),
629 (insert_subvector node:$bigvec, node:$smallvec,
630 node:$index), [{
631 return X86::isVINSERT256Index(N);
632}], INSERT_get_vinsert256_imm>;
Bruno Cardoso Lopes123dff02011-07-25 23:05:25 +0000[diff] [blame]633
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]634def masked_load_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
635 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]636 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
637 return Load->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]638 return false;
639}]>;
640
641def masked_load_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
642 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]643 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
644 return Load->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]645 return false;
646}]>;
647
648def masked_load_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
649 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]650 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
651 return Load->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]652 return false;
653}]>;
654
655def masked_load_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
656 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]657 return isa<MaskedLoadSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]658}]>;
659
660def masked_store_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
661 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]662 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
663 return Store->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]664 return false;
665}]>;
666
667def masked_store_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
668 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]669 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
670 return Store->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]671 return false;
672}]>;
673
674def masked_store_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
675 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]676 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
677 return Store->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]678 return false;
679}]>;
680
681def masked_store_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
682 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]683 return isa<MaskedStoreSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]684}]>;
685